Changeset 87511 in vbox for trunk/src/VBox/VMM/include

Timestamp:

Feb 1, 2021 3:48:11 PM (4 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

142535

Message:

VMM/HMSVM: Moving some SVM stuff to HMR0PERVM. Removed 3 unused HM::svm members related to I/O bitmap. bugref:9217

File:

• trunk/src/VBox/VMM/include/HMInternal.h (modified) (4 diffs)

trunk/src/VBox/VMM/include/HMInternal.h

@@ -595 +595 @@
     struct
     {
-        /** Set by the ring-0 side of HM to indicate SVM is supported by the
-         *  CPU. */
+        /** Set by the ring-0 side of HM to indicate SVM is supported by the CPU. */
         bool                        fSupported;
         /** Set when we've enabled SVM. */
         bool                        fEnabled;
-        /** Set if erratum 170 affects the AMD cpu. */
-        bool                        fAlwaysFlushTLB;
-        /** Set when the hack to ignore VERR_SVM_IN_USE is active. */
+        /** Set when the hack to ignore VERR_SVM_IN_USE is active.
+         * @todo Safe?  */
         bool                        fIgnoreInUseError;
         /** Whether to use virtualized VMSAVE/VMLOAD feature. */
@@ -610 +608 @@
         /** Whether to use LBR virtualization feature. */
         bool                        fLbrVirt;
-        uint8_t                     u8Alignment0[1];
-
-        /** Physical address of the IO bitmap (12kb). */
-        RTHCPHYS                    HCPhysIOBitmap;
-        /** R0 memory object for the IO bitmap (12kb). */
-        RTR0MEMOBJ                  hMemObjIOBitmap;
-        /** Virtual address of the IO bitmap. */
-        R0PTRTYPE(void *)           pvIOBitmap;
+        uint8_t                     u8Alignment0[2];
 
         /* HWCR MSR (for diagnostics) */
@@ -624 +615 @@
         /** SVM revision. */
         uint32_t                    u32Rev;
-        /** SVM feature bits from cpuid 0x8000000a */
-        uint32_t                    u32Features;
+        /** SVM feature bits from cpuid 0x8000000a, ring-3 copy. */
+        uint32_t                    fFeaturesForRing3;
 
         /** Pause filter counter. */
@@ -660 +651 @@
 AssertCompileMemberAlignment(HM, vmx,                 8);
 AssertCompileMemberAlignment(HM, svm,                 8);
+
+
+/**
+ * Per-VM ring-0 instance data for HM.
+ */
+typedef struct HMR0PERVM
+{
+    /** SVM specific data. */
+    struct HMR0SVMVM
+    {
+        /** Set if erratum 170 affects the AMD cpu. */
+        bool                        fAlwaysFlushTLB;
+        bool                        afAlignment0[3];
+        /** SVM feature bits from cpuid 0x8000000a, safe ring-0 copy. */
+        uint32_t                    fFeatures;
+    } svm;
+} HMR0PERVM;
+/** Pointer to HM's per-VM ring-0 instance data. */
+typedef HMR0PERVM *PHMR0PERVM;