Changeset 87518 in vbox for trunk/src/VBox/VMM/VMMR0

Timestamp:

Feb 1, 2021 9:01:16 PM (4 years ago)

Author:

vboxsync

Message:

VMM/HM: Make a R0 copy of HM::fAllow64BitGuests on setup (for VT-x). bugref:9217

Location:

trunk/src/VBox/VMM/VMMR0

Files:

• HMSVMR0.cpp (modified) (2 diffs)
• HMVMXR0.cpp (modified) (10 diffs)

trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

@@ -990 +990 @@
 
     /*
-     * Validate some parameters.
+     * Validate and copy over some parameters.
      */
     AssertReturn(pVM->hm.s.svm.fSupported, VERR_INCOMPATIBLE_CONFIG);
@@ -998 +998 @@
                  VERR_INCOMPATIBLE_CONFIG);
     pVM->hmr0.s.fNestedPaging = fNestedPaging;
+    pVM->hmr0.s.fAllow64BitGuests = pVM->hm.s.fAllow64BitGuestsCfg;
 
     /*

trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

@@ -2504 +2504 @@
     {
         Assert(!(pVCpu->hmr0.s.vmx.fLazyMsrs & VMX_LAZY_MSRS_LOADED_GUEST));  /* Guest MSRs better not be loaded now. */
-        if (pVCpu->CTX_SUFF(pVM)->hm.s.fAllow64BitGuests)
+        if (pVCpu->CTX_SUFF(pVM)->hmr0.s.fAllow64BitGuests)
         {
             pVCpu->hmr0.s.vmx.u64HostMsrLStar        = ASMRdMsr(MSR_K8_LSTAR);
@@ -2526 +2526 @@
 static bool hmR0VmxIsLazyGuestMsr(PCVMCPUCC pVCpu, uint32_t idMsr)
 {
-    if (pVCpu->CTX_SUFF(pVM)->hm.s.fAllow64BitGuests)
+    if (pVCpu->CTX_SUFF(pVM)->hmr0.s.fAllow64BitGuests)
     {
         switch (idMsr)
@@ -2559 +2559 @@
 
     Assert(pVCpu->hmr0.s.vmx.fLazyMsrs & VMX_LAZY_MSRS_SAVED_HOST);
-    if (pVCpu->CTX_SUFF(pVM)->hm.s.fAllow64BitGuests)
+    if (pVCpu->CTX_SUFF(pVM)->hmr0.s.fAllow64BitGuests)
     {
         /*
@@ -2615 +2615 @@
     {
         Assert(pVCpu->hmr0.s.vmx.fLazyMsrs & VMX_LAZY_MSRS_SAVED_HOST);
-        if (pVCpu->CTX_SUFF(pVM)->hm.s.fAllow64BitGuests)
+        if (pVCpu->CTX_SUFF(pVM)->hmr0.s.fAllow64BitGuests)
         {
             ASMWrMsr(MSR_K8_LSTAR,          pVCpu->hmr0.s.vmx.u64HostMsrLStar);
@@ -3774 +3774 @@
      * required for 64-bit guests.
      */
-    if (pVM->hm.s.fAllow64BitGuests)
+    if (pVM->hmr0.s.fAllow64BitGuests)
     {
         hmR0VmxSetMsrPermission(pVCpu, pVmcsInfo, false, MSR_K8_LSTAR,          VMXMSRPM_ALLOW_RD_WR);
@@ -3990 +3990 @@
         /* Some 32-bit CPUs do not support CR8 load/store exiting as MOV CR8 is
            invalid on 32-bit Intel CPUs. Set this control only for 64-bit guests. */
-        if (pVM->hm.s.fAllow64BitGuests)
-        {
+        if (pVM->hmr0.s.fAllow64BitGuests)
             fVal |= VMX_PROC_CTLS_CR8_STORE_EXIT             /* CR8 reads cause a VM-exit. */
                  |  VMX_PROC_CTLS_CR8_LOAD_EXIT;             /* CR8 writes cause a VM-exit. */
-        }
     }
 
@@ -4538 +4536 @@
                  VERR_INCOMPATIBLE_CONFIG);
     pVM->hmr0.s.fNestedPaging = fNestedPaging;
+    pVM->hmr0.s.fAllow64BitGuests = pVM->hm.s.fAllow64BitGuestsCfg;
 
     /* Initialize these always, see hmR3InitFinalizeR0().*/
@@ -7754 +7753 @@
             if (fWhat & CPUMCTX_EXTRN_KERNEL_GS_BASE)
             {
-                if (   pVM->hm.s.fAllow64BitGuests
+                if (   pVM->hmr0.s.fAllow64BitGuests
                     && (pVCpu->hmr0.s.vmx.fLazyMsrs & VMX_LAZY_MSRS_LOADED_GUEST))
                     pCtx->msrKERNELGSBASE = ASMRdMsr(MSR_K8_KERNEL_GS_BASE);
@@ -7761 +7760 @@
             if (fWhat & CPUMCTX_EXTRN_SYSCALL_MSRS)
             {
-                if (   pVM->hm.s.fAllow64BitGuests
+                if (   pVM->hmr0.s.fAllow64BitGuests
                     && (pVCpu->hmr0.s.vmx.fLazyMsrs & VMX_LAZY_MSRS_LOADED_GUEST))
                 {
@@ -10596 +10595 @@
          * be taken care of by EPT/shadow paging.
          */
-        if (pVM->hm.s.fAllow64BitGuests)
-        {
+        if (pVM->hmr0.s.fAllow64BitGuests)
             u32ProcCtls |= VMX_PROC_CTLS_CR8_STORE_EXIT
                         |  VMX_PROC_CTLS_CR8_LOAD_EXIT;
-        }
     }