Changeset 87519 in vbox for trunk/src/VBox/VMM/VMMR3

Timestamp:

Feb 1, 2021 9:17:51 PM (4 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

142544

Message:

VMM/HM: Make a R0 copy of HM::cMaxResumeLoopsCfg and do proper validation. bugref:9217

Location:

trunk/src/VBox/VMM/VMMR3

Files:

• APIC.cpp (modified) (1 diff)
• HM.cpp (modified) (5 diffs)

trunk/src/VBox/VMM/VMMR3/APIC.cpp

@@ -1383 +1383 @@
     pApic->fSupportsTscDeadline = RT_BOOL(CpuLeaf.uEcx & X86_CPUID_FEATURE_ECX_TSCDEADL);
     pApic->fPostedIntrsEnabled  = HMR3IsPostedIntrsEnabled(pVM->pUVM);
-    pApic->fVirtApicRegsEnabled = HMR3IsVirtApicRegsEnabled(pVM->pUVM);
+    pApic->fVirtApicRegsEnabled = HMR3AreVirtApicRegsEnabled(pVM->pUVM);
 
     LogRel(("APIC: fPostedIntrsEnabled=%RTbool fVirtApicRegsEnabled=%RTbool fSupportsTscDeadline=%RTbool\n",

trunk/src/VBox/VMM/VMMR3/HM.cpp

@@ -445 +445 @@
      * ring-3.  The return value of RTThreadPreemptIsPendingTrusty in ring-0
      * determines the default value. */
-    rc = CFGMR3QueryU32Def(pCfgHm, "MaxResumeLoops", &pVM->hm.s.cMaxResumeLoops, 0 /* set by R0 later */);
+    rc = CFGMR3QueryU32Def(pCfgHm, "MaxResumeLoops", &pVM->hm.s.cMaxResumeLoopsCfg, 0 /* set by R0 later */);
     AssertLogRelRCReturn(rc, rc);
 
@@ -1528 +1528 @@
 
     LogRel(("HM: Using VT-x implementation 3.0\n"));
-    LogRel(("HM: Max resume loops                  = %u\n",     pVM->hm.s.cMaxResumeLoops));
+    LogRel(("HM: Max resume loops                  = %u\n",     pVM->hm.s.cMaxResumeLoopsCfg));
     LogRel(("HM: Host CR4                          = %#RX64\n", pVM->hm.s.vmx.u64HostCr4));
     LogRel(("HM: Host EFER                         = %#RX64\n", pVM->hm.s.vmx.u64HostMsrEfer));
@@ -1797 +1797 @@
     if (HMIsSubjectToSvmErratum170(&u32Family, &u32Model, &u32Stepping))
         LogRel(("HM: AMD Cpu with erratum 170 family %#x model %#x stepping %#x\n", u32Family, u32Model, u32Stepping));
-    LogRel(("HM: Max resume loops                  = %u\n",     pVM->hm.s.cMaxResumeLoops));
+    LogRel(("HM: Max resume loops                  = %u\n",     pVM->hm.s.cMaxResumeLoopsCfg));
     LogRel(("HM: AMD HWCR MSR                      = %#RX64\n", pVM->hm.s.svm.u64MsrHwcr));
     LogRel(("HM: AMD-V revision                    = %#x\n",    pVM->hm.s.svm.u32Rev));
@@ -2810 +2810 @@
 
 /**
- * Checks if virtualized APIC registers is enabled.
+ * Checks if virtualized APIC registers are enabled.
  *
  * When enabled this feature allows the hardware to access most of the
@@ -2820 +2820 @@
  * @param   pUVM        The user mode VM handle.
  */
-VMMR3DECL(bool) HMR3IsVirtApicRegsEnabled(PUVM pUVM)
+VMMR3DECL(bool) HMR3AreVirtApicRegsEnabled(PUVM pUVM)
 {
     UVM_ASSERT_VALID_EXT_RETURN(pUVM, false);