Changeset 87525 in vbox for trunk/src

Timestamp:

Feb 2, 2021 5:35:56 AM (4 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

142550

Message:

AMD IOMMU: bugref:9654 IOTLB cache bits.

File:

• trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp (modified) (7 diffs)

trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp

@@ -135 +135 @@
     /** The number of offset bits in the system physical address. */
     uint8_t         cShift;
-    /** The I/O permissions allowed by the translation (IOMMU_IO_PERM_XXX). */
-    uint8_t         fIoPerm;
+    /** The I/O permissions allowed for this translation (IOMMU_IO_PERM_XXX). */
+    uint8_t         fPerm;
     /** Padding. */
     uint8_t         abPadding[2];
@@ -638 +638 @@
     Assert(pWalkResult);
     Assert(pWalkResult->cShift < 63);
-    Assert(pWalkResult->fIoPerm != IOMMU_IO_PERM_NONE);
+    Assert(pWalkResult->fPerm != IOMMU_IO_PERM_NONE);
 
     /*
@@ -2700 +2700 @@
         pWalkResult->GCPhysSpa = uIova;
         pWalkResult->cShift    = 0;
-        pWalkResult->fIoPerm   = fDtePerm;
+        pWalkResult->fPerm     = fDtePerm;
         return VINF_IOMMU_ADDR_TRANSLATION_DISABLED;
     }
@@ -2825 +2825 @@
             pWalkResult->GCPhysSpa = PtEntity.u64 & IOMMU_PTENTITY_ADDR_MASK;
             pWalkResult->cShift    = X86_PAGE_4K_SHIFT;
-            pWalkResult->fIoPerm   = fPtePerm;
+            pWalkResult->fPerm     = fPtePerm;
             return VINF_SUCCESS;
         }
@@ -2843 +2843 @@
                 pWalkResult->GCPhysSpa = GCPhysPte;
                 pWalkResult->cShift    = cShift;
-                pWalkResult->fIoPerm   = fPtePerm;
+                pWalkResult->fPerm     = fPtePerm;
                 return VINF_SUCCESS;
             }
@@ -2956 +2956 @@
 {
 #ifdef IOMMU_WITH_IOTLBE_CACHE
-    if (   pWalkResultPrev->cShift  == pWalkResult->cShift
-        && pWalkResultPrev->fIoPerm == pWalkResult->fIoPerm
+    if (   pWalkResultPrev->cShift == pWalkResult->cShift
+        && pWalkResultPrev->fPerm  == pWalkResult->fPerm
         && iommuAmdDteLookupIsAddrPhysContig(pWalkResultPrev, pWalkResult))
         return true;
@@ -3086 +3086 @@
                         Assert(WalkResult.cShift    == 0);
                         Assert(WalkResult.GCPhysSpa == uIova);
-                        Assert((WalkResult.fIoPerm & fAccess) == fAccess);
+                        Assert((WalkResult.fPerm & fAccess) == fAccess);
                         /** @todo IOMMU: Add to IOLTB cache. */
                     }