Index: trunk/src/VBox/VMM/VMMR0/HMR0.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMR0/HMR0.cpp	(revision 87535)
+++ trunk/src/VBox/VMM/VMMR0/HMR0.cpp	(revision 87536)
@@ -96,8 +96,4 @@
 static HMR0VTABLE   g_HmR0Ops;
 
-/** Set if VT-x (VMX) is supported by the CPU. */
-bool                g_fHmVmxSupported = false;
-/** Set if AMD-V is supported by the CPU. */
-bool                g_fHmSvmSupported = false;
 /** Maximum allowed ASID/VPID (inclusive).
  * @todo r=bird: This is exclusive for VT-x according to source code comment.
@@ -107,4 +103,28 @@
 
 
+/** Set if VT-x (VMX) is supported by the CPU. */
+bool                g_fHmVmxSupported = false;
+/** Whether we're using the preemption timer or not. */
+bool                g_fHmVmxUsePreemptTimer;
+/** The shift mask employed by the VMX-Preemption timer. */
+uint8_t             g_cHmVmxPreemptTimerShift;
+/** Host CR4 value (set by ring-0 VMX init) */
+uint64_t            g_uHmVmxHostCr4;
+/** Host EFER value (set by ring-0 VMX init) */
+uint64_t            g_uHmVmxHostMsrEfer;
+/** Host SMM monitor control (used for logging/diagnostics) */
+uint64_t            g_uHmVmxHostSmmMonitorCtl;
+
+/** Set if AMD-V is supported by the CPU. */
+bool                g_fHmSvmSupported = false;
+/** SVM revision. */
+uint32_t            g_uHmSvmRev;
+/** SVM feature bits from cpuid 0x8000000a */
+uint32_t            g_uHmSvmFeatures;
+
+/** MSRs. */
+SUPHWVIRTMSRS       g_HmMsrs;
+
+
 /**
  * Global data.
@@ -123,16 +143,6 @@
             struct
             {
-                /** Host CR4 value (set by ring-0 VMX init) */
-                uint64_t                    u64HostCr4;
-                /** Host EFER value (set by ring-0 VMX init) */
-                uint64_t                    u64HostMsrEfer;
-                /** Host SMM monitor control (used for logging/diagnostics) */
-                uint64_t                    u64HostSmmMonitorCtl;
                 /** Last instruction error. */
                 uint32_t                    ulLastInstrError;
-                /** The shift mask employed by the VMX-Preemption timer. */
-                uint8_t                     cPreemptTimerShift;
-                /** Whether we're using the preemption timer or not. */
-                bool                        fUsePreemptTimer;
                 /** Whether we're using SUPR0EnableVTx or not. */
                 bool                        fUsingSUPR0EnableVTx;
@@ -141,16 +151,5 @@
                 bool                        fCalledSUPR0EnableVTx;
             } vmx;
-
-            /** AMD-V data. */
-            struct
-            {
-                /** SVM revision. */
-                uint32_t                    u32Rev;
-                /** SVM feature bits from cpuid 0x8000000a */
-                uint32_t                    u32Features;
-            } svm;
         } u;
-        /** MSRs. */
-        SUPHWVIRTMSRS               Msrs;
     } hwvirt;
 
@@ -371,5 +370,5 @@
 {
     /* Read this MSR now as it may be useful for error reporting when initializing VT-x fails. */
-    g_HmR0.hwvirt.Msrs.u.vmx.u64FeatCtrl = ASMRdMsr(MSR_IA32_FEATURE_CONTROL);
+    g_HmMsrs.u.vmx.u64FeatCtrl = ASMRdMsr(MSR_IA32_FEATURE_CONTROL);
 
     /*
@@ -403,9 +402,9 @@
     {
         /* Read CR4 and EFER for logging/diagnostic purposes. */
-        g_HmR0.hwvirt.u.vmx.u64HostCr4     = ASMGetCR4();
-        g_HmR0.hwvirt.u.vmx.u64HostMsrEfer = ASMRdMsr(MSR_K6_EFER);
+        g_uHmVmxHostCr4     = ASMGetCR4();
+        g_uHmVmxHostMsrEfer = ASMRdMsr(MSR_K6_EFER);
 
         /* Get VMX MSRs for determining VMX features we can ultimately use. */
-        SUPR0GetHwvirtMsrs(&g_HmR0.hwvirt.Msrs, SUPVTCAPS_VT_X, false /* fForce */);
+        SUPR0GetHwvirtMsrs(&g_HmMsrs, SUPVTCAPS_VT_X, false /* fForce */);
 
         /*
@@ -414,7 +413,7 @@
          * table 35-2 says that this MSR is available if either VMX or SMX is supported.
          */
-        uint64_t const uVmxBasicMsr = g_HmR0.hwvirt.Msrs.u.vmx.u64Basic;
+        uint64_t const uVmxBasicMsr = g_HmMsrs.u.vmx.u64Basic;
         if (RT_BF_GET(uVmxBasicMsr, VMX_BF_BASIC_DUAL_MON))
-            g_HmR0.hwvirt.u.vmx.u64HostSmmMonitorCtl = ASMRdMsr(MSR_IA32_SMM_MONITOR_CTL);
+            g_uHmVmxHostSmmMonitorCtl = ASMRdMsr(MSR_IA32_SMM_MONITOR_CTL);
 
         /* Initialize VPID - 16 bits ASID. */
@@ -501,12 +500,12 @@
                  */
                 VMXCTLSMSR PinCtls;
-                PinCtls.u = g_HmR0.hwvirt.Msrs.u.vmx.u64PinCtls;
+                PinCtls.u = g_HmMsrs.u.vmx.u64PinCtls;
                 if (PinCtls.n.allowed1 & VMX_PIN_CTLS_PREEMPT_TIMER)
                 {
-                    uint64_t const uVmxMiscMsr = g_HmR0.hwvirt.Msrs.u.vmx.u64Misc;
-                    g_HmR0.hwvirt.u.vmx.fUsePreemptTimer   = true;
-                    g_HmR0.hwvirt.u.vmx.cPreemptTimerShift = RT_BF_GET(uVmxMiscMsr, VMX_BF_MISC_PREEMPT_TIMER_TSC);
+                    uint64_t const uVmxMiscMsr = g_HmMsrs.u.vmx.u64Misc;
+                    g_fHmVmxUsePreemptTimer   = true;
+                    g_cHmVmxPreemptTimerShift = RT_BF_GET(uVmxMiscMsr, VMX_BF_MISC_PREEMPT_TIMER_TSC);
                     if (HMIsSubjectToVmxPreemptTimerErratum())
-                        g_HmR0.hwvirt.u.vmx.cPreemptTimerShift = 0; /* This is about right most of the time here. */
+                        g_cHmVmxPreemptTimerShift = 0; /* This is about right most of the time here. */
                 }
             }
@@ -564,5 +563,5 @@
         /* Query AMD features. */
         uint32_t u32Dummy;
-        ASMCpuId(0x8000000a, &g_HmR0.hwvirt.u.svm.u32Rev, &g_uHmMaxAsid, &u32Dummy, &g_HmR0.hwvirt.u.svm.u32Features);
+        ASMCpuId(0x8000000a, &g_uHmSvmRev, &g_uHmMaxAsid, &u32Dummy, &g_uHmSvmFeatures);
 
         /*
@@ -582,5 +581,5 @@
         if (RT_SUCCESS(rc))
         {
-            SUPR0GetHwvirtMsrs(&g_HmR0.hwvirt.Msrs, SUPVTCAPS_AMD_V, false /* fForce */);
+            SUPR0GetHwvirtMsrs(&g_HmMsrs, SUPVTCAPS_AMD_V, false /* fForce */);
             g_fHmSvmSupported = true;
         }
@@ -811,9 +810,9 @@
     if (   g_fHmVmxSupported
         && g_HmR0.hwvirt.u.vmx.fUsingSUPR0EnableVTx)
-        rc = g_HmR0Ops.pfnEnableCpu(pHostCpu, pVM, NULL /* pvCpuPage */, NIL_RTHCPHYS, true, &g_HmR0.hwvirt.Msrs);
+        rc = g_HmR0Ops.pfnEnableCpu(pHostCpu, pVM, NULL /* pvCpuPage */, NIL_RTHCPHYS, true, &g_HmMsrs);
     else
     {
         AssertLogRelMsgReturn(pHostCpu->hMemObj != NIL_RTR0MEMOBJ, ("hmR0EnableCpu failed idCpu=%u.\n", idCpu), VERR_HM_IPE_1);
-        rc = g_HmR0Ops.pfnEnableCpu(pHostCpu, pVM, pHostCpu->pvMemObj, pHostCpu->HCPhysMemObj, false, &g_HmR0.hwvirt.Msrs);
+        rc = g_HmR0Ops.pfnEnableCpu(pHostCpu, pVM, pHostCpu->pvMemObj, pHostCpu->HCPhysMemObj, false, &g_HmMsrs);
     }
     if (RT_SUCCESS(rc))
@@ -1180,10 +1179,10 @@
     if (pVM->hm.s.vmx.fSupported)
     {
-        pVM->hm.s.vmx.fUsePreemptTimer     &= g_HmR0.hwvirt.u.vmx.fUsePreemptTimer; /* Can be overridden by CFGM in HMR3Init(). */
-        pVM->hm.s.vmx.cPreemptTimerShift    = g_HmR0.hwvirt.u.vmx.cPreemptTimerShift;
-        pVM->hm.s.vmx.u64HostCr4            = g_HmR0.hwvirt.u.vmx.u64HostCr4;
-        pVM->hm.s.vmx.u64HostMsrEfer        = g_HmR0.hwvirt.u.vmx.u64HostMsrEfer;
-        pVM->hm.s.vmx.u64HostSmmMonitorCtl  = g_HmR0.hwvirt.u.vmx.u64HostSmmMonitorCtl;
-        HMGetVmxMsrsFromHwvirtMsrs(&g_HmR0.hwvirt.Msrs, &pVM->hm.s.vmx.Msrs);
+        pVM->hm.s.vmx.fUsePreemptTimer     &= g_fHmVmxUsePreemptTimer; /* Can be overridden by CFGM in HMR3Init(). */
+        pVM->hm.s.vmx.cPreemptTimerShift    = g_cHmVmxPreemptTimerShift;
+        pVM->hm.s.vmx.u64HostCr4            = g_uHmVmxHostCr4;
+        pVM->hm.s.vmx.u64HostMsrEfer        = g_uHmVmxHostMsrEfer;
+        pVM->hm.s.vmx.u64HostSmmMonitorCtl  = g_uHmVmxHostSmmMonitorCtl;
+        HMGetVmxMsrsFromHwvirtMsrs(&g_HmMsrs, &pVM->hm.s.vmx.Msrs);
         /* If you need to tweak host MSRs for testing VMX R0 code, do it here. */
 
@@ -1221,7 +1220,7 @@
     else if (pVM->hm.s.svm.fSupported)
     {
-        pVM->hm.s.svm.u32Rev            = g_HmR0.hwvirt.u.svm.u32Rev;
-        pVM->hm.s.svm.fFeaturesForRing3 = pVM->hmr0.s.svm.fFeatures = g_HmR0.hwvirt.u.svm.u32Features;
-        pVM->hm.s.svm.u64MsrHwcr        = g_HmR0.hwvirt.Msrs.u.svm.u64MsrHwcr;
+        pVM->hm.s.svm.u32Rev            = g_uHmSvmRev;
+        pVM->hm.s.svm.fFeaturesForRing3 = pVM->hmr0.s.svm.fFeatures = g_uHmSvmFeatures;
+        pVM->hm.s.svm.u64MsrHwcr        = g_HmMsrs.u.svm.u64MsrHwcr;
         /* If you need to tweak host MSRs for testing SVM R0 code, do it here. */
     }
