VirtualBox

Changeset 87546 in vbox


Ignore:
Timestamp:
Feb 2, 2021 5:21:19 PM (4 years ago)
Author:
vboxsync
Message:

VMM/HMVMX: Moved VPID and TLB flushing members from HM::vmx to HMR0PERVM::vmx. bugref:9217

Location:
trunk/src/VBox/VMM
Files:
4 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMR0/HMR0.cpp

    r87543 r87546  
    11711171        /* Enable VPID if supported and configured. */
    11721172        if (g_HmMsrs.u.vmx.ProcCtls2.n.allowed1 & VMX_PROC_CTLS2_VPID)
    1173             pVM->hm.s.vmx.fVpid = pVM->hm.s.vmx.fAllowVpid; /* Can be overridden by CFGM in HMR3Init(). */
     1173            pVM->hm.s.vmx.fVpidForRing3
     1174                = pVM->hmr0.s.vmx.fVpid = pVM->hm.s.vmx.fAllowVpid; /* Can be overridden by CFGM in HMR3Init(). */
    11741175
    11751176        /* Use VMCS shadowing if supported. */

  • trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

    r87543 r87546  
    28932893static void hmR0VmxFlushVpid(PVMCPUCC pVCpu, VMXTLBFLUSHVPID enmTlbFlush, RTGCPTR GCPtr)
    28942894{
    2895     Assert(pVCpu->CTX_SUFF(pVM)->hm.s.vmx.fVpid);
     2895    Assert(pVCpu->CTX_SUFF(pVM)->hmr0.s.vmx.fVpid);
    28962896
    28972897    uint64_t au64Descriptor[2];
    … …  
    29442944         */
    29452945        PVMCC pVM = pVCpu->CTX_SUFF(pVM);
    2946         if (pVM->hm.s.vmx.fVpid)
    2947         {
    2948             bool fVpidFlush = RT_BOOL(g_HmMsrs.u.vmx.u64EptVpidCaps & MSR_IA32_VMX_EPT_VPID_CAP_INVVPID_INDIV_ADDR);
    2949             if (fVpidFlush)
     2946        if (pVM->hmr0.s.vmx.fVpid)
     2947        {
     2948            if (g_HmMsrs.u.vmx.u64EptVpidCaps & MSR_IA32_VMX_EPT_VPID_CAP_INVVPID_INDIV_ADDR)
    29502949            {
    29512950                hmR0VmxFlushVpid(pVCpu, VMXTLBFLUSHVPID_INDIV_ADDR, GCVirt);
    … …  
    30193018
    30203019    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
    3021     AssertMsg(pVM->hmr0.s.fNestedPaging && pVM->hm.s.vmx.fVpid,
     3020    AssertMsg(pVM->hmr0.s.fNestedPaging && pVM->hmr0.s.vmx.fVpid,
    30223021              ("hmR0VmxFlushTaggedTlbBoth cannot be invoked unless NestedPaging & VPID are enabled."
    3023                "fNestedPaging=%RTbool fVpid=%RTbool", pVM->hmr0.s.fNestedPaging, pVM->hm.s.vmx.fVpid));
     3022               "fNestedPaging=%RTbool fVpid=%RTbool", pVM->hmr0.s.fNestedPaging, pVM->hmr0.s.vmx.fVpid));
    30243023
    30253024    /*
    … …  
    30483047         * invalidated. We don't need to flush-by-VPID here as flushing by EPT covers it. See @bugref{6568}.
    30493048         */
    3050         hmR0VmxFlushEpt(pVCpu, pVmcsInfo, pVM->hm.s.vmx.enmTlbFlushEpt);
     3049        hmR0VmxFlushEpt(pVCpu, pVmcsInfo, pVM->hmr0.s.vmx.enmTlbFlushEpt);
    30513050        STAM_COUNTER_INC(&pVCpu->hm.s.StatFlushTlbWorldSwitch);
    30523051        HMVMX_SET_TAGGED_TLB_FLUSHED();
    … …  
    30643063         * See Intel spec. 28.3.2 "Creating and Using Cached Translation Information".
    30653064         */
    3066         hmR0VmxFlushEpt(pVCpu, pVmcsInfo, pVM->hm.s.vmx.enmTlbFlushEpt);
     3065        hmR0VmxFlushEpt(pVCpu, pVmcsInfo, pVM->hmr0.s.vmx.enmTlbFlushEpt);
    30673066        STAM_COUNTER_INC(&pVCpu->hm.s.StatFlushTlb);
    30683067        HMVMX_SET_TAGGED_TLB_FLUSHED();
    … …  
    30763075         * See Intel spec. 28.3.3.4 "Guidelines for Use of the INVEPT Instruction".
    30773076         */
    3078         hmR0VmxFlushEpt(pVCpu, pVmcsInfo, pVM->hm.s.vmx.enmTlbFlushEpt);
     3077        hmR0VmxFlushEpt(pVCpu, pVmcsInfo, pVM->hmr0.s.vmx.enmTlbFlushEpt);
    30793078        pVCpu->hm.s.vmx.fSwitchedNstGstFlushTlb = false;
    30803079        STAM_COUNTER_INC(&pVCpu->hm.s.StatFlushTlbNstGst);
    … …  
    31193118    Assert(pHostCpu->idCpu != NIL_RTCPUID);
    31203119    AssertMsg(pVCpu->CTX_SUFF(pVM)->hmr0.s.fNestedPaging, ("hmR0VmxFlushTaggedTlbEpt cannot be invoked without NestedPaging."));
    3121     AssertMsg(!pVCpu->CTX_SUFF(pVM)->hm.s.vmx.fVpid, ("hmR0VmxFlushTaggedTlbEpt cannot be invoked with VPID."));
     3120    AssertMsg(!pVCpu->CTX_SUFF(pVM)->hmr0.s.vmx.fVpid, ("hmR0VmxFlushTaggedTlbEpt cannot be invoked with VPID."));
    31223121
    31233122    /*
    … …  
    31523151    if (pVCpu->hmr0.s.fForceTLBFlush)
    31533152    {
    3154         hmR0VmxFlushEpt(pVCpu, pVmcsInfo, pVCpu->CTX_SUFF(pVM)->hm.s.vmx.enmTlbFlushEpt);
     3153        hmR0VmxFlushEpt(pVCpu, pVmcsInfo, pVCpu->CTX_SUFF(pVM)->hmr0.s.vmx.enmTlbFlushEpt);
    31553154        pVCpu->hmr0.s.fForceTLBFlush = false;
    31563155    }
    … …  
    31713170    AssertPtr(pHostCpu);
    31723171    Assert(pHostCpu->idCpu != NIL_RTCPUID);
    3173     AssertMsg(pVCpu->CTX_SUFF(pVM)->hm.s.vmx.fVpid, ("hmR0VmxFlushTlbVpid cannot be invoked without VPID."));
     3172    AssertMsg(pVCpu->CTX_SUFF(pVM)->hmr0.s.vmx.fVpid, ("hmR0VmxFlushTlbVpid cannot be invoked without VPID."));
    31743173    AssertMsg(!pVCpu->CTX_SUFF(pVM)->hmr0.s.fNestedPaging, ("hmR0VmxFlushTlbVpid cannot be invoked with NestedPaging"));
    31753174
    … …  
    32253224        if (pHostCpu->fFlushAsidBeforeUse)
    32263225        {
    3227             if (pVM->hm.s.vmx.enmTlbFlushVpid == VMXTLBFLUSHVPID_SINGLE_CONTEXT)
     3226            if (pVM->hmr0.s.vmx.enmTlbFlushVpid == VMXTLBFLUSHVPID_SINGLE_CONTEXT)
    32283227                hmR0VmxFlushVpid(pVCpu, VMXTLBFLUSHVPID_SINGLE_CONTEXT, 0 /* GCPtr */);
    3229             else if (pVM->hm.s.vmx.enmTlbFlushVpid == VMXTLBFLUSHVPID_ALL_CONTEXTS)
     3228            else if (pVM->hmr0.s.vmx.enmTlbFlushVpid == VMXTLBFLUSHVPID_ALL_CONTEXTS)
    32303229            {
    32313230                hmR0VmxFlushVpid(pVCpu, VMXTLBFLUSHVPID_ALL_CONTEXTS, 0 /* GCPtr */);
    … …  
    32683267#endif
    32693268    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
    3270     switch (pVM->hm.s.vmx.enmTlbFlushType)
     3269    switch (pVM->hmr0.s.vmx.enmTlbFlushType)
    32713270    {
    32723271        case VMXTLBFLUSHTYPE_EPT_VPID: hmR0VmxFlushTaggedTlbBoth(pHostCpu, pVCpu, pVmcsInfo); break;
    … …  
    33013300        {
    33023301            if (g_HmMsrs.u.vmx.u64EptVpidCaps & MSR_IA32_VMX_EPT_VPID_CAP_INVEPT_SINGLE_CONTEXT)
    3303                 pVM->hm.s.vmx.enmTlbFlushEpt = VMXTLBFLUSHEPT_SINGLE_CONTEXT;
     3302                pVM->hmr0.s.vmx.enmTlbFlushEpt = VMXTLBFLUSHEPT_SINGLE_CONTEXT;
    33043303            else if (g_HmMsrs.u.vmx.u64EptVpidCaps & MSR_IA32_VMX_EPT_VPID_CAP_INVEPT_ALL_CONTEXTS)
    3305                 pVM->hm.s.vmx.enmTlbFlushEpt = VMXTLBFLUSHEPT_ALL_CONTEXTS;
     3304                pVM->hmr0.s.vmx.enmTlbFlushEpt = VMXTLBFLUSHEPT_ALL_CONTEXTS;
    33063305            else
    33073306            {
    33083307                /* Shouldn't happen. EPT is supported but no suitable flush-types supported. */
    3309                 pVM->hm.s.vmx.enmTlbFlushEpt = VMXTLBFLUSHEPT_NOT_SUPPORTED;
     3308                pVM->hmr0.s.vmx.enmTlbFlushEpt = VMXTLBFLUSHEPT_NOT_SUPPORTED;
    33103309                VMCC_GET_CPU_0(pVM)->hm.s.u32HMError = VMX_UFC_EPT_FLUSH_TYPE_UNSUPPORTED;
    33113310                return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
    … …  
    33153314            if (RT_UNLIKELY(!(g_HmMsrs.u.vmx.u64EptVpidCaps & MSR_IA32_VMX_EPT_VPID_CAP_EMT_WB)))
    33163315            {
    3317                 pVM->hm.s.vmx.enmTlbFlushEpt = VMXTLBFLUSHEPT_NOT_SUPPORTED;
     3316                pVM->hmr0.s.vmx.enmTlbFlushEpt = VMXTLBFLUSHEPT_NOT_SUPPORTED;
    33183317                VMCC_GET_CPU_0(pVM)->hm.s.u32HMError = VMX_UFC_EPT_MEM_TYPE_NOT_WB;
    33193318                return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
    … …  
    33233322            if (RT_UNLIKELY(!(g_HmMsrs.u.vmx.u64EptVpidCaps & MSR_IA32_VMX_EPT_VPID_CAP_PAGE_WALK_LENGTH_4)))
    33243323            {
    3325                 pVM->hm.s.vmx.enmTlbFlushEpt = VMXTLBFLUSHEPT_NOT_SUPPORTED;
     3324                pVM->hmr0.s.vmx.enmTlbFlushEpt = VMXTLBFLUSHEPT_NOT_SUPPORTED;
    33263325                VMCC_GET_CPU_0(pVM)->hm.s.u32HMError = VMX_UFC_EPT_PAGE_WALK_LENGTH_UNSUPPORTED;
    33273326                return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
    … …  
    33313330        {
    33323331            /* Shouldn't happen. EPT is supported but INVEPT instruction is not supported. */
    3333             pVM->hm.s.vmx.enmTlbFlushEpt = VMXTLBFLUSHEPT_NOT_SUPPORTED;
     3332            pVM->hmr0.s.vmx.enmTlbFlushEpt = VMXTLBFLUSHEPT_NOT_SUPPORTED;
    33343333            VMCC_GET_CPU_0(pVM)->hm.s.u32HMError = VMX_UFC_EPT_INVEPT_UNAVAILABLE;
    33353334            return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
    … …  
    33403339     * Determine optimal flush type for VPID.
    33413340     */
    3342     if (pVM->hm.s.vmx.fVpid)
     3341    if (pVM->hmr0.s.vmx.fVpid)
    33433342    {
    33443343        if (g_HmMsrs.u.vmx.u64EptVpidCaps & MSR_IA32_VMX_EPT_VPID_CAP_INVVPID)
    33453344        {
    33463345            if (g_HmMsrs.u.vmx.u64EptVpidCaps & MSR_IA32_VMX_EPT_VPID_CAP_INVVPID_SINGLE_CONTEXT)
    3347                 pVM->hm.s.vmx.enmTlbFlushVpid = VMXTLBFLUSHVPID_SINGLE_CONTEXT;
     3346                pVM->hmr0.s.vmx.enmTlbFlushVpid = VMXTLBFLUSHVPID_SINGLE_CONTEXT;
    33483347            else if (g_HmMsrs.u.vmx.u64EptVpidCaps & MSR_IA32_VMX_EPT_VPID_CAP_INVVPID_ALL_CONTEXTS)
    3349                 pVM->hm.s.vmx.enmTlbFlushVpid = VMXTLBFLUSHVPID_ALL_CONTEXTS;
     3348                pVM->hmr0.s.vmx.enmTlbFlushVpid = VMXTLBFLUSHVPID_ALL_CONTEXTS;
    33503349            else
    33513350            {
    … …  
    33553354                if (g_HmMsrs.u.vmx.u64EptVpidCaps & MSR_IA32_VMX_EPT_VPID_CAP_INVVPID_SINGLE_CONTEXT_RETAIN_GLOBALS)
    33563355                    LogRelFunc(("Only SINGLE_CONTEXT_RETAIN_GLOBALS supported. Ignoring VPID.\n"));
    3357                 pVM->hm.s.vmx.enmTlbFlushVpid = VMXTLBFLUSHVPID_NOT_SUPPORTED;
    3358                 pVM->hm.s.vmx.fVpid = false;
     3356                pVM->hmr0.s.vmx.enmTlbFlushVpid = VMXTLBFLUSHVPID_NOT_SUPPORTED;
     3357                pVM->hm.s.vmx.fVpidForRing3 = pVM->hmr0.s.vmx.fVpid = false;
    33593358            }
    33603359        }
    … …  
    33633362            /*  Shouldn't happen. VPID is supported but INVVPID is not supported by the CPU. Ignore VPID capability. */
    33643363            Log4Func(("VPID supported without INVEPT support. Ignoring VPID.\n"));
    3365             pVM->hm.s.vmx.enmTlbFlushVpid = VMXTLBFLUSHVPID_NOT_SUPPORTED;
    3366             pVM->hm.s.vmx.fVpid = false;
     3364            pVM->hmr0.s.vmx.enmTlbFlushVpid = VMXTLBFLUSHVPID_NOT_SUPPORTED;
     3365            pVM->hm.s.vmx.fVpidForRing3 = pVM->hmr0.s.vmx.fVpid = false;
    33673366        }
    33683367    }
    … …  
    33713370     * Setup the handler for flushing tagged-TLBs.
    33723371     */
    3373     if (pVM->hmr0.s.fNestedPaging && pVM->hm.s.vmx.fVpid)
    3374         pVM->hm.s.vmx.enmTlbFlushType = VMXTLBFLUSHTYPE_EPT_VPID;
     3372    if (pVM->hmr0.s.fNestedPaging && pVM->hmr0.s.vmx.fVpid)
     3373        pVM->hmr0.s.vmx.enmTlbFlushType = VMXTLBFLUSHTYPE_EPT_VPID;
    33753374    else if (pVM->hmr0.s.fNestedPaging)
    3376         pVM->hm.s.vmx.enmTlbFlushType = VMXTLBFLUSHTYPE_EPT;
    3377     else if (pVM->hm.s.vmx.fVpid)
    3378         pVM->hm.s.vmx.enmTlbFlushType = VMXTLBFLUSHTYPE_VPID;
     3375        pVM->hmr0.s.vmx.enmTlbFlushType = VMXTLBFLUSHTYPE_EPT;
     3376    else if (pVM->hmr0.s.vmx.fVpid)
     3377        pVM->hmr0.s.vmx.enmTlbFlushType = VMXTLBFLUSHTYPE_VPID;
    33793378    else
    3380         pVM->hm.s.vmx.enmTlbFlushType = VMXTLBFLUSHTYPE_NONE;
     3379        pVM->hmr0.s.vmx.enmTlbFlushType = VMXTLBFLUSHTYPE_NONE;
     3380
     3381
     3382    /*
     3383     * Copy out the result to ring-3.
     3384     */
     3385    pVM->hm.s.vmx.fVpidForRing3           = pVM->hmr0.s.vmx.fVpid;
     3386    pVM->hm.s.vmx.enmTlbFlushTypeForRing3 = pVM->hmr0.s.vmx.enmTlbFlushType;
     3387    pVM->hm.s.vmx.enmTlbFlushEptForRing3  = pVM->hmr0.s.vmx.enmTlbFlushEpt;
     3388    pVM->hm.s.vmx.enmTlbFlushVpidForRing3 = pVM->hmr0.s.vmx.enmTlbFlushVpid;
    33813389    return VINF_SUCCESS;
    33823390}
    … …  
    38673875
    38683876    /* Enable VPID. */
    3869     if (pVM->hm.s.vmx.fVpid)
     3877    if (pVM->hmr0.s.vmx.fVpid)
    38703878        fVal |= VMX_PROC_CTLS2_VPID;
    38713879
    … …  
    45284536
    45294537    /* Initialize these always, see hmR3InitFinalizeR0().*/
    4530     pVM->hm.s.vmx.enmTlbFlushEpt  = VMXTLBFLUSHEPT_NONE;
    4531     pVM->hm.s.vmx.enmTlbFlushVpid = VMXTLBFLUSHVPID_NONE;
     4538    pVM->hm.s.vmx.enmTlbFlushEptForRing3  = pVM->hmr0.s.vmx.enmTlbFlushEpt  = VMXTLBFLUSHEPT_NONE;
     4539    pVM->hm.s.vmx.enmTlbFlushVpidForRing3 = pVM->hmr0.s.vmx.enmTlbFlushVpid = VMXTLBFLUSHVPID_NONE;
    45324540
    45334541    /* Setup the tagged-TLB flush handlers. */
    … …  
    70107018                        {
    70117019                            case VMX_VMCS64_CTRL_EPTP_FULL:  fSupported = pVM->hmr0.s.fNestedPaging;    break;
    7012                             case VMX_VMCS16_VPID:            fSupported = pVM->hm.s.vmx.fVpid;          break;
     7020                            case VMX_VMCS16_VPID:            fSupported = pVM->hmr0.s.vmx.fVpid;          break;
    70137021                            case VMX_VMCS32_CTRL_PROC_EXEC2:
    70147022                                fSupported = RT_BOOL(pVmcsInfo->u32ProcCtls & VMX_PROC_CTLS_USE_SECONDARY_CTLS);

  • trunk/src/VBox/VMM/VMMR3/HM.cpp

    r87543 r87546  
    16971697    {
    16981698        LogRel(("HM: Enabled nested paging\n"));
    1699         if (pVM->hm.s.vmx.enmTlbFlushEpt == VMXTLBFLUSHEPT_SINGLE_CONTEXT)
     1699        if (pVM->hm.s.vmx.enmTlbFlushEptForRing3 == VMXTLBFLUSHEPT_SINGLE_CONTEXT)
    17001700            LogRel(("HM:   EPT flush type                  = Single context\n"));
    1701         else if (pVM->hm.s.vmx.enmTlbFlushEpt == VMXTLBFLUSHEPT_ALL_CONTEXTS)
     1701        else if (pVM->hm.s.vmx.enmTlbFlushEptForRing3 == VMXTLBFLUSHEPT_ALL_CONTEXTS)
    17021702            LogRel(("HM:   EPT flush type                  = All contexts\n"));
    1703         else if (pVM->hm.s.vmx.enmTlbFlushEpt == VMXTLBFLUSHEPT_NOT_SUPPORTED)
     1703        else if (pVM->hm.s.vmx.enmTlbFlushEptForRing3 == VMXTLBFLUSHEPT_NOT_SUPPORTED)
    17041704            LogRel(("HM:   EPT flush type                  = Not supported\n"));
    17051705        else
    1706             LogRel(("HM:   EPT flush type                  = %#x\n", pVM->hm.s.vmx.enmTlbFlushEpt));
     1706            LogRel(("HM:   EPT flush type                  = %#x\n", pVM->hm.s.vmx.enmTlbFlushEptForRing3));
    17071707
    17081708        if (pVM->hm.s.vmx.fUnrestrictedGuest)
    … …  
    17191719        Assert(!pVM->hm.s.vmx.fUnrestrictedGuest);
    17201720
    1721     if (pVM->hm.s.vmx.fVpid)
     1721    if (pVM->hm.s.vmx.fVpidForRing3)
    17221722    {
    17231723        LogRel(("HM: Enabled VPID\n"));
    1724         if (pVM->hm.s.vmx.enmTlbFlushVpid == VMXTLBFLUSHVPID_INDIV_ADDR)
     1724        if (pVM->hm.s.vmx.enmTlbFlushVpidForRing3 == VMXTLBFLUSHVPID_INDIV_ADDR)
    17251725            LogRel(("HM:   VPID flush type                 = Individual addresses\n"));
    1726         else if (pVM->hm.s.vmx.enmTlbFlushVpid == VMXTLBFLUSHVPID_SINGLE_CONTEXT)
     1726        else if (pVM->hm.s.vmx.enmTlbFlushVpidForRing3 == VMXTLBFLUSHVPID_SINGLE_CONTEXT)
    17271727            LogRel(("HM:   VPID flush type                 = Single context\n"));
    1728         else if (pVM->hm.s.vmx.enmTlbFlushVpid == VMXTLBFLUSHVPID_ALL_CONTEXTS)
     1728        else if (pVM->hm.s.vmx.enmTlbFlushVpidForRing3 == VMXTLBFLUSHVPID_ALL_CONTEXTS)
    17291729            LogRel(("HM:   VPID flush type                 = All contexts\n"));
    1730         else if (pVM->hm.s.vmx.enmTlbFlushVpid == VMXTLBFLUSHVPID_SINGLE_CONTEXT_RETAIN_GLOBALS)
     1730        else if (pVM->hm.s.vmx.enmTlbFlushVpidForRing3 == VMXTLBFLUSHVPID_SINGLE_CONTEXT_RETAIN_GLOBALS)
    17311731            LogRel(("HM:   VPID flush type                 = Single context retain globals\n"));
    17321732        else
    1733             LogRel(("HM:   VPID flush type                 = %#x\n", pVM->hm.s.vmx.enmTlbFlushVpid));
    1734     }
    1735     else if (pVM->hm.s.vmx.enmTlbFlushVpid == VMXTLBFLUSHVPID_NOT_SUPPORTED)
     1733            LogRel(("HM:   VPID flush type                 = %#x\n", pVM->hm.s.vmx.enmTlbFlushVpidForRing3));
     1734    }
     1735    else if (pVM->hm.s.vmx.enmTlbFlushVpidForRing3 == VMXTLBFLUSHVPID_NOT_SUPPORTED)
    17361736        LogRel(("HM: Ignoring VPID capabilities of CPU\n"));
    17371737
    … …  
    28362836    PVM pVM = pUVM->pVM;
    28372837    VM_ASSERT_VALID_EXT_RETURN(pVM, false);
    2838     return pVM->hm.s.vmx.fVpid;
     2838    return pVM->hm.s.vmx.fVpidForRing3;
    28392839}
    28402840

  • trunk/src/VBox/VMM/include/HMInternal.h

    r87543 r87546  
    492492        /** Set when we've enabled VMX. */
    493493        bool                        fEnabled;
    494         /** Set if VPID is supported. */
    495         bool                        fVpid;
     494        /** Set if VPID is supported (ring-3 copy). */
     495        bool                        fVpidForRing3;
    496496        /** Set if VT-x VPID is allowed. */
    497497        bool                        fAllowVpid;
    … …  
    504504        uint8_t                     cPreemptTimerShift;
    505505        /** Padding. */
    506         bool                        afPadding0;
    507 
    508         /** Tagged-TLB flush type. */
    509         VMXTLBFLUSHTYPE             enmTlbFlushType;
    510         /** Flush type to use for INVEPT. */
    511         VMXTLBFLUSHEPT              enmTlbFlushEpt;
    512         /** Flush type to use for INVVPID. */
    513         VMXTLBFLUSHVPID             enmTlbFlushVpid;
     506        bool                        afPadding0[1];
    514507
    515508        /** Pause-loop exiting (PLE) gap in ticks. */
    … …  
    517510        /** Pause-loop exiting (PLE) window in ticks. */
    518511        uint32_t                    cPleWindowTicks;
    519         uint32_t                    u32Alignment0;
    520512
    521513        /** Host CR4 value (set by ring-0 VMX init) */
    … …  
    548540        uint32_t                    u32Alignment1;
    549541
    550         /** Host-physical address for a failing VMXON instruction (diagnostics). */
     542        /** Host-physical address for a failing VMXON instruction (for diagnostics, ring-3). */
    551543        RTHCPHYS                    HCPhysVmxEnableError;
    552 
    553         /** VMX MSR values. */
     544        /** VMX MSR values (only for ring-3 consumption). */
    554545        VMXMSRS                     MsrsForRing3;
     546        /** Tagged-TLB flush type (only for ring-3 consumption). */
     547        VMXTLBFLUSHTYPE             enmTlbFlushTypeForRing3;
     548        /** Flush type to use for INVEPT (only for ring-3 consumption). */
     549        VMXTLBFLUSHEPT              enmTlbFlushEptForRing3;
     550        /** Flush type to use for INVVPID (only for ring-3 consumption). */
     551        VMXTLBFLUSHVPID             enmTlbFlushVpidForRing3;
     552        uint32_t                    u32Alignment2;
    555553
    556554        /** Virtual address of the TSS page used for real mode emulation. */
    … …  
    646644    struct HMR0VMXVM
    647645    {
     646        /** Set if VPID is supported (copy in HM::vmx::fVpidForRing3). */
     647        bool                        fVpid;
     648        bool                        afAlignment1[3];
     649
     650        /** Tagged-TLB flush type. */
     651        VMXTLBFLUSHTYPE             enmTlbFlushType;
     652        /** Flush type to use for INVEPT. */
     653        VMXTLBFLUSHEPT              enmTlbFlushEpt;
     654        /** Flush type to use for INVVPID. */
     655        VMXTLBFLUSHVPID             enmTlbFlushVpid;
     656
    648657        /** Virtual address of the APIC-access page. */
    649658        R0PTRTYPE(uint8_t *)        pbApicAccess;
Note: See TracChangeset for help on using the changeset viewer.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette