VirtualBox

Changeset 87558 in vbox for trunk/src/VBox/VMM


Ignore:
Timestamp:
Feb 3, 2021 11:21:28 AM (4 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
142585
Message:

VMM/HMVMX: Moved/copy last branch stuff from HM::vmxUse to HMR0PERVM::vmx. bugref:9217

Location:
trunk/src/VBox/VMM
Files:
3 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

    r87557 r87558  
    875875 * @remarks Must only be called when LBR is enabled.
    876876 */
    877 DECL_FORCE_INLINE(bool) hmR0VmxIsLbrBranchFromMsr(PCVM pVM, uint32_t idMsr, uint32_t *pidxMsr)
    878 {
    879     Assert(pVM->hm.s.vmx.fLbr);
    880     Assert(pVM->hm.s.vmx.idLbrFromIpMsrFirst);
    881     uint32_t const cLbrStack = pVM->hm.s.vmx.idLbrFromIpMsrLast - pVM->hm.s.vmx.idLbrFromIpMsrFirst + 1;
    882     uint32_t const idxMsr    = idMsr - pVM->hm.s.vmx.idLbrFromIpMsrFirst;
     877DECL_FORCE_INLINE(bool) hmR0VmxIsLbrBranchFromMsr(PCVMCC pVM, uint32_t idMsr, uint32_t *pidxMsr)
     878{
     879    Assert(pVM->hmr0.s.vmx.fLbr);
     880    Assert(pVM->hmr0.s.vmx.idLbrFromIpMsrFirst);
     881    uint32_t const cLbrStack = pVM->hmr0.s.vmx.idLbrFromIpMsrLast - pVM->hmr0.s.vmx.idLbrFromIpMsrFirst + 1;
     882    uint32_t const idxMsr    = idMsr - pVM->hmr0.s.vmx.idLbrFromIpMsrFirst;
    883883    if (idxMsr < cLbrStack)
    884884    {
    … …  
    903903 *          are supported by the CPU (see hmR0VmxSetupLbrMsrRange).
    904904 */
    905 DECL_FORCE_INLINE(bool) hmR0VmxIsLbrBranchToMsr(PCVM pVM, uint32_t idMsr, uint32_t *pidxMsr)
    906 {
    907     Assert(pVM->hm.s.vmx.fLbr);
    908     if (pVM->hm.s.vmx.idLbrToIpMsrFirst)
    909     {
    910         uint32_t const cLbrStack = pVM->hm.s.vmx.idLbrToIpMsrLast - pVM->hm.s.vmx.idLbrToIpMsrFirst + 1;
    911         uint32_t const idxMsr    = idMsr - pVM->hm.s.vmx.idLbrToIpMsrFirst;
     905DECL_FORCE_INLINE(bool) hmR0VmxIsLbrBranchToMsr(PCVMCC pVM, uint32_t idMsr, uint32_t *pidxMsr)
     906{
     907    Assert(pVM->hmr0.s.vmx.fLbr);
     908    if (pVM->hmr0.s.vmx.idLbrToIpMsrFirst)
     909    {
     910        uint32_t const cLbrStack = pVM->hmr0.s.vmx.idLbrToIpMsrLast - pVM->hmr0.s.vmx.idLbrToIpMsrFirst + 1;
     911        uint32_t const idxMsr    = idMsr - pVM->hmr0.s.vmx.idLbrToIpMsrFirst;
    912912        if (idxMsr < cLbrStack)
    913913        {
    … …  
    27962796            {
    27972797                /* Verify LBR MSRs (used only for debugging) are intercepted. We don't passthru these MSRs to the guest yet. */
    2798                 PCVM pVM = pVCpu->CTX_SUFF(pVM);
    2799                 if (   pVM->hm.s.vmx.fLbr
     2798                PCVMCC pVM = pVCpu->CTX_SUFF(pVM);
     2799                if (   pVM->hmr0.s.vmx.fLbr
    28002800                    && (   hmR0VmxIsLbrBranchFromMsr(pVM, pGuestMsrLoad->u32Msr, NULL /* pidxMsr */)
    28012801                        || hmR0VmxIsLbrBranchToMsr(pVM, pGuestMsrLoad->u32Msr, NULL /* pidxMsr */)
    2802                         || pGuestMsrLoad->u32Msr == pVM->hm.s.vmx.idLbrTosMsr))
     2802                        || pGuestMsrLoad->u32Msr == pVM->hmr0.s.vmx.idLbrTosMsr))
    28032803                {
    28042804                    AssertMsgReturnVoid((fMsrpm & VMXMSRPM_MASK) == VMXMSRPM_EXIT_RD_WR,
    … …  
    33963396static int hmR0VmxSetupLbrMsrRange(PVMCC pVM)
    33973397{
    3398     Assert(pVM->hm.s.vmx.fLbr);
     3398    Assert(pVM->hmr0.s.vmx.fLbr);
    33993399    uint32_t idLbrFromIpMsrFirst;
    34003400    uint32_t idLbrFromIpMsrLast;
    … …  
    34813481     * Update the LBR info. to the VM struct. for use later.
    34823482     */
    3483     pVM->hm.s.vmx.idLbrTosMsr         = idLbrTosMsr;
    3484     pVM->hm.s.vmx.idLbrFromIpMsrFirst = idLbrFromIpMsrFirst;
    3485     pVM->hm.s.vmx.idLbrFromIpMsrLast  = idLbrFromIpMsrLast;
    3486 
    3487     pVM->hm.s.vmx.idLbrToIpMsrFirst   = idLbrToIpMsrFirst;
    3488     pVM->hm.s.vmx.idLbrToIpMsrLast    = idLbrToIpMsrLast;
     3483    pVM->hmr0.s.vmx.idLbrTosMsr = idLbrTosMsr;
     3484
     3485    pVM->hm.s.vmx.idLbrFromIpMsrFirstForRing3 = pVM->hmr0.s.vmx.idLbrFromIpMsrFirst = idLbrFromIpMsrFirst;
     3486    pVM->hm.s.vmx.idLbrFromIpMsrLastForRing3  = pVM->hmr0.s.vmx.idLbrFromIpMsrLast  = idLbrFromIpMsrLast;
     3487
     3488    pVM->hm.s.vmx.idLbrToIpMsrFirstForRing3   = pVM->hmr0.s.vmx.idLbrToIpMsrFirst   = idLbrToIpMsrFirst;
     3489    pVM->hm.s.vmx.idLbrToIpMsrLastForRing3    = pVM->hmr0.s.vmx.idLbrToIpMsrLast    = idLbrToIpMsrLast;
    34893490    return VINF_SUCCESS;
    34903491}
    … …  
    40734074        pVmcsInfo->u64Cr4Mask = u64Cr4Mask;
    40744075
    4075         if (pVCpu->CTX_SUFF(pVM)->hm.s.vmx.fLbr)
     4076        if (pVCpu->CTX_SUFF(pVM)->hmr0.s.vmx.fLbr)
    40764077        {
    40774078            rc = VMXWriteVmcsNw(VMX_VMCS64_GUEST_DEBUGCTL_FULL, MSR_IA32_DEBUGCTL_LBR);
    … …  
    45494550
    45504551    /* Determine LBR capabilities. */
    4551     if (pVM->hm.s.vmx.fLbr)
     4552    pVM->hmr0.s.vmx.fLbr = pVM->hm.s.vmx.fLbrCfg;
     4553    if (pVM->hmr0.s.vmx.fLbr)
    45524554    {
    45534555        rc = hmR0VmxSetupLbrMsrRange(pVM);
    … …  
    68346836
    68356837        /* Last Branch Record. */
    6836         if (pVM->hm.s.vmx.fLbr)
     6838        if (pVM->hmr0.s.vmx.fLbr)
    68376839        {
    68386840            PVMXVMCSINFOSHARED const pVmcsInfoShared = pVmxTransient->pVmcsInfo->pShared;
    6839             uint32_t const idFromIpMsrStart = pVM->hm.s.vmx.idLbrFromIpMsrFirst;
    6840             uint32_t const idToIpMsrStart   = pVM->hm.s.vmx.idLbrToIpMsrFirst;
    6841             uint32_t const cLbrStack        = pVM->hm.s.vmx.idLbrFromIpMsrLast - pVM->hm.s.vmx.idLbrFromIpMsrFirst + 1;
     6841            uint32_t const idFromIpMsrStart = pVM->hmr0.s.vmx.idLbrFromIpMsrFirst;
     6842            uint32_t const idToIpMsrStart   = pVM->hmr0.s.vmx.idLbrToIpMsrFirst;
     6843            uint32_t const cLbrStack        = pVM->hmr0.s.vmx.idLbrFromIpMsrLast - pVM->hmr0.s.vmx.idLbrFromIpMsrFirst + 1;
    68426844            Assert(cLbrStack <= 32);
    68436845            for (uint32_t i = 0; i < cLbrStack; i++)
    … …  
    68596861
    68606862            /* Add LBR top-of-stack MSR (which contains the index to the most recent record). */
    6861             int rc = hmR0VmxAddAutoLoadStoreMsr(pVCpu, pVmxTransient, pVM->hm.s.vmx.idLbrTosMsr,
     6863            int rc = hmR0VmxAddAutoLoadStoreMsr(pVCpu, pVmxTransient, pVM->hmr0.s.vmx.idLbrTosMsr,
    68626864                                                pVmcsInfoShared->u64LbrTosMsr, false /* fSetReadWrite */,
    68636865                                                false /* fUpdateHostMsr */);
    … …  
    77847786                        {
    77857787                            uint32_t idxLbrMsr;
    7786                             if (pVM->hm.s.vmx.fLbr)
     7788                            if (pVM->hmr0.s.vmx.fLbr)
    77877789                            {
    77887790                                if (hmR0VmxIsLbrBranchFromMsr(pVM, idMsr, &idxLbrMsr))
    … …  
    77987800                                    break;
    77997801                                }
    7800                                 if (idMsr == pVM->hm.s.vmx.idLbrTosMsr)
     7802                                if (idMsr == pVM->hmr0.s.vmx.idLbrTosMsr)
    78017803                                {
    78027804                                    pVmcsInfoShared->u64LbrTosMsr = pMsrs[i].u64Value;

  • trunk/src/VBox/VMM/VMMR3/HM.cpp

    r87557 r87558  
    373373     * Whether to enable LBR for the guest. This is disabled by default as it's only
    374374     * useful while debugging and enabling it causes a noticeable performance hit. */
    375     rc = CFGMR3QueryBoolDef(pCfgHm, "VmxLbr", &pVM->hm.s.vmx.fLbr, false);
     375    rc = CFGMR3QueryBoolDef(pCfgHm, "VmxLbr", &pVM->hm.s.vmx.fLbrCfg, false);
    376376    AssertRCReturn(rc, rc);
    377377
    … …  
    33333333    if (HMIsVmxActive(pVM))
    33343334    {
    3335         if (pVM->hm.s.vmx.fLbr)
     3335        if (pVM->hm.s.vmx.fLbrCfg)
    33363336        {
    33373337            PCVMXVMCSINFOSHARED pVmcsInfoShared = hmGetVmxActiveVmcsInfoShared(pVCpu);
    3338             uint32_t const      cLbrStack       = pVM->hm.s.vmx.idLbrFromIpMsrLast - pVM->hm.s.vmx.idLbrFromIpMsrFirst + 1;
     3338            uint32_t const      cLbrStack       = pVM->hm.s.vmx.idLbrFromIpMsrLastForRing3 - pVM->hm.s.vmx.idLbrFromIpMsrFirstForRing3 + 1;
    33393339
    33403340            /** @todo r=ramshankar: The index technically varies depending on the CPU, but
    … …  
    33593359            for (;;)
    33603360            {
    3361                 if (pVM->hm.s.vmx.idLbrToIpMsrFirst)
    3362                 {
     3361                if (pVM->hm.s.vmx.idLbrToIpMsrFirstForRing3)
    33633362                    pHlp->pfnPrintf(pHlp, "  Branch (%2u): From IP=%#016RX64 - To IP=%#016RX64\n", idxCurrent,
    33643363                                    pVmcsInfoShared->au64LbrFromIpMsr[idxCurrent], pVmcsInfoShared->au64LbrToIpMsr[idxCurrent]);
    3365                 }
    33663364                else
    33673365                    pHlp->pfnPrintf(pHlp, "  Branch (%2u): LBR=%#RX64\n", idxCurrent, pVmcsInfoShared->au64LbrFromIpMsr[idxCurrent]);

  • trunk/src/VBox/VMM/include/HMInternal.h

    r87557 r87558  
    522522        bool                        fUseVmcsShadowingForRing3;
    523523        /** Set if Last Branch Record (LBR) is enabled. */
    524         bool                        fLbr;
    525         bool                        fAlignment2;
    526 
    527         /** The host LBR TOS (top-of-stack) MSR id. */
    528         uint32_t                    idLbrTosMsr;
     524        bool                        fLbrCfg;
     525        bool                        afAlignment2[5];
    529526
    530527        /** The first valid host LBR branch-from-IP stack range. */
    531         uint32_t                    idLbrFromIpMsrFirst;
     528        uint32_t                    idLbrFromIpMsrFirstForRing3;
    532529        /** The last valid host LBR branch-from-IP stack range. */
    533         uint32_t                    idLbrFromIpMsrLast;
     530        uint32_t                    idLbrFromIpMsrLastForRing3;
    534531
    535532        /** The first valid host LBR branch-to-IP stack range. */
    536         uint32_t                    idLbrToIpMsrFirst;
     533        uint32_t                    idLbrToIpMsrFirstForRing3;
    537534        /** The last valid host LBR branch-to-IP stack range. */
    538         uint32_t                    idLbrToIpMsrLast;
     535        uint32_t                    idLbrToIpMsrLastForRing3;
    539536
    540537        /** Host-physical address for a failing VMXON instruction (for diagnostics, ring-3). */
    … …  
    649646        /** Whether to use VMCS shadowing. */
    650647        bool                        fUseVmcsShadowing;
    651         bool                        afAlignment1[1];
     648        /** Set if Last Branch Record (LBR) is enabled. */
     649        bool                        fLbr;
    652650        /** Set if VPID is supported (copy in HM::vmx::fVpidForRing3). */
    653651        bool                        fVpid;
    … …  
    658656        /** Flush type to use for INVVPID. */
    659657        VMXTLBFLUSHVPID             enmTlbFlushVpid;
     658
     659        /** The first valid host LBR branch-from-IP stack range. */
     660        uint32_t                    idLbrFromIpMsrFirst;
     661        /** The last valid host LBR branch-from-IP stack range. */
     662        uint32_t                    idLbrFromIpMsrLast;
     663
     664        /** The first valid host LBR branch-to-IP stack range. */
     665        uint32_t                    idLbrToIpMsrFirst;
     666        /** The last valid host LBR branch-to-IP stack range. */
     667        uint32_t                    idLbrToIpMsrLast;
     668
     669        /** The host LBR TOS (top-of-stack) MSR id. */
     670        uint32_t                    idLbrTosMsr;
     671        uint32_t                    u32Alignment1;
    660672
    661673        /** Virtual address of the APIC-access page. */
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