Changeset 87559 in vbox

Timestamp:

Feb 3, 2021 11:32:52 AM (4 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

142586

Message:

VMM/HMVMX: Tidied up HM::vmx and HM::svm a little. bugref:9217

Location:

trunk/src/VBox/VMM

Files:

• VMMR0/HMR0.cpp (modified) (1 diff)
• VMMR3/HM.cpp (modified) (1 diff)
• include/HMInternal.h (modified) (6 diffs)

trunk/src/VBox/VMM/VMMR0/HMR0.cpp

@@ -1172 +1172 @@
     if (pVM->hm.s.vmx.fSupported)
     {
-        pVM->hmr0.s.vmx.fUsePreemptTimer    = pVM->hm.s.vmx.fUsePreemptTimerCfg && g_fHmVmxUsePreemptTimer;
-        pVM->hm.s.vmx.fUsePreemptTimerCfg   = pVM->hmr0.s.vmx.fUsePreemptTimer;
-        pVM->hm.s.vmx.cPreemptTimerShift    = g_cHmVmxPreemptTimerShift;
-        pVM->hm.s.vmx.u64HostCr4            = g_uHmVmxHostCr4;
-        pVM->hm.s.vmx.u64HostMsrEfer        = g_uHmVmxHostMsrEfer;
-        pVM->hm.s.vmx.u64HostSmmMonitorCtl  = g_uHmVmxHostSmmMonitorCtl;
+        pVM->hmr0.s.vmx.fUsePreemptTimer            = pVM->hm.s.vmx.fUsePreemptTimerCfg && g_fHmVmxUsePreemptTimer;
+        pVM->hm.s.vmx.fUsePreemptTimerCfg           = pVM->hmr0.s.vmx.fUsePreemptTimer;
+        pVM->hm.s.vmx.cPreemptTimerShift            = g_cHmVmxPreemptTimerShift;
+        pVM->hm.s.vmx.u64HostCr4ForRing3            = g_uHmVmxHostCr4;
+        pVM->hm.s.vmx.u64HostMsrEferForRing3        = g_uHmVmxHostMsrEfer;
+        pVM->hm.s.vmx.u64HostSmmMonitorCtlForRing3  = g_uHmVmxHostSmmMonitorCtl;
         HMGetVmxMsrsFromHwvirtMsrs(&g_HmMsrs, &pVM->hm.s.vmx.MsrsForRing3);
         /* If you need to tweak host MSRs for testing VMX R0 code, do it here. */

trunk/src/VBox/VMM/VMMR3/HM.cpp

@@ -1506 +1506 @@
     LogRel(("HM: Using VT-x implementation 3.0\n"));
     LogRel(("HM: Max resume loops                  = %u\n",     pVM->hm.s.cMaxResumeLoopsCfg));
-    LogRel(("HM: Host CR4                          = %#RX64\n", pVM->hm.s.vmx.u64HostCr4));
-    LogRel(("HM: Host EFER                         = %#RX64\n", pVM->hm.s.vmx.u64HostMsrEfer));
-    LogRel(("HM: MSR_IA32_SMM_MONITOR_CTL          = %#RX64\n", pVM->hm.s.vmx.u64HostSmmMonitorCtl));
+    LogRel(("HM: Host CR4                          = %#RX64\n", pVM->hm.s.vmx.u64HostCr4ForRing3));
+    LogRel(("HM: Host EFER                         = %#RX64\n", pVM->hm.s.vmx.u64HostMsrEferForRing3));
+    LogRel(("HM: MSR_IA32_SMM_MONITOR_CTL          = %#RX64\n", pVM->hm.s.vmx.u64HostSmmMonitorCtlForRing3));
 
     hmR3VmxReportFeatCtlMsr(pVM->hm.s.vmx.MsrsForRing3.u64FeatCtrl);

trunk/src/VBox/VMM/include/HMInternal.h

@@ -491 +491 @@
         /** Set when we've enabled VMX. */
         bool                        fEnabled;
-        /** Set if VPID is supported (ring-3 copy). */
-        bool                        fVpidForRing3;
+        /** The shift mask employed by the VMX-Preemption timer (set by ring-0). */
+        uint8_t                     cPreemptTimerShift;
+        bool                        afAlignment1[5];
+
+        /** Pause-loop exiting (PLE) gap in ticks. */
+        uint32_t                    cPleGapTicks;
+        /** Pause-loop exiting (PLE) window in ticks. */
+        uint32_t                    cPleWindowTicks;
+
+        /** Virtual address of the TSS page used for real mode emulation. */
+        R3PTRTYPE(PVBOXTSS)         pRealModeTSS;
+        /** Virtual address of the identity page table used for real mode and protected
+         *  mode without paging emulation in EPT mode. */
+        R3PTRTYPE(PX86PD)           pNonPagingModeEPTPageTable;
+
+        /** @name Configuration (gets copied if problematic)
+         * @{ */
+        /** Set if Last Branch Record (LBR) is enabled. */
+        bool                        fLbrCfg;
         /** Set if VT-x VPID is allowed. */
         bool                        fAllowVpid;
@@ -501 +518 @@
          * quietly clears this if the hardware doesn't support the preemption timer. */
         bool                        fUsePreemptTimerCfg;
-        /** The shift mask employed by the VMX-Preemption timer (set by ring-0). */
-        uint8_t                     cPreemptTimerShift;
-        bool                        fAlignment1;
-
-        /** Pause-loop exiting (PLE) gap in ticks. */
-        uint32_t                    cPleGapTicks;
-        /** Pause-loop exiting (PLE) window in ticks. */
-        uint32_t                    cPleWindowTicks;
-
-        /** Host CR4 value (set by ring-0 VMX init, for logging). */
-        uint64_t                    u64HostCr4;
-        /** Host SMM monitor control (set by ring-0 VMX init, for logging). */
-        uint64_t                    u64HostSmmMonitorCtl;
-        /** Host EFER value (set by ring-0 VMX init, for logging and guest NX). */
-        uint64_t                    u64HostMsrEfer;
+        /** @} */
+
+        /** @name For ring-3 consumption
+         * @{ */
+        /** Set if VPID is supported (ring-3 copy). */
+        bool                        fVpidForRing3;
         /** Whether the CPU supports VMCS fields for swapping EFER (set by ring-0 VMX
          *  init, for logging). */
@@ -521 +529 @@
         /** Whether to use VMCS shadowing. */
         bool                        fUseVmcsShadowingForRing3;
-        /** Set if Last Branch Record (LBR) is enabled. */
-        bool                        fLbrCfg;
-        bool                        afAlignment2[5];
+        bool                        fAlignment2;
+
+        /** Host CR4 value (set by ring-0 VMX init, for logging). */
+        uint64_t                    u64HostCr4ForRing3;
+        /** Host SMM monitor control (set by ring-0 VMX init, for logging). */
+        uint64_t                    u64HostSmmMonitorCtlForRing3;
+        /** Host EFER value (set by ring-0 VMX init, for logging and guest NX). */
+        uint64_t                    u64HostMsrEferForRing3;
 
         /** The first valid host LBR branch-from-IP stack range. */
@@ -539 +552 @@
         /** VMX MSR values (only for ring-3 consumption). */
         VMXMSRS                     MsrsForRing3;
+
         /** Tagged-TLB flush type (only for ring-3 consumption). */
         VMXTLBFLUSHTYPE             enmTlbFlushTypeForRing3;
@@ -545 +559 @@
         /** Flush type to use for INVVPID (only for ring-3 consumption). */
         VMXTLBFLUSHVPID             enmTlbFlushVpidForRing3;
-        uint32_t                    u32Alignment2;
-
-        /** Virtual address of the TSS page used for real mode emulation. */
-        R3PTRTYPE(PVBOXTSS)         pRealModeTSS;
-        /** Virtual address of the identity page table used for real mode and protected
-         *  mode without paging emulation in EPT mode. */
-        R3PTRTYPE(PX86PD)           pNonPagingModeEPTPageTable;
+        /** @} */
     } vmx;
 
@@ -569 +577 @@
         /** Whether to use LBR virtualization feature. */
         bool                        fLbrVirt;
-        uint8_t                     u8Alignment0[2];
-
-        /** HWCR MSR (for diagnostics). */
-        uint64_t                    u64MsrHwcr;
-
+        bool                        afAlignment1[2];
+
+        /** Pause filter counter. */
+        uint16_t                    cPauseFilter;
+        /** Pause filter treshold in ticks. */
+        uint16_t                    cPauseFilterThresholdTicks;
+        uint32_t                    u32Alignment2;
+
+        /** @name For ring-3 consumption
+         * @{ */
         /** SVM revision. */
         uint32_t                    u32Rev;
         /** SVM feature bits from cpuid 0x8000000a, ring-3 copy. */
         uint32_t                    fFeaturesForRing3;
-
-        /** Pause filter counter. */
-        uint16_t                    cPauseFilter;
-        /** Pause filter treshold in ticks. */
-        uint16_t                    cPauseFilterThresholdTicks;
-        uint32_t                    u32Alignment0;
+        /** HWCR MSR (for diagnostics). */
+        uint64_t                    u64MsrHwcr;
+        /** @} */
     } svm;