Changeset 87828 in vbox
- Timestamp:
- Feb 22, 2021 4:23:08 AM (4 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp
r87818 r87828 347 347 uint32_t u32Magic; 348 348 349 /** Whether the command thread is sleeping. */ 350 bool volatile fCmdThreadSleeping; 351 /** Alignment padding. */ 352 uint8_t afPadding0[3]; 353 /** Whether the command thread has been signaled for wake up. */ 354 bool volatile fCmdThreadSignaled; 355 /** Alignment padding. */ 356 uint8_t afPadding1[3]; 357 349 /** The MMIO handle. */ 350 IOMMMIOHANDLE hMmio; 358 351 /** The event semaphore the command thread waits on. */ 359 352 SUPSEMEVENT hEvtCmdThread; 360 /** The MMIO handle. */361 IOMMMIOHANDLE hMmio;362 353 363 354 #ifdef IOMMU_WITH_DTE_CACHE … … 546 537 } IOMMU; 547 538 /** Pointer to the IOMMU device state. */ 548 typedef structIOMMU *PIOMMU;539 typedef IOMMU *PIOMMU; 549 540 /** Pointer to the const IOMMU device state. */ 550 typedef const struct IOMMU *PCIOMMU; 551 AssertCompileMemberAlignment(IOMMU, fCmdThreadSleeping, 4); 552 AssertCompileMemberAlignment(IOMMU, fCmdThreadSignaled, 4); 553 AssertCompileMemberAlignment(IOMMU, hEvtCmdThread, 8); 541 typedef const IOMMU *PCIOMMU; 554 542 AssertCompileMemberAlignment(IOMMU, hMmio, 8); 555 543 #ifdef IOMMU_WITH_DTE_CACHE 544 AssertCompileMemberAlignment(IOMMU, CritSectCache, 8); 556 545 AssertCompileMemberAlignment(IOMMU, aDeviceIds, 8); 557 546 AssertCompileMemberAlignment(IOMMU, aDteCache, 8); … … 576 565 /** The command thread handle. */ 577 566 R3PTRTYPE(PPDMTHREAD) pCmdThread; 567 /** Whether the command thread is sleeping. */ 568 bool volatile fCmdThreadSleeping; 569 /** Whether the command thread has been signaled for wake up. */ 570 bool volatile fCmdThreadSignaled; 571 /** Alignment padding. */ 572 uint8_t afPadding0[6]; 578 573 #ifdef IOMMU_WITH_IOTLBE_CACHE 579 574 /** Pointer to array of pre-allocated IOTLBEs. */ … … 591 586 /** Pointer to the ring-3 IOMMU device state. */ 592 587 typedef IOMMUR3 *PIOMMUR3; 588 /** Pointer to the const ring-3 IOMMU device state. */ 589 typedef const IOMMUR3 *PCIOMMUR3; 593 590 #ifdef IOMMU_WITH_IOTLBE_CACHE 594 591 AssertCompileMemberAlignment(IOMMUR3, paIotlbes, 8); … … 1673 1670 Log4Func(("\n")); 1674 1671 1675 P IOMMU pThis = PDMDEVINS_2_DATA(pDevIns, PIOMMU);1672 PCIOMMU pThis = PDMDEVINS_2_DATA(pDevIns, PIOMMU); 1676 1673 if (pThis->Status.n.u1CmdBufRunning) 1677 1674 { … … 5001 4998 { 5002 4999 PIOMMU pThis = PDMDEVINS_2_DATA(pDevIns, PIOMMU); 5003 PIOMMUCC pThis CC= PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUCC);5000 PIOMMUCC pThisR3 = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUCC); 5004 5001 5005 5002 if (pThread->enmState == PDMTHREADSTATE_INITIALIZING) … … 5021 5018 */ 5022 5019 { 5023 ASMAtomicWriteBool(&pThis ->fCmdThreadSleeping, true);5024 bool fSignaled = ASMAtomicXchgBool(&pThis ->fCmdThreadSignaled, false);5020 ASMAtomicWriteBool(&pThisR3->fCmdThreadSleeping, true); 5021 bool fSignaled = ASMAtomicXchgBool(&pThisR3->fCmdThreadSignaled, false); 5025 5022 if (!fSignaled) 5026 5023 { 5027 Assert(ASMAtomicReadBool(&pThis ->fCmdThreadSleeping));5024 Assert(ASMAtomicReadBool(&pThisR3->fCmdThreadSleeping)); 5028 5025 int rc = PDMDevHlpSUPSemEventWaitNoResume(pDevIns, pThis->hEvtCmdThread, RT_INDEFINITE_WAIT); 5029 5026 AssertLogRelMsgReturn(RT_SUCCESS(rc) || rc == VERR_INTERRUPTED, ("%Rrc\n", rc), rc); … … 5031 5028 break; 5032 5029 Log4Func(("Woken up with rc=%Rrc\n", rc)); 5033 ASMAtomicWriteBool(&pThis ->fCmdThreadSignaled, false);5030 ASMAtomicWriteBool(&pThisR3->fCmdThreadSignaled, false); 5034 5031 } 5035 ASMAtomicWriteBool(&pThis ->fCmdThreadSleeping, false);5032 ASMAtomicWriteBool(&pThisR3->fCmdThreadSleeping, false); 5036 5033 } 5037 5034 … … 5043 5040 * save on host memory a bit, we could (once PGM has the necessary APIs) 5044 5041 * lock the page mappings page mappings and access them directly. */ 5045 IOMMU_LOCK(pDevIns, pThis CC);5042 IOMMU_LOCK(pDevIns, pThisR3); 5046 5043 5047 5044 if (pThis->Status.n.u1CmdBufRunning) … … 5062 5059 RTGCPHYS const GCPhysCmdBufBase = pThis->CmdBufBaseAddr.n.u40Base << X86_PAGE_4K_SHIFT; 5063 5060 5064 IOMMU_UNLOCK(pDevIns, pThis CC);5061 IOMMU_UNLOCK(pDevIns, pThisR3); 5065 5062 int rc = PDMDevHlpPCIPhysRead(pDevIns, GCPhysCmdBufBase, pvCmds, cbCmdBuf); 5066 IOMMU_LOCK(pDevIns, pThis CC);5063 IOMMU_LOCK(pDevIns, pThisR3); 5067 5064 5068 5065 if (RT_SUCCESS(rc)) … … 5072 5069 5073 5070 /* Allow IOMMU to do other work while we process commands. */ 5074 IOMMU_UNLOCK(pDevIns, pThis CC);5071 IOMMU_UNLOCK(pDevIns, pThisR3); 5075 5072 5076 5073 /* Process the fetched commands. */ … … 5108 5105 iommuAmdCmdHwErrorEventRaise(pDevIns, &EvtCmdHwErr); 5109 5106 5110 IOMMU_UNLOCK(pDevIns, pThis CC);5107 IOMMU_UNLOCK(pDevIns, pThisR3); 5111 5108 } 5112 5109 } 5113 5110 else 5114 IOMMU_UNLOCK(pDevIns, pThis CC);5111 IOMMU_UNLOCK(pDevIns, pThisR3); 5115 5112 } 5116 5113 else 5117 IOMMU_UNLOCK(pDevIns, pThis CC);5114 IOMMU_UNLOCK(pDevIns, pThisR3); 5118 5115 } 5119 5116 … … 5135 5132 RT_NOREF(pThread); 5136 5133 LogFlowFunc(("\n")); 5137 P IOMMU pThis = PDMDEVINS_2_DATA(pDevIns, PIOMMU);5134 PCIOMMU pThis = PDMDEVINS_2_DATA(pDevIns, PIOMMU); 5138 5135 return PDMDevHlpSUPSemEventSignal(pDevIns, pThis->hEvtCmdThread); 5139 5136 } … … 6263 6260 { 6264 6261 PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns); 6265 PIOMMU pThis = PDMDEVINS_2_DATA(pDevIns, PIOMMU);6266 PIOMMUCC pThis CC= PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUCC);6262 PIOMMU pThis = PDMDEVINS_2_DATA(pDevIns, PIOMMU); 6263 PIOMMUCC pThisR3 = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUCC); 6267 6264 LogFlowFunc(("\n")); 6268 6265 6269 IOMMU_LOCK_NORET(pDevIns, pThis CC);6266 IOMMU_LOCK_NORET(pDevIns, pThisR3); 6270 6267 6271 6268 /* Close the command thread semaphore. */ … … 6278 6275 #ifdef IOMMU_WITH_IOTLBE_CACHE 6279 6276 /* Destroy the IOTLB cache. */ 6280 if (pThis CC->paIotlbes)6281 { 6282 PDMDevHlpMMHeapFree(pDevIns, pThis CC->paIotlbes);6283 pThis CC->paIotlbes = NULL;6284 pThis CC->idxUnusedIotlbe = 0;6277 if (pThisR3->paIotlbes) 6278 { 6279 PDMDevHlpMMHeapFree(pDevIns, pThisR3->paIotlbes); 6280 pThisR3->paIotlbes = NULL; 6281 pThisR3->idxUnusedIotlbe = 0; 6285 6282 } 6286 6283 #endif 6287 6284 6288 IOMMU_UNLOCK(pDevIns, pThis CC);6285 IOMMU_UNLOCK(pDevIns, pThisR3); 6289 6286 return VINF_SUCCESS; 6290 6287 }
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