VirtualBox

Changeset 87828 in vbox


Ignore:
Timestamp:
Feb 22, 2021 4:23:08 AM (4 years ago)
Author:
vboxsync
Message:

AMD IOMMU: bugref:9654 Moved some R3-only thread data into ring-3 only IOMMU data.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp

    r87818 r87828  
    347347    uint32_t                    u32Magic;
    348348
    349     /** Whether the command thread is sleeping. */
    350     bool volatile               fCmdThreadSleeping;
    351     /** Alignment padding. */
    352     uint8_t                     afPadding0[3];
    353     /** Whether the command thread has been signaled for wake up. */
    354     bool volatile               fCmdThreadSignaled;
    355     /** Alignment padding. */
    356     uint8_t                     afPadding1[3];
    357 
     349    /** The MMIO handle. */
     350    IOMMMIOHANDLE               hMmio;
    358351    /** The event semaphore the command thread waits on. */
    359352    SUPSEMEVENT                 hEvtCmdThread;
    360     /** The MMIO handle. */
    361     IOMMMIOHANDLE               hMmio;
    362353
    363354#ifdef IOMMU_WITH_DTE_CACHE
     
    546537} IOMMU;
    547538/** Pointer to the IOMMU device state. */
    548 typedef struct IOMMU *PIOMMU;
     539typedef IOMMU *PIOMMU;
    549540/** Pointer to the const IOMMU device state. */
    550 typedef const struct IOMMU *PCIOMMU;
    551 AssertCompileMemberAlignment(IOMMU, fCmdThreadSleeping, 4);
    552 AssertCompileMemberAlignment(IOMMU, fCmdThreadSignaled, 4);
    553 AssertCompileMemberAlignment(IOMMU, hEvtCmdThread, 8);
     541typedef const IOMMU *PCIOMMU;
    554542AssertCompileMemberAlignment(IOMMU, hMmio, 8);
    555543#ifdef IOMMU_WITH_DTE_CACHE
     544AssertCompileMemberAlignment(IOMMU, CritSectCache, 8);
    556545AssertCompileMemberAlignment(IOMMU, aDeviceIds, 8);
    557546AssertCompileMemberAlignment(IOMMU, aDteCache, 8);
     
    576565    /** The command thread handle. */
    577566    R3PTRTYPE(PPDMTHREAD)       pCmdThread;
     567    /** Whether the command thread is sleeping. */
     568    bool volatile               fCmdThreadSleeping;
     569    /** Whether the command thread has been signaled for wake up. */
     570    bool volatile               fCmdThreadSignaled;
     571    /** Alignment padding. */
     572    uint8_t                     afPadding0[6];
    578573#ifdef IOMMU_WITH_IOTLBE_CACHE
    579574    /** Pointer to array of pre-allocated IOTLBEs. */
     
    591586/** Pointer to the ring-3 IOMMU device state. */
    592587typedef IOMMUR3 *PIOMMUR3;
     588/** Pointer to the const ring-3 IOMMU device state. */
     589typedef const IOMMUR3 *PCIOMMUR3;
    593590#ifdef IOMMU_WITH_IOTLBE_CACHE
    594591AssertCompileMemberAlignment(IOMMUR3, paIotlbes, 8);
     
    16731670    Log4Func(("\n"));
    16741671
    1675     PIOMMU pThis = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
     1672    PCIOMMU pThis = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
    16761673    if (pThis->Status.n.u1CmdBufRunning)
    16771674    {
     
    50014998{
    50024999    PIOMMU   pThis   = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
    5003     PIOMMUCC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUCC);
     5000    PIOMMUCC pThisR3 = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUCC);
    50045001
    50055002    if (pThread->enmState == PDMTHREADSTATE_INITIALIZING)
     
    50215018         */
    50225019        {
    5023             ASMAtomicWriteBool(&pThis->fCmdThreadSleeping, true);
    5024             bool fSignaled = ASMAtomicXchgBool(&pThis->fCmdThreadSignaled, false);
     5020            ASMAtomicWriteBool(&pThisR3->fCmdThreadSleeping, true);
     5021            bool fSignaled = ASMAtomicXchgBool(&pThisR3->fCmdThreadSignaled, false);
    50255022            if (!fSignaled)
    50265023            {
    5027                 Assert(ASMAtomicReadBool(&pThis->fCmdThreadSleeping));
     5024                Assert(ASMAtomicReadBool(&pThisR3->fCmdThreadSleeping));
    50285025                int rc = PDMDevHlpSUPSemEventWaitNoResume(pDevIns, pThis->hEvtCmdThread, RT_INDEFINITE_WAIT);
    50295026                AssertLogRelMsgReturn(RT_SUCCESS(rc) || rc == VERR_INTERRUPTED, ("%Rrc\n", rc), rc);
     
    50315028                    break;
    50325029                Log4Func(("Woken up with rc=%Rrc\n", rc));
    5033                 ASMAtomicWriteBool(&pThis->fCmdThreadSignaled, false);
     5030                ASMAtomicWriteBool(&pThisR3->fCmdThreadSignaled, false);
    50345031            }
    5035             ASMAtomicWriteBool(&pThis->fCmdThreadSleeping, false);
     5032            ASMAtomicWriteBool(&pThisR3->fCmdThreadSleeping, false);
    50365033        }
    50375034
     
    50435040         *        save on host memory a bit, we could (once PGM has the necessary APIs)
    50445041         *        lock the page mappings page mappings and access them directly. */
    5045         IOMMU_LOCK(pDevIns, pThisCC);
     5042        IOMMU_LOCK(pDevIns, pThisR3);
    50465043
    50475044        if (pThis->Status.n.u1CmdBufRunning)
     
    50625059                RTGCPHYS const GCPhysCmdBufBase = pThis->CmdBufBaseAddr.n.u40Base << X86_PAGE_4K_SHIFT;
    50635060
    5064                 IOMMU_UNLOCK(pDevIns, pThisCC);
     5061                IOMMU_UNLOCK(pDevIns, pThisR3);
    50655062                int rc = PDMDevHlpPCIPhysRead(pDevIns, GCPhysCmdBufBase, pvCmds, cbCmdBuf);
    5066                 IOMMU_LOCK(pDevIns, pThisCC);
     5063                IOMMU_LOCK(pDevIns, pThisR3);
    50675064
    50685065                if (RT_SUCCESS(rc))
     
    50725069
    50735070                    /* Allow IOMMU to do other work while we process commands. */
    5074                     IOMMU_UNLOCK(pDevIns, pThisCC);
     5071                    IOMMU_UNLOCK(pDevIns, pThisR3);
    50755072
    50765073                    /* Process the fetched commands. */
     
    51085105                    iommuAmdCmdHwErrorEventRaise(pDevIns, &EvtCmdHwErr);
    51095106
    5110                     IOMMU_UNLOCK(pDevIns, pThisCC);
     5107                    IOMMU_UNLOCK(pDevIns, pThisR3);
    51115108                }
    51125109            }
    51135110            else
    5114                 IOMMU_UNLOCK(pDevIns, pThisCC);
     5111                IOMMU_UNLOCK(pDevIns, pThisR3);
    51155112        }
    51165113        else
    5117             IOMMU_UNLOCK(pDevIns, pThisCC);
     5114            IOMMU_UNLOCK(pDevIns, pThisR3);
    51185115    }
    51195116
     
    51355132    RT_NOREF(pThread);
    51365133    LogFlowFunc(("\n"));
    5137     PIOMMU pThis = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
     5134    PCIOMMU pThis = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
    51385135    return PDMDevHlpSUPSemEventSignal(pDevIns, pThis->hEvtCmdThread);
    51395136}
     
    62636260{
    62646261    PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns);
    6265     PIOMMU   pThis  = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
    6266     PIOMMUCC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUCC);
     6262    PIOMMU   pThis   = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
     6263    PIOMMUCC pThisR3 = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUCC);
    62676264    LogFlowFunc(("\n"));
    62686265
    6269     IOMMU_LOCK_NORET(pDevIns, pThisCC);
     6266    IOMMU_LOCK_NORET(pDevIns, pThisR3);
    62706267
    62716268    /* Close the command thread semaphore. */
     
    62786275#ifdef IOMMU_WITH_IOTLBE_CACHE
    62796276    /* Destroy the IOTLB cache. */
    6280     if (pThisCC->paIotlbes)
    6281     {
    6282         PDMDevHlpMMHeapFree(pDevIns, pThisCC->paIotlbes);
    6283         pThisCC->paIotlbes = NULL;
    6284         pThisCC->idxUnusedIotlbe = 0;
     6277    if (pThisR3->paIotlbes)
     6278    {
     6279        PDMDevHlpMMHeapFree(pDevIns, pThisR3->paIotlbes);
     6280        pThisR3->paIotlbes = NULL;
     6281        pThisR3->idxUnusedIotlbe = 0;
    62856282    }
    62866283#endif
    62876284
    6288     IOMMU_UNLOCK(pDevIns, pThisCC);
     6285    IOMMU_UNLOCK(pDevIns, pThisR3);
    62896286    return VINF_SUCCESS;
    62906287}
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