VirtualBox

Changeset 87834 in vbox for trunk/src/VBox/Devices/Bus


Ignore:
Timestamp:
Feb 22, 2021 3:26:40 PM (4 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
142898
Message:

AMD IOMMU: bugref:9654 SSM bits. Moved some R3 thread data to R3-only IOMMU struct.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp

    r87828 r87834  
    351351    /** The event semaphore the command thread waits on. */
    352352    SUPSEMEVENT                 hEvtCmdThread;
     353    /** Whether the command thread has been signaled for wake up. */
     354    bool volatile               fCmdThreadSignaled;
     355    /** Padding. */
     356    bool                        afPadding0[7];
    353357
    354358#ifdef IOMMU_WITH_DTE_CACHE
     
    565569    /** The command thread handle. */
    566570    R3PTRTYPE(PPDMTHREAD)       pCmdThread;
    567     /** Whether the command thread is sleeping. */
    568     bool volatile               fCmdThreadSleeping;
    569     /** Whether the command thread has been signaled for wake up. */
    570     bool volatile               fCmdThreadSignaled;
    571     /** Alignment padding. */
    572     uint8_t                     afPadding0[6];
    573571#ifdef IOMMU_WITH_IOTLBE_CACHE
    574572    /** Pointer to array of pre-allocated IOTLBEs. */
     
    12961294{
    12971295    PIOMMU   pThis   = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
    1298     PIOMMUCC pThisR3 = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUR3);
     1296    PIOMMUR3 pThisR3 = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUR3);
    12991297    IOMMU_LOCK_CACHE_NORET(pDevIns, pThis);
    13001298
     
    16591657
    16601658/**
    1661  * Wakes up the command thread if there are commands to be processed or if
    1662  * processing is requested to be stopped by software.
     1659 * Wakes up the command thread if there are commands to be processed.
    16631660 *
    16641661 * @param   pDevIns     The IOMMU device instance.
     
    16701667    Log4Func(("\n"));
    16711668
    1672     PCIOMMU pThis = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
    1673     if (pThis->Status.n.u1CmdBufRunning)
     1669    PIOMMU pThis = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
     1670    if (    pThis->Status.n.u1CmdBufRunning
     1671        &&  pThis->CmdBufTailPtr.n.off != pThis->CmdBufHeadPtr.n.off
     1672        && !ASMAtomicXchgBool(&pThis->fCmdThreadSignaled, true))
    16741673    {
    16751674        Log4Func(("Signaling command thread\n"));
     
    21362135                LogFunc(("Command buffer enabled\n"));
    21372136
    2138                 /* Wake up the command thread to start processing commands. */
     2137                /* Wake up the command thread to start processing commands if any. */
    21392138                iommuAmdCmdThreadWakeUpIfNeeded(pDevIns);
    21402139            }
     
    47684767{
    47694768    PIOMMU   pThis   = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
    4770     PIOMMUCC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUCC);
     4769    PIOMMUR3 pThisR3 = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUR3);
    47714770
    47724771    STAM_COUNTER_INC(&pThis->StatCmd);
     
    48034802                if (pCmdComWait->n.u1Interrupt)
    48044803                {
    4805                     IOMMU_LOCK(pDevIns, pThisCC);
     4804                    IOMMU_LOCK(pDevIns, pThisR3);
    48064805                    ASMAtomicOrU64(&pThis->Status.u64, IOMMU_STATUS_COMPLETION_WAIT_INTR);
    48074806                    bool const fRaiseInt = pThis->Ctrl.n.u1CompWaitIntrEn;
    4808                     IOMMU_UNLOCK(pDevIns, pThisCC);
     4807                    IOMMU_UNLOCK(pDevIns, pThisR3);
    48094808
    48104809                    if (fRaiseInt)
     
    49984997{
    49994998    PIOMMU   pThis   = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
    5000     PIOMMUCC pThisR3 = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUCC);
     4999    PIOMMUR3 pThisR3 = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUR3);
    50015000
    50025001    if (pThread->enmState == PDMTHREADSTATE_INITIALIZING)
     
    50175016         * Sleep perpetually until we are woken up to process commands.
    50185017         */
    5019         {
    5020             ASMAtomicWriteBool(&pThisR3->fCmdThreadSleeping, true);
    5021             bool fSignaled = ASMAtomicXchgBool(&pThisR3->fCmdThreadSignaled, false);
    5022             if (!fSignaled)
    5023             {
    5024                 Assert(ASMAtomicReadBool(&pThisR3->fCmdThreadSleeping));
    5025                 int rc = PDMDevHlpSUPSemEventWaitNoResume(pDevIns, pThis->hEvtCmdThread, RT_INDEFINITE_WAIT);
    5026                 AssertLogRelMsgReturn(RT_SUCCESS(rc) || rc == VERR_INTERRUPTED, ("%Rrc\n", rc), rc);
    5027                 if (RT_UNLIKELY(pThread->enmState != PDMTHREADSTATE_RUNNING))
    5028                     break;
    5029                 Log4Func(("Woken up with rc=%Rrc\n", rc));
    5030                 ASMAtomicWriteBool(&pThisR3->fCmdThreadSignaled, false);
    5031             }
    5032             ASMAtomicWriteBool(&pThisR3->fCmdThreadSleeping, false);
     5018        bool const fSignaled = ASMAtomicXchgBool(&pThis->fCmdThreadSignaled, false);
     5019        if (!fSignaled)
     5020        {
     5021            int rc = PDMDevHlpSUPSemEventWaitNoResume(pDevIns, pThis->hEvtCmdThread, RT_INDEFINITE_WAIT);
     5022            AssertLogRelMsgReturn(RT_SUCCESS(rc) || rc == VERR_INTERRUPTED, ("%Rrc\n", rc), rc);
     5023            if (RT_UNLIKELY(pThread->enmState != PDMTHREADSTATE_RUNNING))
     5024                break;
     5025            Log4Func(("Woken up with rc=%Rrc\n", rc));
     5026            ASMAtomicWriteBool(&pThis->fCmdThreadSignaled, false);
    50335027        }
    50345028
     
    51755169    }
    51765170
    5177     PIOMMUCC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUCC);
    5178     IOMMU_LOCK(pDevIns, pThisCC);
     5171    PIOMMUR3 pThisR3 = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUR3);
     5172    IOMMU_LOCK(pDevIns, pThisR3);
    51795173
    51805174    VBOXSTRICTRC rcStrict = VERR_IOMMU_IPE_3;
     
    52565250    }
    52575251
    5258     IOMMU_UNLOCK(pDevIns, pThisCC);
     5252    IOMMU_UNLOCK(pDevIns, pThisR3);
    52595253
    52605254    Log3Func(("uAddress=%#x (cb=%u) with %#x. rc=%Rrc\n", uAddress, cb, u32Value, VBOXSTRICTRC_VAL(rcStrict)));
     
    59725966            pHlp->pfnPrintf(pHlp, "IOTLBEs for domain %u (%#x):\n", uDomainId, uDomainId);
    59735967            PIOMMU   pThis   = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
    5974             PIOMMUCC pThisR3 = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUR3);
     5968            PIOMMUR3 pThisR3 = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUR3);
    59755969            IOTLBEINFOARG Args;
    59765970            Args.pIommuR3  = pThisR3;
     
    61286122
    61296123/**
     6124 * @callback_method_impl{FNSSMDEVLIVEEXEC}
     6125 */
     6126static DECLCALLBACK(int) iommuAmdR3LiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)
     6127{
     6128    PCIOMMU       pThis = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
     6129    PCPDMDEVHLPR3 pHlp  = pDevIns->pHlpR3;
     6130    RT_NOREF(uPass);
     6131    LogFlowFunc(("\n"));
     6132
     6133    /* Save registers that cannot be modified by the guest. */
     6134    pHlp->pfnSSMPutU64(pSSM, pThis->ExtFeat.u64);
     6135    pHlp->pfnSSMPutU64(pSSM, pThis->DevSpecificFeat.u64);
     6136    pHlp->pfnSSMPutU64(pSSM, pThis->DevSpecificCtrl.u64);
     6137    pHlp->pfnSSMPutU64(pSSM, pThis->DevSpecificStatus.u64);
     6138    pHlp->pfnSSMPutU64(pSSM, pThis->MiscInfo.u64);
     6139    pHlp->pfnSSMPutU64(pSSM, pThis->RsvdReg);
     6140
     6141    return VINF_SSM_DONT_CALL_AGAIN;
     6142}
     6143
     6144
     6145/**
    61306146 * @callback_method_impl{FNSSMDEVSAVEEXEC}
    61316147 */
    61326148static DECLCALLBACK(int) iommuAmdR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
    61336149{
    6134     /** @todo IOMMU: Save state. */
    6135     RT_NOREF2(pDevIns, pSSM);
     6150    PCIOMMU       pThis = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
     6151    PCPDMDEVHLPR3 pHlp  = pDevIns->pHlpR3;
    61366152    LogFlowFunc(("\n"));
     6153
     6154    pHlp->pfnSSMPutU64(pSSM, pThis->IommuBar.u64);
     6155
     6156    uint8_t const cDevTabBaseAddrs = RT_ELEMENTS(pThis->aDevTabBaseAddrs);
     6157    pHlp->pfnSSMPutU8(pSSM, cDevTabBaseAddrs);
     6158    for (uint8_t i = 0; i < cDevTabBaseAddrs; i++)
     6159        pHlp->pfnSSMPutU64(pSSM, pThis->aDevTabBaseAddrs[i].u64);
     6160    pHlp->pfnSSMPutU64(pSSM, pThis->CmdBufBaseAddr.u64);
     6161    pHlp->pfnSSMPutU64(pSSM, pThis->EvtLogBaseAddr.u64);
     6162    pHlp->pfnSSMPutU64(pSSM, pThis->Ctrl.u64);
     6163    pHlp->pfnSSMPutU64(pSSM, pThis->ExclRangeBaseAddr.u64);
     6164    pHlp->pfnSSMPutU64(pSSM, pThis->ExclRangeLimit.u64);
     6165#if 0
     6166    pHlp->pfnSSMPutU64(pSSM, pThis->ExtFeat.u64);  /* read-only, done in liveExec */
     6167#endif
     6168
     6169    pHlp->pfnSSMPutU64(pSSM, pThis->PprLogBaseAddr.u64);
     6170    pHlp->pfnSSMPutU64(pSSM, pThis->HwEvtHi.u64);
     6171    pHlp->pfnSSMPutU64(pSSM, pThis->HwEvtLo);
     6172    pHlp->pfnSSMPutU64(pSSM, pThis->HwEvtStatus.u64);
     6173
     6174    pHlp->pfnSSMPutU64(pSSM, pThis->GALogBaseAddr.u64);
     6175    pHlp->pfnSSMPutU64(pSSM, pThis->GALogTailAddr.u64);
     6176
     6177    pHlp->pfnSSMPutU64(pSSM, pThis->PprLogBBaseAddr.u64);
     6178    pHlp->pfnSSMPutU64(pSSM, pThis->EvtLogBBaseAddr.u64);
     6179
     6180#if 0
     6181    pHlp->pfnSSMPutU64(pSSM, pThis->DevSpecificFeat.u64);       /* read-only, done in liveExec */
     6182    pHlp->pfnSSMPutU64(pSSM, pThis->DevSpecificCtrl.u64);       /* read-only, done in liveExec */
     6183    pHlp->pfnSSMPutU64(pSSM, pThis->DevSpecificStatus.u64);     /* read-only, done in liveExec */
     6184#endif
     6185
     6186#if 0
     6187    pHlp->pfnSSMPutU64(pSSM, pThis->MiscInfo.u64);              /* read-only, done in liveExec */
     6188#endif
     6189    pHlp->pfnSSMPutU32(pSSM, pThis->PerfOptCtrl.u32);
     6190
     6191    pHlp->pfnSSMPutU64(pSSM, pThis->XtGenIntrCtrl.u64);
     6192    pHlp->pfnSSMPutU64(pSSM, pThis->XtPprIntrCtrl.u64);
     6193    pHlp->pfnSSMPutU64(pSSM, pThis->XtGALogIntrCtrl.u64);
     6194
     6195    size_t const cMarcApers = RT_ELEMENTS(pThis->aMarcApers);
     6196    pHlp->pfnSSMPutU8(pSSM, cMarcApers);
     6197    for (size_t i = 0; i < cMarcApers; i++)
     6198    {
     6199        pHlp->pfnSSMPutU64(pSSM, pThis->aMarcApers[i].Base.u64);
     6200        pHlp->pfnSSMPutU64(pSSM, pThis->aMarcApers[i].Reloc.u64);
     6201        pHlp->pfnSSMPutU64(pSSM, pThis->aMarcApers[i].Length.u64);
     6202    }
     6203
     6204#if 0
     6205    pHlp->pfnSSMPutU64(pSSM, pThis->RsvdReg);       /* read-only, done in liveExec */
     6206#endif
     6207
     6208    pHlp->pfnSSMPutU64(pSSM, pThis->CmdBufHeadPtr.u64);
     6209    pHlp->pfnSSMPutU64(pSSM, pThis->CmdBufTailPtr.u64);
     6210    pHlp->pfnSSMPutU64(pSSM, pThis->EvtLogHeadPtr.u64);
     6211    pHlp->pfnSSMPutU64(pSSM, pThis->EvtLogTailPtr.u64);
     6212
     6213    pHlp->pfnSSMPutU64(pSSM, pThis->Status.u64);
     6214
     6215    pHlp->pfnSSMPutU64(pSSM, pThis->PprLogHeadPtr.u64);
     6216    pHlp->pfnSSMPutU64(pSSM, pThis->PprLogTailPtr.u64);
     6217
     6218    pHlp->pfnSSMPutU64(pSSM, pThis->GALogHeadPtr.u64);
     6219    pHlp->pfnSSMPutU64(pSSM, pThis->GALogTailPtr.u64);
     6220
     6221    pHlp->pfnSSMPutU64(pSSM, pThis->PprLogBHeadPtr.u64);
     6222    pHlp->pfnSSMPutU64(pSSM, pThis->PprLogBTailPtr.u64);
     6223
     6224    pHlp->pfnSSMPutU64(pSSM, pThis->EvtLogBHeadPtr.u64);
     6225    pHlp->pfnSSMPutU64(pSSM, pThis->EvtLogBTailPtr.u64);
     6226
     6227    pHlp->pfnSSMPutU64(pSSM, pThis->PprLogAutoResp.u64);
     6228    pHlp->pfnSSMPutU64(pSSM, pThis->PprLogOverflowEarly.u64);
     6229    pHlp->pfnSSMPutU64(pSSM, pThis->PprLogBOverflowEarly.u64);
     6230
     6231    return pHlp->pfnSSMPutU32(pSSM, UINT32_MAX);
     6232}
     6233
     6234
     6235/**
     6236 * @callback_method_impl{FNSSMDEVLOADEXEC}
     6237 */
     6238static DECLCALLBACK(int) iommuAmdR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
     6239{
     6240    PIOMMU        pThis = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
     6241    PCPDMDEVHLPR3 pHlp  = pDevIns->pHlpR3;
     6242    LogFlowFunc(("\n"));
     6243
     6244    /* Validate. */
     6245    if (uPass != SSM_PASS_FINAL)
     6246        return VINF_SUCCESS;
     6247    if (uVersion != IOMMU_SAVED_STATE_VERSION)
     6248        return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
     6249    int const rcDataError = VERR_SSM_UNEXPECTED_DATA;
     6250
     6251    int rc = pHlp->pfnSSMGetU64(pSSM, &pThis->ExtFeat.u64);
     6252    AssertRCReturn(rc, rc);
     6253    AssertLogRelMsgReturn(pThis->ExtFeat.n.u2HostAddrTranslateSize < 0x3,
     6254                          ("ExtFeat invalid %#RX64\n", pThis->ExtFeat.u64), rcDataError);
     6255
     6256    pHlp->pfnSSMGetU64(pSSM, &pThis->DevSpecificFeat.u64);
     6257    pHlp->pfnSSMGetU64(pSSM, &pThis->DevSpecificCtrl.u64);
     6258    pHlp->pfnSSMGetU64(pSSM, &pThis->DevSpecificStatus.u64);
     6259    pHlp->pfnSSMGetU64(pSSM, &pThis->MiscInfo.u64);
     6260    pHlp->pfnSSMGetU64(pSSM, &pThis->RsvdReg);
     6261
     6262    /* Device table base address registers. */
     6263    uint8_t cDevTabBaseAddrs;
     6264    rc = pHlp->pfnSSMGetU8(pSSM, &cDevTabBaseAddrs);
     6265    AssertRCReturn(rc, rc);
     6266    AssertLogRelMsgReturn(cDevTabBaseAddrs <= RT_ELEMENTS(pThis->aDevTabBaseAddrs),
     6267                          ("Device table segment count invalid %#x\n", cDevTabBaseAddrs), rcDataError);
     6268    for (uint8_t i = 0; i < cDevTabBaseAddrs; i++)
     6269    {
     6270        rc = pHlp->pfnSSMGetU64(pSSM, &pThis->aDevTabBaseAddrs[i].u64);
     6271        AssertRCReturn(rc, rc);
     6272        pThis->aDevTabBaseAddrs[i].u64 &= IOMMU_DEV_TAB_BAR_VALID_MASK;
     6273        AssertLogRelMsgReturn(pThis->aDevTabBaseAddrs[i].n.u9Size <= g_auDevTabSegMaxSizes[0],
     6274                              ("Device table segment size invalid %#x\n", pThis->aDevTabBaseAddrs[i].n.u9Size), rcDataError);
     6275    }
     6276
     6277    /* Command buffer base address register. */
     6278    rc = pHlp->pfnSSMGetU64(pSSM, &pThis->CmdBufBaseAddr.u64);
     6279    AssertRCReturn(rc, rc);
     6280    pThis->CmdBufBaseAddr.u64 &= IOMMU_CMD_BUF_BAR_VALID_MASK;
     6281    AssertLogRelMsgReturn(pThis->CmdBufBaseAddr.n.u4Len >= 8,
     6282                          ("Command buffer base address invalid %#RX64\n", pThis->CmdBufBaseAddr.u64), rcDataError);
     6283
     6284    /* Event log base address register. */
     6285    pHlp->pfnSSMPutU64(pSSM, pThis->EvtLogBaseAddr.u64);
     6286    rc = pHlp->pfnSSMGetU64(pSSM, &pThis->EvtLogBaseAddr.u64);
     6287    AssertRCReturn(rc, rc);
     6288    pThis->EvtLogBaseAddr.u64 &= IOMMU_EVT_LOG_BAR_VALID_MASK;
     6289    AssertLogRelMsgReturn(pThis->EvtLogBaseAddr.n.u4Len >= 8,
     6290                          ("Event log base address invalid %#RX64\n", pThis->EvtLogBaseAddr.u64), rcDataError);
     6291
     6292    /* Control register. */
     6293    rc = pHlp->pfnSSMPutU64(pSSM, pThis->Ctrl.u64);
     6294    AssertRCReturn(rc, rc);
     6295    pThis->Ctrl.u64 &= IOMMU_CTRL_VALID_MASK;
     6296    AssertLogRelMsgReturn(pThis->Ctrl.n.u3DevTabSegEn <= pThis->ExtFeat.n.u2DevTabSegSup,
     6297                          ("Control register invalid %#RX64\n", pThis->Ctrl.u64), rcDataError);
     6298
     6299    /** @todo The rest. */
    61376300    return VERR_NOT_IMPLEMENTED;
    6138 }
    6139 
    6140 
    6141 /**
    6142  * @callback_method_impl{FNSSMDEVLOADEXEC}
    6143  */
    6144 static DECLCALLBACK(int) iommuAmdR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
    6145 {
    6146     /** @todo IOMMU: Load state. */
    6147     RT_NOREF4(pDevIns, pSSM, uVersion, uPass);
    6148     LogFlowFunc(("\n"));
    6149     return VERR_NOT_IMPLEMENTED;
     6301#if 0
     6302    pThis->ExclRangeBaseAddr.u64
     6303    pThis->ExclRangeLimit.u64
     6304#if 0
     6305    pThis->ExtFeat.u64;  /* read-only, done in liveExec */
     6306#endif
     6307
     6308    pThis->PprLogBaseAddr.u64);
     6309    pThis->HwEvtHi.u64);
     6310    pThis->HwEvtLo);
     6311    pThis->HwEvtStatus.u64);
     6312
     6313    pThis->GALogBaseAddr.u64);
     6314    pThis->GALogTailAddr.u64);
     6315
     6316    pThis->PprLogBBaseAddr.u64);
     6317    pThis->EvtLogBBaseAddr.u64);
     6318
     6319#if 0
     6320    pThis->DevSpecificFeat.u64);       /* read-only, done in liveExec */
     6321    pThis->DevSpecificCtrl.u64);       /* read-only, done in liveExec */
     6322    pThis->DevSpecificStatus.u64);     /* read-only, done in liveExec */
     6323#endif
     6324
     6325#if 0
     6326    pThis->MiscInfo.u64);              /* read-only, done in liveExec */
     6327#endif
     6328    pThis->PerfOptCtrl.u32);
     6329
     6330    pThis->XtGenIntrCtrl.u64);
     6331    pThis->XtPprIntrCtrl.u64);
     6332    pThis->XtGALogIntrCtrl.u64);
     6333
     6334    size_t const cMarcApers = RT_ELEMENTS(pThis->aMarcApers);
     6335    pHlp->pfnSSMPutU8(pSSM, cMarcApers);
     6336    for (size_t i = 0; i < cMarcApers; i++)
     6337    {
     6338        pHlp->pfnSSMPutU64(pSSM, pThis->aMarcApers[i].Base.u64);
     6339        pHlp->pfnSSMPutU64(pSSM, pThis->aMarcApers[i].Reloc.u64);
     6340        pHlp->pfnSSMPutU64(pSSM, pThis->aMarcApers[i].Length.u64);
     6341    }
     6342
     6343#if 0
     6344    pHlp->pfnSSMPutU64(pSSM, pThis->RsvdReg);       /* read-only, done in liveExec */
     6345#endif
     6346
     6347    pThis->CmdBufHeadPtr.u64);
     6348    pThis->CmdBufTailPtr.u64);
     6349    pThis->EvtLogHeadPtr.u64);
     6350    pThis->EvtLogTailPtr.u64);
     6351
     6352    pThis->Status.u64);
     6353
     6354    pThis->PprLogHeadPtr.u64);
     6355    pThis->PprLogTailPtr.u64);
     6356
     6357    pThis->GALogHeadPtr.u64);
     6358    pThis->GALogTailPtr.u64);
     6359
     6360    pThis->PprLogBHeadPtr.u64);
     6361    pThis->PprLogBTailPtr.u64);
     6362
     6363    pThis->EvtLogBHeadPtr.u64);
     6364    pThis->EvtLogBTailPtr.u64);
     6365
     6366    pThis->PprLogAutoResp.u64);
     6367    pThis->PprLogOverflowEarly.u64);
     6368    pThis->PprLogBOverflowEarly.u64);
     6369
     6370    return VINF_SUCCESS;
     6371#endif
    61506372}
    61516373
     
    61636385     */
    61646386    PIOMMU     pThis   = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
    6165     PIOMMUCC   pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUCC);
     6387    PIOMMUR3   pThisR3 = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUR3);
    61666388    PPDMPCIDEV pPciDev = pDevIns->apPciDevs[0];
    61676389    PDMPCIDEV_ASSERT_VALID(pDevIns, pPciDev);
    6168 
    6169     IOMMU_LOCK_NORET(pDevIns, pThisCC);
    6170 
    61716390    LogFlowFunc(("\n"));
    61726391
    6173     memset(&pThis->aDevTabBaseAddrs[0], 0, sizeof(pThis->aDevTabBaseAddrs));
     6392    IOMMU_LOCK_NORET(pDevIns, pThisR3);
     6393
     6394    RT_ZERO(pThis->aDevTabBaseAddrs);
    61746395
    61756396    pThis->CmdBufBaseAddr.u64        = 0;
     
    62096430    pThis->XtGALogIntrCtrl.u64       = 0;
    62106431
    6211     memset(&pThis->aMarcApers[0], 0, sizeof(pThis->aMarcApers));
     6432    RT_ZERO(pThis->aMarcApers);
    62126433
    62136434    pThis->CmdBufHeadPtr.u64         = 0;
     
    62406461    PDMPciDevSetCommand(pPciDev, VBOX_PCI_COMMAND_MASTER);
    62416462
    6242     IOMMU_UNLOCK(pDevIns, pThisCC);
     6463    IOMMU_UNLOCK(pDevIns, pThisR3);
    62436464
    62446465#ifdef IOMMU_WITH_DTE_CACHE
     
    62616482    PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns);
    62626483    PIOMMU   pThis   = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
    6263     PIOMMUCC pThisR3 = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUCC);
     6484    PIOMMUR3 pThisR3 = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUR3);
    62646485    LogFlowFunc(("\n"));
    62656486
     
    62976518
    62986519    PIOMMU   pThis   = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
    6299     PIOMMUCC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUCC);
     6520    PIOMMUR3 pThisR3 = PDMDEVINS_2_DATA_CC(pDevIns, PIOMMUR3);
    63006521    pThis->u32Magic = IOMMU_MAGIC;
    6301     pThisCC->pDevInsR3 = pDevIns;
     6522    pThisR3->pDevInsR3 = pDevIns;
    63026523
    63036524    LogFlowFunc(("iInstance=%d\n", iInstance));
     
    63136534    IommuReg.pfnMsiRemap      = iommuAmdMsiRemap;
    63146535    IommuReg.u32TheEnd        = PDM_IOMMUREGCC_VERSION;
    6315     int rc = PDMDevHlpIommuRegister(pDevIns, &IommuReg, &pThisCC->CTX_SUFF(pIommuHlp), &pThis->idxIommu);
     6536    int rc = PDMDevHlpIommuRegister(pDevIns, &IommuReg, &pThisR3->CTX_SUFF(pIommuHlp), &pThis->idxIommu);
    63166537    if (RT_FAILURE(rc))
    63176538        return PDMDEV_SET_ERROR(pDevIns, rc, N_("Failed to register ourselves as an IOMMU device"));
    6318     if (pThisCC->CTX_SUFF(pIommuHlp)->u32Version != PDM_IOMMUHLPR3_VERSION)
     6539    if (pThisR3->CTX_SUFF(pIommuHlp)->u32Version != PDM_IOMMUHLPR3_VERSION)
    63196540        return PDMDevHlpVMSetError(pDevIns, VERR_VERSION_MISMATCH, RT_SRC_POS,
    63206541                                   N_("IOMMU helper version mismatch; got %#x expected %#x"),
    6321                                    pThisCC->CTX_SUFF(pIommuHlp)->u32Version, PDM_IOMMUHLPR3_VERSION);
    6322     if (pThisCC->CTX_SUFF(pIommuHlp)->u32TheEnd != PDM_IOMMUHLPR3_VERSION)
     6542                                   pThisR3->CTX_SUFF(pIommuHlp)->u32Version, PDM_IOMMUHLPR3_VERSION);
     6543    if (pThisR3->CTX_SUFF(pIommuHlp)->u32TheEnd != PDM_IOMMUHLPR3_VERSION)
    63236544        return PDMDevHlpVMSetError(pDevIns, VERR_VERSION_MISMATCH, RT_SRC_POS,
    63246545                                   N_("IOMMU helper end-version mismatch; got %#x expected %#x"),
    6325                                    pThisCC->CTX_SUFF(pIommuHlp)->u32TheEnd, PDM_IOMMUHLPR3_VERSION);
     6546                                   pThisR3->CTX_SUFF(pIommuHlp)->u32TheEnd, PDM_IOMMUHLPR3_VERSION);
    63266547
    63276548    /*
     
    64516672     * Register saved state.
    64526673     */
    6453     rc = PDMDevHlpSSMRegisterEx(pDevIns, IOMMU_SAVED_STATE_VERSION, sizeof(IOMMU), NULL,
    6454                                 NULL, NULL, NULL,
    6455                                 NULL, iommuAmdR3SaveExec, NULL,
    6456                                 NULL, iommuAmdR3LoadExec, NULL);
     6674    rc = PDMDevHlpSSMRegister3(pDevIns, IOMMU_SAVED_STATE_VERSION, sizeof(IOMMU), iommuAmdR3LiveExec, iommuAmdR3SaveExec,
     6675                               iommuAmdR3LoadExec);
    64576676    AssertLogRelRCReturn(rc, rc);
    64586677
     
    65366755    RT_ZERO(szDevIommu);
    65376756    RTStrPrintf(szDevIommu, sizeof(szDevIommu), "IOMMU-%u", iInstance);
    6538     rc = PDMDevHlpThreadCreate(pDevIns, &pThisCC->pCmdThread, pThis, iommuAmdR3CmdThread, iommuAmdR3CmdThreadWakeUp,
     6757    rc = PDMDevHlpThreadCreate(pDevIns, &pThisR3->pCmdThread, pThis, iommuAmdR3CmdThread, iommuAmdR3CmdThreadWakeUp,
    65396758                               0 /* cbStack */, RTTHREADTYPE_IO, szDevIommu);
    65406759    AssertLogRelRCReturn(rc, rc);
     
    65636782     */
    65646783    size_t const cbIotlbes = sizeof(IOTLBE) * IOMMU_IOTLBE_MAX;
    6565     pThisCC->paIotlbes = (PIOTLBE)PDMDevHlpMMHeapAllocZ(pDevIns, cbIotlbes);
    6566     if (!pThisCC->paIotlbes)
     6784    pThisR3->paIotlbes = (PIOTLBE)PDMDevHlpMMHeapAllocZ(pDevIns, cbIotlbes);
     6785    if (!pThisR3->paIotlbes)
    65676786        return PDMDevHlpVMSetError(pDevIns, VERR_NO_MEMORY, RT_SRC_POS,
    65686787                                   N_("Failed to allocate %zu bytes from the hyperheap for the IOTLB cache."), cbIotlbes);
    6569     RTListInit(&pThisCC->LstLruIotlbe);
     6788    RTListInit(&pThisR3->LstLruIotlbe);
    65706789    LogRel(("%s: Allocated %zu bytes from the hyperheap for the IOTLB cache\n", IOMMU_LOG_PFX, cbIotlbes));
    65716790#endif
     
    66146833    //pThis->ExtFeat.n.u1ForcePhysDstSup       = 0;
    66156834
    6616     pThis->RsvdReg = 0;
    6617 
    66186835    pThis->DevSpecificFeat.u64   = 0;
    66196836    pThis->DevSpecificFeat.n.u4RevMajor = IOMMU_DEVSPEC_FEAT_MAJOR_VERSION;
     
    66296846
    66306847    pThis->MiscInfo.u64 = RT_MAKE_U64(uMiscInfoReg0, uMiscInfoReg1);
     6848
     6849    pThis->RsvdReg = 0;
    66316850
    66326851    /*
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