Changeset 87943 in vbox

Timestamp:

Mar 4, 2021 5:23:02 AM (4 years ago)

Author:

vboxsync

Message:

AMD IOMMU: bugref:9654 Lookup IOVAs from the IOTLB cache for bulk access requests as well.

File:

• trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp (modified) (5 diffs)

trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp

@@ -4087 +4087 @@
 
 /**
- * Lookups a memory access from the IOMMU cache.
+ * Lookups a memory access from the IOTLB cache.
  *
  * @returns VBox status code.
@@ -4108 +4108 @@
  *                          and permission-checked.
  */
-static int iommuAmdCacheLookup(PPDMDEVINS pDevIns, uint16_t idDevice, uint64_t uIova, size_t cbIova, uint8_t fPerm, IOMMUOP enmOp,
-                               PRTGCPHYS pGCPhysSpa, size_t *pcbContiguous)
+static int iommuAmdIotlbCacheLookup(PPDMDEVINS pDevIns, uint16_t idDevice, uint64_t uIova, size_t cbIova, uint8_t fPerm,
+                                    IOMMUOP enmOp, PRTGCPHYS pGCPhysSpa, size_t *pcbContiguous)
 {
     int rc;
@@ -4267 +4267 @@
 #ifdef IOMMU_WITH_IOTLBE_CACHE
         /* Lookup the IOVA from the cache. */
-        rc = iommuAmdCacheLookup(pDevIns, idDevice, uIova, cbIova, fPerm, enmOp, pGCPhysSpa, pcbContiguous);
+        rc = iommuAmdIotlbCacheLookup(pDevIns, idDevice, uIova, cbIova, fPerm, enmOp, pGCPhysSpa, pcbContiguous);
         if (rc == VINF_SUCCESS)
         {
@@ -4274 +4274 @@
             Assert(*pGCPhysSpa != NIL_RTGCPHYS);
             STAM_COUNTER_INC(&pThis->StatAccessCacheHitFull);
-            return rc;
+            return VINF_SUCCESS;
         }
         if (rc != VERR_OUT_OF_RANGE)
@@ -4351 +4351 @@
         LogFlowFunc(("%s: idDevice=%#x cIovas=%zu\n", iommuAmdMemAccessGetPermName(fPerm), idDevice, cIovas));
 
-        /** @todo IOMMU: IOTLB cache lookup. */
-
-        /* Lookup each IOVA from the device table. */
         for (size_t i = 0; i < cIovas; i++)
         {
+            int    rc;
             size_t cbContig;
-            int rc = iommuAmdDteLookup(pDevIns, idDevice, pauIovas[i], X86_PAGE_SIZE, fPerm, enmOp, &paGCPhysSpa[i], &cbContig);
+
+#ifdef IOMMU_WITH_IOTLBE_CACHE
+            /* Lookup the IOVA from the IOTLB cache. */
+            rc = iommuAmdIotlbCacheLookup(pDevIns, idDevice, pauIovas[i], X86_PAGE_SIZE, fPerm, enmOp, &paGCPhysSpa[i],
+                                          &cbContig);
+            if (rc == VINF_SUCCESS)
+            {
+                Assert(cbContig == X86_PAGE_SIZE);
+                Assert(paGCPhysSpa[i] != NIL_RTGCPHYS);
+                STAM_COUNTER_INC(&pThis->StatAccessCacheHitFull);
+                continue;
+            }
+            Assert(rc == VERR_NOT_FOUND || rc == VERR_IOMMU_ADDR_ACCESS_DENIED);
+            STAM_COUNTER_INC(&pThis->StatAccessCacheMiss);
+#endif
+
+            /* Lookup the IOVA from the device table. */
+            rc = iommuAmdDteLookup(pDevIns, idDevice, pauIovas[i], X86_PAGE_SIZE, fPerm, enmOp, &paGCPhysSpa[i], &cbContig);
             if (RT_SUCCESS(rc))
             { /* likely */ }