Changeset 8806 in vbox

Timestamp:

May 14, 2008 9:34:15 AM (17 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

30807

Message:

Determine which AMD cpus are really affected by erratum 170 (forced TLB flush on each world switch as a workaround)

Location:

trunk/src/VBox/VMM

Files:

• HWACCMInternal.h (modified) (1 diff)
• VMMR0/HWSVMR0.cpp (modified) (2 diffs)

trunk/src/VBox/VMM/HWACCMInternal.h

@@ -210 +210 @@
         /** Set if we don't have to flush the TLB on VM entry. */
         bool                        fResumeVM;
+        /** Set if erratum 170 affects the AMD cpu. */
+        bool                        fForceTLBFlush;
 
         /** R0 memory object for the VM control block (VMCB). */

trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

@@ -142 +142 @@
     /* Set all bits to intercept all MSR accesses. */
     ASMMemFill32(pVM->hwaccm.s.svm.pMSRBitmap, PAGE_SIZE*2, 0xffffffff);
+
+    /* Erratum 170 which requires a forced TLB flush for each world switch has been fixed in stepping 1 of the Brisbane core. 
+     * Family = 0x0f
+     * Model[7:0] = {ExtModel[3:0],BaseModel[3:0]} = 0x68 or 0x6b
+     * Stepping >= 1
+     */
+    uint32_t u32Dummy;
+    uint32_t u32Version, u32Family, u32Model, u32Stepping, u32ExtModel;
+    ASMCpuId(1, &u32Version, &u32Dummy, &u32Dummy, &u32Dummy);
+    u32Family    = (u32Version >> 8) & 0x0f;
+    u32Model     = (u32Version >> 4) & 0x0f;
+    u32ExtModel  = (u32Version >> 16) & 0x0f;
+    u32Stepping  = u32Version & 0xf;
+    if (    u32Family == 0xf
+        &&  (u32ExtModel == 0x6)
+        &&  (u32Model == 0x8 || u32Model == 0xb)
+        &&  u32Stepping == 0)
+    {
+        pVM->hwaccm.s.svm.fForceTLBFlush = true;
+    }
 
     return VINF_SUCCESS;
@@ -736 +756 @@
     STAM_PROFILE_ADV_START(&pVM->hwaccm.s.StatInGC, x);
 
-    /** Erratum #170 -> must force a TLB flush */
-    /** @todo supposed to be fixed in future by AMD */
-    fForceTLBFlush = true;
-
     if (    pVM->hwaccm.s.svm.fResumeVM == false
-        ||  fForceTLBFlush)
+        ||  pVM->hwaccm.s.svm.fForceTLBFlush)
     {
         pVMCB->ctrl.TLBCtrl.n.u1TLBFlush = 1;
     }
     else
-    {
         pVMCB->ctrl.TLBCtrl.n.u1TLBFlush = 0;
-    }
+
     /* In case we execute a goto ResumeExecution later on. */
     pVM->hwaccm.s.svm.fResumeVM = true;