- Timestamp:
- May 14, 2008 2:49:10 PM (17 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/HWACCM.cpp
r8155 r8816 426 426 if (pVM->hwaccm.s.fInitialized == false) 427 427 { 428 /* Erratum 170 which requires a forced TLB flush for each world switch: 429 * See http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/33610.pdf 430 * 431 * All BH-G1/2 and DH-G1/2 models include a fix: 432 * Athlon X2: 0x6b 1/2 433 * 0x68 1/2 434 * Athlon 64: 0x7f 1 435 * 0x6f 2 436 * Sempron: 0x7f 1/2 437 * 0x6f 2 438 * 0x6c 2 439 * 0x7c 2 440 * Turion 64: 0x68 2 441 * 442 */ 443 uint32_t u32Dummy; 444 uint32_t u32Version, u32Family, u32Model, u32Stepping; 445 ASMCpuId(1, &u32Version, &u32Dummy, &u32Dummy, &u32Dummy); 446 u32Family = ((u32Version >> 8) & 0xf) + (((u32Version >> 8) & 0xf) == 0xf ? (u32Version >> 20) & 0x7f : 0); 447 u32Model = ((u32Version >> 4) & 0xf); 448 u32Model = u32Model | ((u32Model == 0xf ? (u32Version >> 16) & 0x0f : 0) << 4); 449 u32Stepping = u32Version & 0xf; 450 if ( u32Family == 0xf 451 && !((u32Model == 0x68 || u32Model == 0x6b || u32Model == 0x7f) && u32Stepping >= 1) 452 && !((u32Model == 0x6f || u32Model == 0x6c || u32Model == 0x7c) && u32Stepping >= 2)) 453 { 454 LogRel(("HWACMM: AMD cpu with erratum 170 family %x model %x stepping %x\n", u32Family, u32Model, u32Stepping)); 455 } 456 428 457 LogRel(("HWACMM: cpuid 0x80000001.u32AMDFeatureECX = %VX32\n", pVM->hwaccm.s.cpuid.u32AMDFeatureECX)); 429 458 LogRel(("HWACMM: cpuid 0x80000001.u32AMDFeatureEDX = %VX32\n", pVM->hwaccm.s.cpuid.u32AMDFeatureEDX));
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