Changeset 88327 in vbox for trunk/src/VBox/Devices

Timestamp:

Mar 31, 2021 3:00:55 AM (4 years ago)

Author:

vboxsync

Message:

Intel IOMMU: bugref:9967 WIP.

Location:

trunk/src/VBox/Devices/Bus

Files:

• DevIommuIntel.cpp (modified) (7 diffs)
• DevIommuIntel.h (modified) (1 diff)

trunk/src/VBox/Devices/Bus/DevIommuIntel.cpp

@@ -30 +30 @@
 *   Defined Constants And Macros                                                                                                 *
 *********************************************************************************************************************************/
-/** @def VTD_LO_U32
- * Gets the low uint32_t of a uint64_t or something equivalent.
+/** Gets the low uint32_t of a uint64_t or something equivalent.
  *
  * This is suitable for casting constants outside code (since RT_LO_U32 can't be
@@ -37 +36 @@
 #define VTD_LO_U32(a)       (uint32_t)(UINT32_MAX & (a))
 
-/** @def VTD_HI_U32
- * Gets the high uint32_t of a uint64_t or something equivalent.
+/** Gets the high uint32_t of a uint64_t or something equivalent.
  *
  * This is suitable for casting constants outside code (since RT_HI_U32 can't be
@@ -44 +42 @@
 #define VTD_HI_U32(a)       (uint32_t)((a) >> 32)
 
-/** @def VTD_ASSERT_MMIO_ACCESS
- * Asserts MMIO access' offset and size are valid or returns appropriate error
+/** Asserts MMIO access' offset and size are valid or returns appropriate error
  * code suitable for returning from MMIO access handlers. */
 #define VTD_ASSERT_MMIO_ACCESS_RET(a_off, a_cb) \
@@ -53 +50 @@
     } while (0);
 
-/** @def VTD_IS_MMIO_OFF_VALID
- * Returns @c true if the MMIO offset is valid, or @c false otherwise. */
+/** Checks whether the MMIO offset is valid. */
 #define VTD_IS_MMIO_OFF_VALID(a_off)                (   (a_off) < VTD_MMIO_GROUP_0_OFF_END \
                                                      || (a_off) - VTD_MMIO_GROUP_1_OFF_FIRST < VTD_MMIO_GROUP_1_SIZE)
@@ -83 +79 @@
 #define VTD_MMIO_GROUP_1_OFF_FIRST                  VTD_MMIO_OFF_VCCAP_REG
 /** Offset of last register in group 1 (inclusive). */
-#define VTD_MMIO_GROUP_1_OFF_LAST                   VTD_MMIO_OFF_FRCD_LO_REG + 8 * VTD_FRCD_REG_COUNT
+#define VTD_MMIO_GROUP_1_OFF_LAST                   (VTD_MMIO_OFF_FRCD_LO_REG + 8) * VTD_FRCD_REG_COUNT
 /** Last valid offset in group 1 (exclusive). */
 #define VTD_MMIO_GROUP_1_OFF_END                    (VTD_MMIO_GROUP_1_OFF_LAST + 8 /* sizeof FRCD_HI_REG */)
@@ -428 +424 @@
     AssertMsg(VTD_IS_MMIO_OFF_VALID(offLast), ("off=%#x cb=%u\n", offReg, cbReg));
 
-    uint8_t *apbRegs[] = { &pThis->abRegs0[0], &pThis->abRegs1[0] };
+    uint8_t *const apbRegs[] = { &pThis->abRegs0[0], &pThis->abRegs1[0] };
     *pIdxGroup = !(offLast < VTD_MMIO_GROUP_0_OFF_END);
     return apbRegs[*pIdxGroup];
@@ -771 +767 @@
     AssertRCReturn(rc, rc);
 
+    /*
+     * Initialize PCI configuration registers.
+     */
+    PPDMPCIDEV pPciDev = pDevIns->apPciDevs[0];
+    PDMPCIDEV_ASSERT_VALID(pDevIns, pPciDev);
+
+    /* Header. */
+    PDMPciDevSetVendorId(pPciDev,          VTD_PCI_VENDOR_ID);         /* Intel */
+    PDMPciDevSetDeviceId(pPciDev,          VTD_PCI_DEVICE_ID);         /* VirtualBox DMAR device */
+    PDMPciDevSetRevisionId(pPciDev,        VTD_PCI_REVISION_ID);       /* VirtualBox specific device implementation revision */
+    PDMPciDevSetClassBase(pPciDev,         VBOX_PCI_CLASS_SYSTEM);     /* System Base Peripheral */
+    PDMPciDevSetClassSub(pPciDev,          VBOX_PCI_SUB_SYSTEM_OTHER); /* Other */
+    PDMPciDevSetHeaderType(pPciDev,        0x0);                       /* Single function, type 0 */
+    PDMPciDevSetSubSystemId(pPciDev,       VTD_PCI_DEVICE_ID);         /* VirtualBox DMAR device */
+    PDMPciDevSetSubSystemVendorId(pPciDev, VTD_PCI_VENDOR_ID);         /* Intel */
+
+    /** @todo VTD: Chipset spec says PCI Express Capability Id. Relevant for us? */
+    PDMPciDevSetStatus(pPciDev,            0);
+    PDMPciDevSetCapabilityList(pPciDev,    0);
+
+    /** @todo VTD: VTBAR at 0x180? */
+
+    /*
+     * Register the PCI function with PDM.
+     */
+    rc = PDMDevHlpPCIRegister(pDevIns, pPciDev);
+    AssertLogRelRCReturn(rc, rc);
+
+    /** @todo VTD: Register MSI but what's the MSI capability offset? */
+#if 0
+    /*
+     * Register MSI support for the PCI device.
+     * This must be done -after- registering it as a PCI device!
+     */
+#endif
 
     return VERR_NOT_IMPLEMENTED;

trunk/src/VBox/Devices/Bus/DevIommuIntel.h

@@ -24 +24 @@
 #include <VBox/iommu-intel.h>
 
+/** Intel vendor ID for the DMAR unit. */
+#define VTD_PCI_VENDOR_ID                           0x8086
+/** VirtualBox DMAR unit's device ID. */
+#define VTD_PCI_DEVICE_ID                           0xc0de
+/** VirtualBox DMAR unit's device revision ID. */
+#define VTD_PCI_REVISION_ID                         0x01
+
 /** Feature/capability flags exposed to the guest (x2APIC Opt Out until we get
  *  regular APIC setup working). */
 #define VTD_ACPI_DMAR_FLAGS                         (ACPI_DMAR_F_INTR_REMAP | ACPI_DMAR_F_X2APIC_OPT_OUT)
+
 /** The MMIO base address of the DMAR unit (taken from real hardware). */
 #define VTD_MMIO_BASE_ADDR                          0xfed90000