Changeset 88333 in vbox for trunk/src/VBox/Main/src-client

Timestamp:

Mar 31, 2021 4:29:39 PM (4 years ago)

Author:

vboxsync

Message:

Intel IOMMU: bugref:9967 ACPI, BusAssignmentManager and ConsoleImpl2 changes for VT-d PCI device.

Location:

trunk/src/VBox/Main/src-client

Files:

• BusAssignmentManager.cpp (modified) (4 diffs)
• ConsoleImpl2.cpp (modified) (8 diffs)

trunk/src/VBox/Main/src-client/BusAssignmentManager.cpp

@@ -238 +238 @@
  * to device number 23 when the VM is configured for an AMD IOMMU.
  */
-static const DeviceAssignmentRule g_aIch9IommuLsiRules[] =
+static const DeviceAssignmentRule g_aIch9IommuAmdRules[] =
 {
     /* AMD IOMMU. */
@@ -247 +247 @@
     /* Storage controller */
     {"lsilogic",      0, 23,  0, 1},
+    { NULL,          -1, -1, -1, 0}
+};
+#endif
+
+#ifdef VBOX_WITH_IOMMU_INTEL
+/*
+ * Intel IOMMU.
+ * The VT-d misc, address remapping, system management device is
+ * located at BDF 00:5:0 on real hardware so we mimick the same.
+ * LSI logic remains at 0:20:0.
+ */
+static const DeviceAssignmentRule g_aIch9IommuIntelRules[] =
+{
+    /* Intel IOMMU. */
+    {"iommu-intel",   0,  5,  0, 0},
+
+    /* Storage controller */
+    {"lsilogic",      0, 20,  0, 1},
     { NULL,          -1, -1, -1, 0}
 };
@@ -334 +352 @@
 HRESULT BusAssignmentManager::State::init(ChipsetType_T chipsetType, IommuType_T iommuType)
 {
-    /* Currently we only support AMD IOMMU. */
-    Assert(iommuType == IommuType_None || iommuType == IommuType_AMD);
+    if (iommuType != IommuType_None)
+    {
+#if defined(VBOX_WITH_IOMMU_AMD) && defined(VBOX_WITH_IOMMU_INTEL)
+        Assert(iommuType == IommuType_AMD || iommuType == IommuType_Intel);
+#elif defined(VBOX_WITH_IOMMU_AMD)
+        Assert(iommuType == IommuType_AMD);
+#elif defined(VBOX_WITH_IOMMU_INTEL)
+        Assert(iommuType == IommuType_Intel);
+#endif
+    }
 
     mChipsetType = chipsetType;
@@ -405 +431 @@
 #ifdef VBOX_WITH_IOMMU_AMD
             if (mIommuType == IommuType_AMD)
-                aArrays[2] = g_aIch9IommuLsiRules;
+                aArrays[2] = g_aIch9IommuAmdRules;
+            else
+#endif
+#ifdef VBOX_WITH_IOMMU_INTEL
+            if (mIommuType == IommuType_Intel)
+                aArrays[2] = g_aIch9IommuIntelRules;
             else
 #endif

trunk/src/VBox/Main/src-client/ConsoleImpl2.cpp

@@ -844 +844 @@
     }
 
-#ifdef VBOX_WITH_IOMMU_AMD
+#if defined(VBOX_WITH_IOMMU_AMD) || defined(VBOX_WITH_IOMMU_INTEL)
     IommuType_T iommuType;
     hrc = pMachine->COMGETTER(IommuType)(&iommuType);                                       H();
@@ -854 +854 @@
             iommuType = IommuType_AMD;
         else if (ASMIsIntelCpu())
-        {
+            iommuType = IommuType_Intel;
+        else
+        {
+            /** @todo Should we handle other CPUs like Shanghai, VIA etc. here? */
+            LogRel(("WARNING! Unrecognized CPU type, IOMMU disabled.\n"));
             iommuType = IommuType_None;
-            LogRel(("WARNING! Intel IOMMU implemention is not yet supported. Disabled IOMMU.\n"));
-        }
-        else
-        {
-            /** @todo Should we handle other CPUs like Shanghai, VIA etc. here? */
-            LogRel(("WARNING! Unrecognized CPU type. Disabled IOMMU.\n"));
-            iommuType = IommuType_None;
         }
     }
 
-    /* Handle AMD IOMMU specifics. */
-    if (   iommuType == IommuType_AMD
+    if (iommuType == IommuType_AMD)
+    {
+#ifndef VBOX_WITH_IOMMU_AMD
+        LogRel(("WARNING! AMD IOMMU not supported, IOMMU disabled.\n"));
+        iommuType = IommuType_None;
+#endif
+    }
+    if (iommuType != IommuType_Intel)
+    {
+#ifndef VBOX_WITH_IOMMU_INTEL
+        LogRel(("WARNING! Intel IOMMU not supported, IOMMU disabled.\n"));
+        iommuType = IommuType_None;
+#endif
+    }
+    if (   (iommuType == IommuType_AMD || iommuType == IommuType_Intel)
         && chipsetType != ChipsetType_ICH9)
-        return VMR3SetError(pUVM, VERR_INVALID_PARAMETER, RT_SRC_POS,
-                            N_("AMD IOMMU uses MSIs which requires the ICH9 chipset implementation."));
-
-    /** @todo Handle Intel IOMMU specifics. */
+            return VMR3SetError(pUVM, VERR_INVALID_PARAMETER, RT_SRC_POS,
+                                N_("IOMMU uses MSIs which requires the ICH9 chipset implementation."));
 #else
     IommuType_T const iommuType = IommuType_None;
@@ -1575 +1583 @@
 #endif
 
-#ifdef VBOX_WITH_IOMMU_AMD
             if (iommuType == IommuType_AMD)
             {
@@ -1583 +1590 @@
                 InsertConfigInteger(pInst, "Trusted",   1); /* boolean */
                 InsertConfigNode(pInst,    "Config", &pCfg);
-                hrc = pBusMgr->assignPCIDevice("iommu-amd", pInst);                             H();
+                hrc = pBusMgr->assignPCIDevice("iommu-amd", pInst);                         H();
 
                 /*
@@ -1592 +1599 @@
                 hrc = pBusMgr->assignPCIDevice("sb-ioapic", NULL /* pCfg */, PCIAddr, true /*fGuestAddressRequired*/);  H();
             }
-#endif
-        }
-        /** @todo IOMMU: Disallow creating a VM without ICH9 chipset if an IOMMU is
-         *        configured. */
+            else if (iommuType == IommuType_Intel)
+            {
+                /* Intel IOMMU. */
+                InsertConfigNode(pDevices, "iommu-intel", &pDev);
+                InsertConfigNode(pDev,     "0", &pInst);
+                InsertConfigInteger(pInst, "Trusted",   1); /* boolean */
+                InsertConfigNode(pInst,    "Config", &pCfg);
+                hrc = pBusMgr->assignPCIDevice("iommu-intel", pInst);                       H();
+            }
+        }
 
         /*
@@ -3361 +3374 @@
                 }
             }
-#ifdef VBOX_WITH_IOMMU_AMD
             if (iommuType == IommuType_AMD)
             {
@@ -3369 +3381 @@
                     uint32_t u32IommuAddress = (Address.miDevice << 16) | Address.miFn;
                     InsertConfigInteger(pCfg, "IommuAmdEnabled", true);
-                    InsertConfigInteger(pCfg, "IommuAmdPciAddress", u32IommuAddress);
+                    InsertConfigInteger(pCfg, "IommuPciAddress", u32IommuAddress);
                     if (pBusMgr->findPCIAddress("sb-ioapic", 0, Address))
                     {
@@ -3379 +3391 @@
                 }
             }
-#endif
+            else if (iommuType == IommuType_Intel)
+            {
+                PCIBusAddress Address;
+                if (pBusMgr->findPCIAddress("iommu-intel", 0, Address))
+                {
+                    uint32_t u32IommuAddress = (Address.miDevice << 16) | Address.miFn;
+                    InsertConfigInteger(pCfg, "IommuIntelEnabled", true);
+                    InsertConfigInteger(pCfg, "IommuPciAddress", u32IommuAddress);
+                }
+            }
+
             InsertConfigInteger(pCfg,  "IocPciAddress", uIocPCIAddress);
             if (chipsetType == ChipsetType_ICH9)