Changeset 88352 in vbox for trunk/src

Timestamp:

Apr 2, 2021 9:51:40 PM (4 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

143596

Message:

Forward ported r143587+r143588 from 6.1: DevHPET: Dropped the u32Period field in favor of picking the constant accorting to fIch9. ​Nits. oem2ticketref:40

File:

• trunk/src/VBox/Devices/PC/DevHPET.cpp (modified) (11 diffs)

trunk/src/VBox/Devices/PC/DevHPET.cpp

@@ -28 +28 @@
 #include <VBox/vmm/stam.h>
 #include <VBox/log.h>
-#include <iprt/assert.h>
+#include <VBox/AssertGuest.h>
 #include <iprt/asm-math.h>
 #include <iprt/string.h>
@@ -231 +231 @@
     /** @name Hidden register state.
      * @{ */
-    /** Last value written to comparator. */
+    /** Accumulator / Last value written to comparator. */
     uint64_t                    u64Period;
     /** @} */
@@ -261 +261 @@
     /** Capabilities. */
     uint32_t                    u32Capabilities;
-    /** HPET_PERIOD - . */
-    uint32_t                    u32Period;
+    /** Used to be u32Period.  We only implement two period values depending on
+     * fIch9, and since we usually would have to RT_MIN(u32Period,1) we could
+     * just as well select between HPET_CLK_PERIOD_ICH9 and HPET_CLK_PERIOD_PIIX. */
+    uint32_t                    u32Padding;
     /** Configuration. */
     uint64_t                    u64HpetConfig;
@@ -360 +362 @@
 DECLINLINE(uint64_t) hpetTicksToNs(PHPET pThis, uint64_t value)
 {
-    return ASMMultU64ByU32DivByU32(value,  pThis->u32Period, FS_PER_NS);
+    return ASMMultU64ByU32DivByU32(value, pThis->fIch9 ? HPET_CLK_PERIOD_ICH9 : HPET_CLK_PERIOD_PIIX, FS_PER_NS);
 }
 
 DECLINLINE(uint64_t) nsToHpetTicks(PCHPET pThis, uint64_t u64Value)
 {
-    return ASMMultU64ByU32DivByU32(u64Value, FS_PER_NS, RT_MAX(pThis->u32Period, 1 /* no div/zero */));
+    return ASMMultU64ByU32DivByU32(u64Value, FS_PER_NS, pThis->fIch9 ? HPET_CLK_PERIOD_ICH9 : HPET_CLK_PERIOD_PIIX);
 }
 
@@ -693 +695 @@
                     {
                         Log(("HPET[%u]: Changing timer to 32-bit mode.\n", iTimerNo));
+                        /* Clear the top bits of the comparator and period to be on the safe side. */
                         ASMAtomicUoWriteU64(&pHpetTimer->u64Cmp,    (uint32_t)pHpetTimer->u64Cmp);
                         ASMAtomicUoWriteU64(&pHpetTimer->u64Period, (uint32_t)pHpetTimer->u64Period);
@@ -707 +710 @@
                     {
                         LogRelMax(10, ("HPET[%u]: Level-triggered config not yet supported\n", iTimerNo));
-                        AssertFailed();
+                        ASSERT_GUEST_MSG_FAILED(("Level-triggered config not yet supported"));
                     }
                 }
@@ -876 +879 @@
 
         case HPET_PERIOD:
-            DEVHPET_LOCK_RETURN(pDevIns, pThis, VINF_IOM_R3_MMIO_READ);
-            u32Value = pThis->u32Period;
-            DEVHPET_UNLOCK(pDevIns, pThis);
+            u32Value = pThis->fIch9 ? HPET_CLK_PERIOD_ICH9 : HPET_CLK_PERIOD_PIIX;
             Log(("read HPET_PERIOD: %#x\n", u32Value));
             break;
@@ -1369 +1370 @@
                     "HPET status:\n"
                     " config=%016RX64     isr=%016RX64\n"
-                    " offset=%016RX64 counter=%016RX64 frequency=%08x\n"
+                    " offset=%016RX64 counter=%016RX64 frequency=%u fs\n"
                     " legacy-mode=%s  timer-count=%u\n",
                     pThis->u64HpetConfig, pThis->u64Isr,
-                    pThis->u64HpetOffset, pThis->u64HpetCounter, pThis->u32Period,
+                    pThis->u64HpetOffset, pThis->u64HpetCounter, pThis->fIch9 ? HPET_CLK_PERIOD_ICH9 : HPET_CLK_PERIOD_PIIX,
                     !!(pThis->u64HpetConfig & HPET_CFG_LEGACY) ? "on " : "off",
                     HPET_CAP_GET_TIMERS(pThis->u32Capabilities));
@@ -1436 +1437 @@
 
     pHlp->pfnSSMPutU64(pSSM, pThis->u64HpetOffset);
-    uint64_t u64CapPer = RT_MAKE_U64(pThis->u32Capabilities, pThis->u32Period);
+    uint64_t u64CapPer = RT_MAKE_U64(pThis->u32Capabilities, pThis->fIch9 ? HPET_CLK_PERIOD_ICH9 : HPET_CLK_PERIOD_PIIX);
     pHlp->pfnSSMPutU64(pSSM, u64CapPer);
     pHlp->pfnSSMPutU64(pSSM, pThis->u64HpetConfig);
@@ -1512 +1513 @@
 
     pThis->u32Capabilities  = RT_LO_U32(u64CapPer);
-    pThis->u32Period        = RT_HI_U32(u64CapPer);
+    uint32_t const uExpectedPeriod = pThis->fIch9 ? HPET_CLK_PERIOD_ICH9 : HPET_CLK_PERIOD_PIIX;
+    if (RT_HI_U32(u64CapPer) != uExpectedPeriod)
+        return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch - Expected period %RU32 fs, loaded %RU32 fs"),
+                                       uExpectedPeriod, RT_HI_U32(u64CapPer));
 
     /*
@@ -1599 +1603 @@
     AssertCompile(HPET_NUM_TIMERS_PIIX <= RT_ELEMENTS(pThis->aTimers));
 
-    pThis->u32Period = pThis->fIch9 ? HPET_CLK_PERIOD_ICH9 : HPET_CLK_PERIOD_PIIX;
 
     /*