Changeset 88370 in vbox for trunk/src/VBox/Devices

Timestamp:

Apr 5, 2021 12:16:49 PM (4 years ago)

Author:

vboxsync

Message:

Intel IOMMU: bugref:9967 WIP.

File:

• trunk/src/VBox/Devices/Bus/DevIommuIntel.cpp (modified) (4 diffs)

trunk/src/VBox/Devices/Bus/DevIommuIntel.cpp

@@ -112 +112 @@
     /** DMAR registers (group 1). */
     uint8_t                     abRegs1[DMAR_MMIO_GROUP_1_SIZE];
+
+#ifdef VBOX_WITH_STATISTICS
+    STAMCOUNTER                 StatMmioReadR3;         /**< Number of MMIO reads in R3. */
+    STAMCOUNTER                 StatMmioReadRZ;         /**< Number of MMIO reads in RZ. */
+    STAMCOUNTER                 StatMmioWriteR3;        /**< Number of MMIO writes in R3. */
+    STAMCOUNTER                 StatMmioWriteRZ;        /**< Number of MMIO writes in RZ. */
+
+    STAMCOUNTER                 StatMsiRemapR3;         /**< Number of MSI remap requests in R3. */
+    STAMCOUNTER                 StatMsiRemapRZ;         /**< Number of MSI remap requests in RZ. */
+
+    STAMCOUNTER                 StatMemReadR3;          /**< Number of memory read translation requests in R3. */
+    STAMCOUNTER                 StatMemReadRZ;          /**< Number of memory read translation requests in RZ. */
+    STAMCOUNTER                 StatMemWriteR3;         /**< Number of memory write translation requests in R3. */
+    STAMCOUNTER                 StatMemWriteRZ;         /**< Number of memory write translation requests in RZ. */
+
+    STAMCOUNTER                 StatMemBulkReadR3;      /**< Number of memory read bulk translation requests in R3. */
+    STAMCOUNTER                 StatMemBulkReadRZ;      /**< Number of memory read bulk translation requests in RZ. */
+    STAMCOUNTER                 StatMemBulkWriteR3;     /**< Number of memory write bulk translation requests in R3. */
+    STAMCOUNTER                 StatMemBulkWriteRZ;     /**< Number of memory write bulk translation requests in RZ. */
+#endif
 } DMAR;
 /** Pointer to the DMAR device state. */
@@ -666 +686 @@
     DMAR_ASSERT_MMIO_ACCESS_RET(off, cb);
 
-    PDMAR          pThis   = PDMDEVINS_2_DATA(pDevIns, PDMAR);
+    PDMAR pThis = PDMDEVINS_2_DATA(pDevIns, PDMAR);
+    STAM_COUNTER_INC(&pThis->CTX_SUFF_Z(StatMmioWrite));
+
     uint16_t const offReg  = off;
     uint16_t const offLast = offReg + cb - 1;
@@ -699 +721 @@
     DMAR_ASSERT_MMIO_ACCESS_RET(off, cb);
 
-    PDMAR          pThis   = PDMDEVINS_2_DATA(pDevIns, PDMAR);
+    PDMAR pThis = PDMDEVINS_2_DATA(pDevIns, PDMAR);
+    STAM_COUNTER_INC(&pThis->CTX_SUFF_Z(StatMmioRead));
+
     uint16_t const offReg  = off;
     uint16_t const offLast = offReg + cb - 1;
@@ -834 +858 @@
     AssertRCReturn(rc, rc);
 
-    LogRel(("%s: Cap=%#RX64 Ext. Cap=%#RX64\n", DMAR_LOG_PFX, dmarRegRead64(pThis, VTD_MMIO_OFF_CAP_REG),
+# ifdef VBOX_WITH_STATISTICS
+    /*
+     * Statistics.
+     */
+    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMmioReadR3,  STAMTYPE_COUNTER, "R3/MmioRead",  STAMUNIT_OCCURENCES, "Number of MMIO reads in R3");
+    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMmioReadRZ,  STAMTYPE_COUNTER, "RZ/MmioRead",  STAMUNIT_OCCURENCES, "Number of MMIO reads in RZ.");
+
+    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMmioWriteR3, STAMTYPE_COUNTER, "R3/MmioWrite", STAMUNIT_OCCURENCES, "Number of MMIO writes in R3.");
+    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMmioWriteRZ, STAMTYPE_COUNTER, "RZ/MmioWrite", STAMUNIT_OCCURENCES, "Number of MMIO writes in RZ.");
+
+    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMsiRemapR3, STAMTYPE_COUNTER, "R3/MsiRemap", STAMUNIT_OCCURENCES, "Number of interrupt remap requests in R3.");
+    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMsiRemapRZ, STAMTYPE_COUNTER, "RZ/MsiRemap", STAMUNIT_OCCURENCES, "Number of interrupt remap requests in RZ.");
+
+    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMemReadR3,  STAMTYPE_COUNTER, "R3/MemRead",  STAMUNIT_OCCURENCES, "Number of memory read translation requests in R3.");
+    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMemReadRZ,  STAMTYPE_COUNTER, "RZ/MemRead",  STAMUNIT_OCCURENCES, "Number of memory read translation requests in RZ.");
+
+    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMemWriteR3,  STAMTYPE_COUNTER, "R3/MemWrite",  STAMUNIT_OCCURENCES, "Number of memory write translation requests in R3.");
+    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMemWriteRZ,  STAMTYPE_COUNTER, "RZ/MemWrite",  STAMUNIT_OCCURENCES, "Number of memory write translation requests in RZ.");
+
+    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMemBulkReadR3,  STAMTYPE_COUNTER, "R3/MemBulkRead",  STAMUNIT_OCCURENCES, "Number of memory bulk read translation requests in R3.");
+    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMemBulkReadRZ,  STAMTYPE_COUNTER, "RZ/MemBulkRead",  STAMUNIT_OCCURENCES, "Number of memory bulk read translation requests in RZ.");
+
+    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMemBulkWriteR3, STAMTYPE_COUNTER, "R3/MemBulkWrite", STAMUNIT_OCCURENCES, "Number of memory bulk write translation requests in R3.");
+    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMemBulkWriteRZ, STAMTYPE_COUNTER, "RZ/MemBulkWrite", STAMUNIT_OCCURENCES, "Number of memory bulk write translation requests in RZ.");
+# endif
+
+    LogRel(("%s: Capabilities=%#RX64 Extended-Capabilities=%#RX64\n", DMAR_LOG_PFX, dmarRegRead64(pThis, VTD_MMIO_OFF_CAP_REG),
             dmarRegRead64(pThis, VTD_MMIO_OFF_ECAP_REG)));
     return VINF_SUCCESS;