Changeset 8853 in vbox for trunk/src/VBox/VMM/VMMAll

Timestamp:

May 15, 2008 1:57:31 PM (17 years ago)

Author:

vboxsync

Message:

Manual page invalidation or TLB flush is required for AMD-V.

File:

• trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp (modified) (2 diffs)

trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

@@ -908 +908 @@
 static int pgmPoolCacheFreeOne(PPGMPOOL pPool, uint16_t iUser)
 {
+#ifdef IN_RING0
+    const PVM pVM = pPool->CTXSUFF(pVM);
+#endif
     Assert(pPool->iAgeHead != pPool->iAgeTail); /* We shouldn't be here if there < 2 cached entries! */
     STAM_COUNTER_INC(&pPool->StatCacheFreeUpOne);
@@ -1032 +1035 @@
 static int pgmPoolCacheAlloc(PPGMPOOL pPool, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, uint16_t iUser, uint16_t iUserTable, PPPGMPOOLPAGE ppPage)
 {
+#ifdef IN_RING0
+    const PVM pVM = pPool->CTXSUFF(pVM);
+#endif
     /*
      * Look up the GCPhys in the hash.