Changeset 88695 in vbox for trunk/src/VBox/Devices
- Timestamp:
- Apr 25, 2021 7:08:49 AM (4 years ago)
- File:
-
- 1 edited
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- Unmodified
- Added
- Removed
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trunk/src/VBox/Devices/Bus/DevIommuIntel.cpp
r88694 r88695 144 144 kDmarDiag_IqtReg_Qt_NotAligned, 145 145 kDmarDiag_IqaReg_Dw_Invalid, 146 kDmarDiag_CcmdReg_Ttm_Invalid, 147 kDmarDiag_CcmdReg_Qi_Enabled, 148 kDmarDiag_CcmdReg_NotSupported, 146 149 /* Last member for determining array index limit. */ 147 150 kDmarDiag_End … … 157 160 DMARDIAG_DESC(kNone , "None" ), 158 161 DMARDIAG_DESC(kDmarDiag_IqtReg_Qt_NotAligned, "IqtReg_Qt_NotAligned"), 159 DMARDIAG_DESC(kDmarDiag_IqaReg_Dw_Invalid , "IqaReg_Dw_Invalid" ) 162 DMARDIAG_DESC(kDmarDiag_IqaReg_Dw_Invalid , "IqaReg_Dw_Invalid" ), 163 DMARDIAG_DESC(kDmarDiag_CcmdReg_Ttm_Invalid , "CcmdReg_Ttm_Invalid" ), 164 DMARDIAG_DESC(kDmarDiag_CcmdReg_Qi_Enabled , "CcmdReg_Qi_Enabled" ), 165 DMARDIAG_DESC(kDmarDiag_CcmdReg_NotSupported, "CcmdReg_NotSupported") 160 166 /* kDmarDiag_End */ 161 167 }; … … 172 178 /** DMAR magic. */ 173 179 uint32_t u32Magic; 174 175 /** The MMIO handle. */176 IOMMMIOHANDLE hMmio;177 /** The event semaphore the invalidation-queue thread waits on. */178 SUPSEMEVENT hEvtInvQueue;179 /** Whether the invalidation-queue thread has been signaled. */180 bool volatile fInvQueueThreadSignaled;181 /** Padding. */182 bool afPadding0[3];183 /** Error diagnostic. */184 DMARDIAG enmDiag;185 180 186 181 /** Registers (group 0). */ … … 200 195 uint64_t fExtCap; 201 196 /** @} */ 197 198 /** The event semaphore the invalidation-queue thread waits on. */ 199 SUPSEMEVENT hEvtInvQueue; 200 /** Whether the invalidation-queue thread has been signaled. */ 201 bool volatile fInvQueueThreadSignaled; 202 /** Padding. */ 203 bool afPadding0[3]; 204 /** Error diagnostic. */ 205 DMARDIAG enmDiag; 206 /** The MMIO handle. */ 207 IOMMMIOHANDLE hMmio; 202 208 203 209 #ifdef VBOX_WITH_STATISTICS … … 864 870 uint64_t const uIqtReg = dmarRegReadRaw64(pThis, VTD_MMIO_OFF_IQT_REG); 865 871 uint64_t const uIqhReg = dmarRegReadRaw64(pThis, VTD_MMIO_OFF_IQH_REG); 866 867 uint32_t const offQt = VTD_IQT_REG_GET_QT(uIqtReg);868 uint32_t const offQh = VTD_IQH_REG_GET_QH(uIqhReg);869 return offQt == offQh;872 /* Don't bother masking out QT, QH out of IQT_REG, IQH_REG since all other bits are RsvdZ. */ 873 Assert(!(uIqtReg & ~VTD_BF_IQT_REG_QT_MASK)); 874 Assert(!(uIqhReg & ~VTD_BF_IQH_REG_QH_MASK)); 875 return uIqtReg == uIqhReg; 870 876 } 871 877 … … 906 912 DMAR_ASSERT_LOCK_IS_OWNER(pDevIns, pThisCC); 907 913 908 if ( dmarInvQueueCanProcessRequests(pThis)914 if ( dmarInvQueueCanProcessRequests(pThis) 909 915 && !dmarInvQueueIsEmpty(pThis) 910 916 && !ASMAtomicXchgBool(&pThis->fInvQueueThreadSignaled, true)) … … 1085 1091 if (uMajorVersion < 6) 1086 1092 { 1087 /** @todo Verify queued-invalidation is not enabled. 1088 * See Intel VT-d spec. 6.5.1 "Register-based Invalidation Interface" */ 1089 1090 /* Verify table translation mode is legacy. */ 1091 uint8_t const fTtm = dmarRtAddrRegGetTtm(pThis); 1092 if (fTtm == VTD_TTM_LEGACY_MODE) 1093 /* Register-based invalidation can only be used when queued-invalidations are not enabled. */ 1094 uint32_t const uGstsReg = dmarRegReadRaw32(pThis, VTD_MMIO_OFF_GSTS_REG); 1095 if (!(uGstsReg & VTD_BF_GSTS_REG_QIES_MASK)) 1093 1096 { 1094 /** @todo Invalidate. */ 1095 return VINF_SUCCESS; 1097 /* Verify table translation mode is legacy. */ 1098 uint8_t const fTtm = dmarRtAddrRegGetTtm(pThis); 1099 if (fTtm == VTD_TTM_LEGACY_MODE) 1100 { 1101 /** @todo Invalidate. */ 1102 return VINF_SUCCESS; 1103 } 1104 pThis->enmDiag = kDmarDiag_CcmdReg_Ttm_Invalid; 1096 1105 } 1106 else 1107 pThis->enmDiag = kDmarDiag_CcmdReg_Qi_Enabled; 1097 1108 } 1098 1099 /** @todo Record error. */ 1109 else 1110 pThis->enmDiag = kDmarDiag_CcmdReg_NotSupported; 1111 dmarRegChangeRaw64(pThis, VTD_MMIO_OFF_GSTS_REG, ~VTD_BF_CCMD_REG_CAIG_MASK /* fAndMask */, 0 /* fOrMask */); 1100 1112 } 1101 1113 } … … 1118 1130 PDMAR pThis = PDMDEVINS_2_DATA(pDevIns, PDMAR); 1119 1131 1120 uint32_t const offQt = VTD_IQT_REG_GET_QT(uIqtReg); 1132 /* Paranoia. */ 1133 Assert(!(uIqtReg & ~VTD_BF_IQT_REG_QT_MASK)); 1134 1135 uint32_t const offQt = uIqtReg; 1121 1136 uint64_t const uIqaReg = dmarRegReadRaw64(pThis, VTD_MMIO_OFF_IQA_REG); 1122 1137 uint8_t const fDw = RT_BF_GET(uIqaReg, VTD_BF_IQA_REG_DW);
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