Changeset 8878 in vbox for trunk/src/VBox/VMM

Timestamp:

May 16, 2008 10:59:52 AM (17 years ago)

Author:

vboxsync

Message:

Don't automatically flush the TLB when we remain on the same cpu (on entry).

Location:

trunk/src/VBox/VMM

Files:

• HWACCMInternal.h (modified) (3 diffs)
• VMMR0/HWACCMR0.cpp (modified) (2 diffs)
• VMMR0/HWSVMR0.cpp (modified) (2 diffs)
• VMMR0/HWSVMR0.h (modified) (1 diff)

trunk/src/VBox/VMM/HWACCMInternal.h

@@ -206 +206 @@
         /** Set by the ring-0 driver to indicate SVM is supported by the CPU. */
         bool                        fSupported;
-
         /** Set when we've enabled SVM. */
         bool                        fEnabled;
-
         /** Set if we don't have to flush the TLB on VM entry. */
         bool                        fResumeVM;
@@ -216 +214 @@
         /** Set if we need to flush the TLB during the world switch. */
         bool                        fForceTLBFlush;
+
+        /* Id of the last cpu we were executing code on (NIL_RTCPUID for the first time) */
+        RTCPUID                     idLastCpu;
 
         /** R0 memory object for the VM control block (VMCB). */
@@ -330 +331 @@
 typedef HWACCM *PHWACCM;
 
-static struct
-{
-    struct
-    {
-        RTR0MEMOBJ  pMemObj;
-        bool        fVMXConfigured;
-        bool        fSVMConfigured;
-    } aCpuInfo[RTCPUSET_MAX_CPUS];
-
-    struct
-    {
-        /** Set by the ring-0 driver to indicate VMX is supported by the CPU. */
-        bool                        fSupported;
-
-        /** Host CR4 value (set by ring-0 VMX init) */
-        uint64_t                    hostCR4;
-
-        /** VMX MSR values */
-        struct
-        {
-            uint64_t                feature_ctrl;
-            uint64_t                vmx_basic_info;
-            uint64_t                vmx_pin_ctls;
-            uint64_t                vmx_proc_ctls;
-            uint64_t                vmx_exit;
-            uint64_t                vmx_entry;
-            uint64_t                vmx_misc;
-            uint64_t                vmx_cr0_fixed0;
-            uint64_t                vmx_cr0_fixed1;
-            uint64_t                vmx_cr4_fixed0;
-            uint64_t                vmx_cr4_fixed1;
-            uint64_t                vmx_vmcs_enum;
-        } msr;
-        /* Last instruction error */
-        uint32_t                    ulLastInstrError;
-    } vmx;
-    struct
-    {
-        /** Set by the ring-0 driver to indicate SVM is supported by the CPU. */
-        bool                        fSupported;
-
-        /** SVM revision. */
-        uint32_t                    u32Rev;
-
-        /** Maximum ASID allowed. */
-        uint32_t                    u32MaxASID;
-
-        /** SVM feature bits from cpuid 0x8000000a */
-        uint32_t                    u32Features;
-    } svm;
-    /** Saved error from detection */
-    int32_t         lLastError;
-
-    struct
-    {
-        uint32_t                    u32AMDFeatureECX;
-        uint32_t                    u32AMDFeatureEDX;
-    } cpuid;
-
-    HWACCMSTATE     enmHwAccmState;
-} HWACCMR0GLOBALS;
-
 typedef struct
 {

trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp

@@ -705 +705 @@
     CPUMCTX *pCtx;
     int      rc;
+    RTCPUID  idCpu = RTMpCpuId();
 
     rc = CPUMQueryGuestCtxPtr(pVM, &pCtx);
@@ -730 +731 @@
     {
         Assert(pVM->hwaccm.s.svm.fSupported);
-        rc  = SVMR0Enter(pVM);
+        rc  = SVMR0Enter(pVM, &HWACCMR0Globals.aCpuInfo[idCpu]);
         AssertRC(rc);
         rc |= SVMR0LoadGuestState(pVM, pCtx);

trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

@@ -188 +188 @@
     }
 
+    /* Invalidate the last cpu we were running on. */
+    pVM->hwaccm.s.svm.idLastCpu = NIL_RTCPUID;
     return VINF_SUCCESS;
 }
@@ -1643 +1645 @@
  * @returns VBox status code.
  * @param   pVM         The VM to operate on.
+ * @param   pCpu        CPU info struct
  */
-HWACCMR0DECL(int) SVMR0Enter(PVM pVM)
+HWACCMR0DECL(int) SVMR0Enter(PVM pVM, PHWACCM_CPUINFO pCpu)
 {
     Assert(pVM->hwaccm.s.svm.fSupported);
 
-    /* Force a TLB flush on VM entry. */
-    pVM->hwaccm.s.svm.fForceTLBFlush = true;
+    if (pVM->hwaccm.s.svm.idLastCpu != pCpu->idCpu)
+    {
+        /* Force a TLB flush on VM entry. */
+        pVM->hwaccm.s.svm.fForceTLBFlush = true;
+    }
+    pVM->hwaccm.s.svm.idLastCpu = pCpu->idCpu;
 
     pVM->hwaccm.s.svm.fResumeVM = false;

trunk/src/VBox/VMM/VMMR0/HWSVMR0.h

@@ -47 +47 @@
  * @returns VBox status code.
  * @param   pVM         The VM to operate on.
+ * @param   pCpu        CPU info struct
  */
-HWACCMR0DECL(int) SVMR0Enter(PVM pVM);
+HWACCMR0DECL(int) SVMR0Enter(PVM pVM, PHWACCM_CPUINFO pCpu);
 
 /**