Changeset 88814 in vbox for trunk/src/VBox

Timestamp:

May 3, 2021 5:12:06 AM (4 years ago)

Author:

vboxsync

Message:

Intel IOMMU: bugref:9967 Start work on interrupt remapping. Queued invalidation assertion fix.

File:

• trunk/src/VBox/Devices/Bus/DevIommuIntel.cpp (modified) (3 diffs)

trunk/src/VBox/Devices/Bus/DevIommuIntel.cpp

@@ -1191 +1191 @@
     }
 
-    /*
-     * Set Interrupt Remapping Table Pointer (SIRTP).
-     */
-    if (   (fExtCapReg & VTD_BF_ECAP_REG_IR_MASK)
-        && (uGcmdReg & VTD_BF_GCMD_REG_SIRTP_MASK))
-    {
-        /** @todo Perform global invalidation of all interrupt-entry cache when ESIRTPS is
-         *        supported. */
-        pThis->uIrtaReg = dmarRegReadRaw64(pThis, VTD_MMIO_OFF_IRTA_REG);
-        dmarRegChangeRaw32(pThis, VTD_MMIO_OFF_GSTS_REG, UINT32_MAX /* fAndMask */, VTD_BF_GSTS_REG_IRTPS_MASK /* fOrMask */);
+    if (fExtCapReg & VTD_BF_ECAP_REG_IR_MASK)
+    {
+        /*
+         * Set Interrupt Remapping Table Pointer (SIRTP).
+         */
+        if (uGcmdReg & VTD_BF_GCMD_REG_SIRTP_MASK)
+        {
+            /** @todo Perform global invalidation of all interrupt-entry cache when ESIRTPS is
+             *        supported. */
+            pThis->uIrtaReg = dmarRegReadRaw64(pThis, VTD_MMIO_OFF_IRTA_REG);
+            dmarRegChangeRaw32(pThis, VTD_MMIO_OFF_GSTS_REG, UINT32_MAX /* fAndMask */, VTD_BF_GSTS_REG_IRTPS_MASK /* fOrMask */);
+        }
+
+        /*
+         * Interrupt remapping.
+         */
+        if (fChanged & VTD_BF_GCMD_REG_IRE_MASK)
+        {
+            if (uGcmdReg & VTD_BF_GCMD_REG_IRE_MASK)
+                dmarRegChangeRaw32(pThis, VTD_MMIO_OFF_GSTS_REG, UINT32_MAX /* fAndMask */,
+                                   VTD_BF_GSTS_REG_IRES_MASK /* fOrMask */);
+            else
+                dmarRegChangeRaw32(pThis, VTD_MMIO_OFF_GSTS_REG, ~VTD_BF_GSTS_REG_IRES_MASK /* fAndMask */, 0 /* fOrMask */);
+        }
     }
 
@@ -1697 +1711 @@
                 /* Paranoia. */
                 Assert(cbQueue <= cbMaxQs);
-                Assert(!(offQueueTail & ~VTD_IQT_REG_RW_MASK));
-                Assert(!(offQueueHead & ~VTD_IQH_REG_RW_MASK));
+                Assert(!(offQueueTail & ~VTD_BF_IQT_REG_QT_MASK));
+                Assert(!(offQueueHead & ~VTD_BF_IQH_REG_QH_MASK));
                 Assert(fDw != VTD_IQA_REG_DW_256_BIT || !(offQueueTail & RT_BIT(4)));
                 Assert(fDw != VTD_IQA_REG_DW_256_BIT || !(offQueueHead & RT_BIT(4)));
@@ -2043 +2057 @@
         pHlp->pfnPrintf(pHlp, " FEADDR_REG   = %#RX32\n", uFeaddrReg);
         pHlp->pfnPrintf(pHlp, " FEUADDR_REG  = %#RX32\n", uFeuaddrReg);
-        /** @todo Verbose others as needed during debugging/rainy day. */
         pHlp->pfnPrintf(pHlp, " AFLOG_REG    = %#RX64\n", uAflogReg);
         pHlp->pfnPrintf(pHlp, " PMEN_REG     = %#RX32\n", uPmenReg);