Changeset 88894 in vbox for trunk/src/VBox
- Timestamp:
- May 6, 2021 9:46:39 AM (4 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/Devices/Bus/DevIommuIntel.cpp (modified) (15 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/Devices/Bus/DevIommuIntel.cpp
r88893 r88894 278 278 STAMCOUNTER StatMmioWriteRZ; /**< Number of MMIO writes in RZ. */ 279 279 280 STAMCOUNTER StatMsiRemapR3; /**< Number of MSI remap requests in R3. */ 281 STAMCOUNTER StatMsiRemapRZ; /**< Number of MSI remap requests in RZ. */ 280 STAMCOUNTER StatMsiRemapCfiR3; /**< Number of compatibility-format interrupts remap requests in R3. */ 281 STAMCOUNTER StatMsiRemapCfiRZ; /**< Number of compatibility-format interrupts remap requests in RZ. */ 282 STAMCOUNTER StatMsiRemapRfiR3; /**< Number of remappable-format interrupts remap requests in R3. */ 283 STAMCOUNTER StatMsiRemapRfiRZ; /**< Number of remappable-format interrupts remap requests in RZ. */ 282 284 283 285 STAMCOUNTER StatMemReadR3; /**< Number of memory read translation requests in R3. */ … … 1295 1297 uint64_t const fExtCapReg = pThis->fExtCapReg; 1296 1298 1297 /* 1298 * Queued-invalidation. 1299 */ 1299 /* Queued-invalidation. */ 1300 1300 if ( (fExtCapReg & VTD_BF_ECAP_REG_QI_MASK) 1301 1301 && (fChanged & VTD_BF_GCMD_REG_QIE_MASK)) … … 1303 1303 if (uGcmdReg & VTD_BF_GCMD_REG_QIE_MASK) 1304 1304 { 1305 /* Enable the invalidation-queue. */1306 1305 dmarRegChangeRaw32(pThis, VTD_MMIO_OFF_GSTS_REG, UINT32_MAX, VTD_BF_GSTS_REG_QIES_MASK); 1307 1306 dmarInvQueueThreadWakeUpIfNeeded(pDevIns); … … 1309 1308 else 1310 1309 { 1311 /* Disable the invalidation-queue. */1312 1310 dmarRegChangeRaw32(pThis, VTD_MMIO_OFF_GSTS_REG, ~VTD_BF_GSTS_REG_QIES_MASK, 0 /* fOrMask */); 1313 1311 dmarRegWriteRaw32(pThis, VTD_MMIO_OFF_IQH_REG, 0); … … 1317 1315 if (fExtCapReg & VTD_BF_ECAP_REG_IR_MASK) 1318 1316 { 1319 /* 1320 * Set Interrupt Remapping Table Pointer (SIRTP). 1321 */ 1317 /* Set Interrupt Remapping Table Pointer (SIRTP). */ 1322 1318 if (uGcmdReg & VTD_BF_GCMD_REG_SIRTP_MASK) 1323 1319 { … … 1328 1324 } 1329 1325 1330 /* 1331 * Interrupt remapping. 1332 */ 1326 /* Interrupt remapping. */ 1333 1327 if (fChanged & VTD_BF_GCMD_REG_IRE_MASK) 1334 1328 { … … 1338 1332 dmarRegChangeRaw32(pThis, VTD_MMIO_OFF_GSTS_REG, ~VTD_BF_GSTS_REG_IRES_MASK, 0 /* fOrMask */); 1339 1333 } 1340 } 1341 1342 /* 1343 * Set Root Table Pointer (SRTP). 1344 */ 1334 1335 /* Compatibility format interrupts. */ 1336 if (fChanged & VTD_BF_GCMD_REG_CFI_MASK) 1337 { 1338 if (uGcmdReg & VTD_BF_GCMD_REG_CFI_MASK) 1339 dmarRegChangeRaw32(pThis, VTD_MMIO_OFF_GSTS_REG, UINT32_MAX, VTD_BF_GSTS_REG_CFIS_MASK); 1340 else 1341 dmarRegChangeRaw32(pThis, VTD_MMIO_OFF_GSTS_REG, ~VTD_BF_GSTS_REG_CFIS_MASK, 0 /* fOrMask */); 1342 } 1343 } 1344 1345 /* Set Root Table Pointer (SRTP). */ 1345 1346 if (uGcmdReg & VTD_BF_GCMD_REG_SRTP_MASK) 1346 1347 { … … 1526 1527 static int dmarIrReadIrte(PPDMDEVINS pDevIns, uint64_t uIrtaReg, uint16_t idxIntr, PVTD_IRTE_T pIrte) 1527 1528 { 1528 Assert(idxIntr < VTD_IRTA_REG_GET_ENTR IES(uIrtaReg));1529 Assert(idxIntr < VTD_IRTA_REG_GET_ENTRY_COUNT(uIrtaReg)); 1529 1530 1530 1531 size_t const cbIrte = sizeof(*pIrte); … … 1601 1602 uint16_t const uHandle = uHandleLo | (uHandleHi << 15); 1602 1603 bool const fSubHandleValid = RT_BF_GET(pMsiIn->Addr.au32[0], VTD_BF_REMAPPABLE_MSI_ADDR_SHV); 1603 uint 32_t const idxIntr = fSubHandleValid1604 uint16_t const idxIntr = fSubHandleValid 1604 1605 ? uHandle + RT_BF_GET(pMsiIn->Data.u32, VTD_BF_REMAPPABLE_MSI_DATA_SUBHANDLE) 1605 1606 : uHandle; 1606 1607 1607 1608 /* Validate the index. */ 1608 uint32_t const cEntries = VTD_IRTA_REG_GET_ENTR IES(uIrtaReg);1609 uint32_t const cEntries = VTD_IRTA_REG_GET_ENTRY_COUNT(uIrtaReg); 1609 1610 if (idxIntr < cEntries) 1610 1611 { … … 1733 1734 if (uGstsReg & VTD_BF_GSTS_REG_IRES_MASK) 1734 1735 { 1735 STAM_COUNTER_INC(&pThis->CTX_SUFF_Z(StatMsiRemap));1736 1737 1736 /* Handle compatibility format interrupts. */ 1738 uint8_t const fIntrFormat = VTD_MSI_ADDR_GET_INTR_FORMAT(pMsiIn->Addr.u64);1739 if ( fIntrFormat == VTD_INTR_FORMAT_COMPAT)1737 bool const fIsRemapFormat = RT_BF_GET(pMsiIn->Addr.au32[0], VTD_BF_REMAPPABLE_MSI_ADDR_INTR_FMT); 1738 if (!fIsRemapFormat) 1740 1739 { 1741 /* If in Extended Interrupt Mode (EIM) or compatibility format interrupts are disabled, block the interrupt. */ 1740 STAM_COUNTER_INC(&pThis->CTX_SUFF_Z(StatMsiRemapCfi)); 1741 1742 /* If EIME is enabled or CFIs are disabled, block the interrupt. */ 1742 1743 if ( (uIrtaReg & VTD_BF_IRTA_REG_EIME_MASK) 1743 1744 || !(uGstsReg & VTD_BF_GSTS_REG_CFIS_MASK)) … … 1753 1754 1754 1755 /* Handle remappable format interrupts. */ 1756 STAM_COUNTER_INC(&pThis->CTX_SUFF_Z(StatMsiRemapRfi)); 1755 1757 return dmarIrRemapIntr(pDevIns, uIrtaReg, idDevice, pMsiIn, pMsiOut); 1756 1758 } … … 2358 2360 { 2359 2361 uint8_t const fCfi = RT_BF_GET(uGcmdReg, VTD_BF_GCMD_REG_CFI); 2360 pHlp->pfnPrintf(pHlp, " CFI = %u (%s)\n", fCfi, fCfi ? "Bypass interrupt remapping" 2361 : "Block compatible format interrupts"); 2362 pHlp->pfnPrintf(pHlp, " CFI = %u (%s)\n", fCfi, fCfi ? "Bypass" : "Block"); 2362 2363 pHlp->pfnPrintf(pHlp, " SIRTP = %u\n", RT_BF_GET(uGcmdReg, VTD_BF_GCMD_REG_SIRTP)); 2363 2364 pHlp->pfnPrintf(pHlp, " IRE = %u\n", RT_BF_GET(uGcmdReg, VTD_BF_GCMD_REG_IRE)); … … 2372 2373 { 2373 2374 uint8_t const fCfis = RT_BF_GET(uGstsReg, VTD_BF_GSTS_REG_CFIS); 2374 pHlp->pfnPrintf(pHlp, " CFIS = %u (%s)\n", fCfis, fCfis ? "Bypass interrupt remapping" 2375 : "Block compatible format interrupts"); 2375 pHlp->pfnPrintf(pHlp, " CFIS = %u (%s)\n", fCfis, fCfis ? "Bypass" : "Block"); 2376 2376 pHlp->pfnPrintf(pHlp, " IRTPS = %u\n", RT_BF_GET(uGstsReg, VTD_BF_GSTS_REG_IRTPS)); 2377 2377 pHlp->pfnPrintf(pHlp, " IRES = %u\n", RT_BF_GET(uGstsReg, VTD_BF_GSTS_REG_IRES)); … … 2444 2444 } 2445 2445 pHlp->pfnPrintf(pHlp, " IRTA_REG = %#RX64\n", uIrtaReg); 2446 { 2447 uint32_t const cIrtEntries = VTD_IRTA_REG_GET_ENTRY_COUNT(uIrtaReg); 2448 uint32_t const cbIrt = sizeof(VTD_IRTE_T) * cIrtEntries; 2449 pHlp->pfnPrintf(pHlp, " IRTA = %#RX64\n", RT_BF_GET(uIrtaReg, VTD_BF_IRTA_REG_IRTA)); 2450 pHlp->pfnPrintf(pHlp, " EIME = %RTbool\n", RT_BF_GET(uIrtaReg, VTD_BF_IRTA_REG_EIME)); 2451 pHlp->pfnPrintf(pHlp, " S = %u entries (%u bytes)\n", cIrtEntries, cbIrt); 2452 } 2446 2453 pHlp->pfnPrintf(pHlp, " PQH_REG = %#RX64\n", uPqhReg); 2447 2454 pHlp->pfnPrintf(pHlp, " PQT_REG = %#RX64\n", uPqtReg); … … 2739 2746 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMmioWriteRZ, STAMTYPE_COUNTER, "RZ/MmioWrite", STAMUNIT_OCCURENCES, "Number of MMIO writes in RZ."); 2740 2747 2741 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMsiRemapR3, STAMTYPE_COUNTER, "R3/MsiRemap", STAMUNIT_OCCURENCES, "Number of interrupt remap requests in R3."); 2742 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMsiRemapRZ, STAMTYPE_COUNTER, "RZ/MsiRemap", STAMUNIT_OCCURENCES, "Number of interrupt remap requests in RZ."); 2748 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMsiRemapCfiR3, STAMTYPE_COUNTER, "R3/MsiRemapCfi", STAMUNIT_OCCURENCES, "Number of compatibility-format interrupt remap requests in R3."); 2749 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMsiRemapCfiRZ, STAMTYPE_COUNTER, "RZ/MsiRemapCfi", STAMUNIT_OCCURENCES, "Number of compatibility-format interrupt remap requests in RZ."); 2750 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMsiRemapRfiR3, STAMTYPE_COUNTER, "R3/MsiRemapRfi", STAMUNIT_OCCURENCES, "Number of remappable-format interrupt remap requests in R3."); 2751 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMsiRemapRfiRZ, STAMTYPE_COUNTER, "RZ/MsiRemapRfi", STAMUNIT_OCCURENCES, "Number of remappable-format interrupt remap requests in RZ."); 2743 2752 2744 2753 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMemReadR3, STAMTYPE_COUNTER, "R3/MemRead", STAMUNIT_OCCURENCES, "Number of memory read translation requests in R3.");
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