VirtualBox

Changeset 89032 in vbox for trunk


Ignore:
Timestamp:
May 13, 2021 11:37:48 AM (4 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
144371
Message:

Intel IOMMU: bugref:9967 Trigger mode can actually be changed by remapping and level is always set to 1.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/PC/DevIoApic.cpp

    r89003 r89032  
    486486{
    487487    /*
    488      * Parse the message from the physical address and data
     488     * Parse the message from the physical address and data.
     489     * Do -not- zero out other fields in the APIC interrupt.
     490     *
    489491     * See Intel spec. 10.11.1 "Message Address Register Format".
    490492     * See Intel spec. 10.11.2 "Message Data Register Format".
     
    589591    }
    590592
     593    XAPICINTR ApicIntr;
     594    RT_ZERO(ApicIntr);
     595    ApicIntr.u8Vector       = IOAPIC_RTE_GET_VECTOR(u64Rte);
     596    ApicIntr.u8Dest         = IOAPIC_RTE_GET_DEST(u64Rte);
     597    ApicIntr.u8DestMode     = IOAPIC_RTE_GET_DEST_MODE(u64Rte);
     598    ApicIntr.u8DeliveryMode = IOAPIC_RTE_GET_DELIVERY_MODE(u64Rte);
     599    ApicIntr.u8Polarity     = IOAPIC_RTE_GET_POLARITY(u64Rte);
     600    ApicIntr.u8TriggerMode  = u8TriggerMode;
     601    //ApicIntr.u8RedirHint    = 0;
     602
    591603    /** @todo We might be able to release the IOAPIC(PDM) lock here and re-acquire it
    592604     *        before setting the remote IRR bit below. The APIC and IOMMU should not
    593605     *        require the caller to hold the PDM lock. */
    594 
    595     XAPICINTR ApicIntr;
    596     RT_ZERO(ApicIntr);
    597606
    598607#if defined(VBOX_WITH_IOMMU_AMD) || defined(VBOX_WITH_IOMMU_INTEL)
     
    619628    }
    620629
     630    /* Update the APIC interrupt with the remapped data. */
    621631    ioapicGetApicIntrFromMsi(&MsiOut, &ApicIntr);
    622 # ifdef RT_STRICT
    623     if (RT_SUCCESS(rcRemap))
    624     {
    625         Assert(ApicIntr.u8Polarity == IOAPIC_RTE_GET_POLARITY(u64Rte)); /* Ensure polarity hasn't changed. */
    626         Assert(ApicIntr.u8TriggerMode == u8TriggerMode);                /* Ensure trigger mode hasn't changed. */
    627     }
    628 # endif
    629 #else
    630     ApicIntr.u8Vector       = IOAPIC_RTE_GET_VECTOR(u64Rte);
    631     ApicIntr.u8Dest         = IOAPIC_RTE_GET_DEST(u64Rte);
    632     ApicIntr.u8DestMode     = IOAPIC_RTE_GET_DEST_MODE(u64Rte);
    633     ApicIntr.u8DeliveryMode = IOAPIC_RTE_GET_DELIVERY_MODE(u64Rte);
    634     ApicIntr.u8Polarity     = IOAPIC_RTE_GET_POLARITY(u64Rte);
    635     ApicIntr.u8TriggerMode  = u8TriggerMode;
    636     //ApicIntr.u8RedirHint    = 0;
     632
     633    /* Ensure polarity hasn't changed (trigger mode might change with Intel IOMMUs). */
     634    Assert(ApicIntr.u8Polarity == IOAPIC_RTE_GET_POLARITY(u64Rte));
    637635#endif
    638636
Note: See TracChangeset for help on using the changeset viewer.

© 2025 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette