Changeset 89284 in vbox for trunk/src/VBox/Devices
- Timestamp:
- May 26, 2021 6:52:15 AM (4 years ago)
- svn:sync-xref-src-repo-rev:
- 144630
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/Devices/Bus/DevIommuIntel.cpp
r89275 r89284 143 143 /** The current saved state version. */ 144 144 #define DMAR_SAVED_STATE_VERSION 1 145 146 /** @name DMAR_IO_PERM_XXX: DMAR I/O permissions.147 * These are not according to the spec. other than the value of the READ and WRITE148 * permissions. */149 #define DMAR_IO_PERM_READ RT_BIT(0)150 #define DMAR_IO_PERM_WRITE RT_BIT(1)151 #define DMAR_IO_PERM_EXECUTE RT_BIT(2)152 #define DMAR_IO_PERM_SUPERVISOR RT_BIT(3)153 /** @} */154 145 155 146 … … 434 425 { 435 426 /** The device ID (bus, device, function). */ 436 uint16_t idDevice; 437 uint16_t uPadding0; 438 /** The DMA remapping operation request type. */ 439 VTDREQTYPE enmReqType; 427 uint16_t idDevice; 428 uint16_t uPadding0; 429 /** The PASID if present, can be NIL_PCIPASID. */ 430 PCIPASID Pasid; 431 /* The address type of the memory request. */ 432 PCIADDRTYPE enmAddrType; 433 /** The type of the translation request. */ 434 VTDREQTYPE enmReqType; 440 435 /** The DMA address being accessed. */ 441 uint64_t uDmaAddr;436 uint64_t uDmaAddr; 442 437 /** The size of the DMA access (in bytes). */ 443 size_t cbDma;438 size_t cbDma; 444 439 445 440 /** The translated system-physical address (HPA). */ 446 RTGCPHYS GCPhysSpa;441 RTGCPHYS GCPhysSpa; 447 442 /** The size of the contiguous translated region (in bytes). */ 448 size_t cbContiguous;443 size_t cbContiguous; 449 444 } DMARADDRMAP; 450 445 /** Pointer to a DMA address map. */ … … 1416 1411 */ 1417 1412 static void dmarAtFaultRecordEx(PPDMDEVINS pDevIns, DMARDIAG enmDiag, VTDATFAULT enmAtFault, uint16_t idDevice, 1418 uint64_t uFaultAddr, VTDREQTYPE enmReqType, uint8_t uAddrType, bool fHasPasid, uint32_t uPasid,1419 uint 8_t fReqAttr)1413 uint64_t uFaultAddr, VTDREQTYPE enmReqType, uint8_t uAddrType, bool fHasPasid, 1414 uint32_t uPasid, uint8_t fReqAttr) 1420 1415 { 1421 1416 uint8_t const fType1 = enmReqType & RT_BIT(1); … … 1455 1450 { 1456 1451 dmarAtFaultRecordEx(pDevIns, enmDiag, enmAtFault, idDevice, uFaultAddr, enmReqType, 0 /* uAddrType */, 1457 1452 false /* fHasPasid */, 0 /* uPasid */, 0 /* fReqAttr */); 1458 1453 } 1459 1454 … … 1899 1894 * @param pDevIns The IOMMU device instance. 1900 1895 * @param uRtaddrReg The current RTADDR_REG value. 1901 * @param enmAddrType The PCI memory request address type.1902 1896 * @param pAddrRemap The DMA address remap info. 1903 1897 */ 1904 static int dmarDrLegacyModeRemapAddr(PPDMDEVINS pDevIns, uint64_t uRtaddrReg, P CIADDRTYPE enmAddrType, PDMARADDRMAP pAddrRemap)1898 static int dmarDrLegacyModeRemapAddr(PPDMDEVINS pDevIns, uint64_t uRtaddrReg, PDMARADDRMAP pAddrRemap) 1905 1899 { 1906 1900 uint8_t const idxRootEntry = RT_HI_U8(pAddrRemap->idDevice); … … 1937 1931 case 0: 1938 1932 { 1939 if ( enmAddrType == PCIADDRTYPE_UNTRANSLATED)1933 if (pAddrRemap->enmAddrType == PCIADDRTYPE_UNTRANSLATED) 1940 1934 { 1941 1935 /** @todo perform second-level translation. */ … … 1966 1960 { 1967 1961 dmarAtFaultQualifiedRecord(pDevIns, kDmarDiag_Atf_Lct_4_2, VTDATFAULT_LCT_4_2, 1968 pAddrRemap->idDevice, pAddrRemap->uDmaAddr, pAddrRemap->enmReqType,1969 uCtxEntryQword0);1962 pAddrRemap->idDevice, pAddrRemap->uDmaAddr, 1963 pAddrRemap->enmReqType, uCtxEntryQword0); 1970 1964 break; 1971 1965 } … … 2005 1999 * @param pDevIns The IOMMU device instance. 2006 2000 * @param uRtaddrReg The current RTADDR_REG value. 2007 * @param enmAddrType The PCI memory request address type.2008 2001 * @param pAddrRemap The DMA address remap info. 2009 2002 */ 2010 static int dmarDrScalableModeRemapAddr(PPDMDEVINS pDevIns, uint64_t uRtaddrReg, PCIADDRTYPE enmAddrType, PDMARADDRMAP pAddrRemap) 2011 { 2012 RT_NOREF(enmAddrType); 2003 static int dmarDrScalableModeRemapAddr(PPDMDEVINS pDevIns, uint64_t uRtaddrReg, PDMARADDRMAP pAddrRemap) 2004 { 2013 2005 PCDMAR pThis = PDMDEVINS_2_DATA(pDevIns, PDMAR); 2014 2006 if (pThis->fExtCapReg & VTD_BF_ECAP_REG_SMTS_MASK) … … 2093 2085 2094 2086 DMARADDRMAP AddrRemap; 2095 AddrRemap.idDevice = idDevice; 2096 AddrRemap.enmReqType = enmReqType; 2097 AddrRemap.uDmaAddr = uIova; 2098 AddrRemap.cbDma = cbIova; 2099 AddrRemap.GCPhysSpa = NIL_RTGCPHYS; 2100 AddrRemap.cbContiguous = 0; 2087 AddrRemap.idDevice = idDevice; 2088 AddrRemap.Pasid = NIL_PCIPASID; 2089 AddrRemap.enmAddrType = PCIADDRTYPE_UNTRANSLATED; 2090 AddrRemap.enmReqType = enmReqType; 2091 AddrRemap.uDmaAddr = uIova; 2092 AddrRemap.cbDma = cbIova; 2093 AddrRemap.GCPhysSpa = NIL_RTGCPHYS; 2094 AddrRemap.cbContiguous = 0; 2101 2095 2102 2096 int rc; … … 2106 2100 case VTD_TTM_LEGACY_MODE: 2107 2101 { 2108 rc = dmarDrLegacyModeRemapAddr(pDevIns, uRtaddrReg, PCIADDRTYPE_UNTRANSLATED,&AddrRemap);2102 rc = dmarDrLegacyModeRemapAddr(pDevIns, uRtaddrReg, &AddrRemap); 2109 2103 break; 2110 2104 } … … 2112 2106 case VTD_TTM_SCALABLE_MODE: 2113 2107 { 2114 rc = dmarDrScalableModeRemapAddr(pDevIns, uRtaddrReg, PCIADDRTYPE_UNTRANSLATED,&AddrRemap);2108 rc = dmarDrScalableModeRemapAddr(pDevIns, uRtaddrReg, &AddrRemap); 2115 2109 break; 2116 2110 }
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