- Timestamp:
- May 19, 2008 8:28:08 PM (17 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/Disassembler/testcase/tstDisasm-2.cpp
r8932 r8934 43 43 uint8_t *pbInstr; /**< The current instruction (pointer). */ 44 44 uint32_t cbInstr; /**< The size of the current instruction. */ 45 bool fInvalid; /**< Whether the instruction is invalid/illegal or not. */ 46 bool fRaw; /**< Whether invalid instructions are printed as byte defintions or not. */ 45 47 int rc; /**< Set if we hit EOF. */ 46 48 size_t cbLeft; /**< The number of bytes left. (read) */ … … 191 193 * @param enmStyle The assembly output style. 192 194 * @param fListing Whether to print in a listing like mode. 195 * @param fRaw Whether to output byte definitions for invalid sequences. 196 * @param fAllInvalid Whether all instructions are expected to be invalid. 193 197 */ 194 198 static int MyDisasmBlock(const char *argv0, DISCPUMODE enmCpuMode, uint64_t uAddress, uint8_t *pbFile, size_t cbFile, 195 ASMSTYLE enmStyle, bool fListing )199 ASMSTYLE enmStyle, bool fListing, bool fRaw, bool fAllInvalid) 196 200 { 197 201 /* … … 204 208 State.pbInstr = pbFile; 205 209 State.cbInstr = 0; 210 State.fInvalid = false; 211 State.fRaw = fRaw; 206 212 State.rc = VINF_SUCCESS; 207 213 State.cbLeft = cbFile; … … 245 251 if (RT_SUCCESS(rc)) 246 252 { 247 pfnFormatter(&State); 253 State.fInvalid = State.Cpu.pCurInstr->opcode == OP_INVALID 254 || State.Cpu.pCurInstr->opcode == OP_ILLUD2; 255 if (!State.fInvalid || !fAllInvalid) 256 pfnFormatter(&State); 257 else 258 { 259 RTPrintf("%s: error at %#RX64: unexpected valid instruction\n", argv0, State.uAddress); 260 pfnFormatter(&State); 261 rcRet = VERR_GENERAL_FAILURE; 262 } 248 263 } 249 264 else … … 257 272 { 258 273 RTPrintf("%s: error at %#RX64: %Rrc cbInstr=%d!\n", argv0, State.uAddress, rc, State.cbInstr); 259 rcRet = rc; 274 if (rcRet == VINF_SUCCESS) 275 rcRet = rc; 260 276 break; 261 277 } … … 291 307 " --cpumode|-c <16|32|64>\n" 292 308 " The cpu mode. Default: 32\n" 309 " --all-invalid|-i\n" 310 " When specified all instructions are expected to be invalid.\n" 293 311 " --listing|-l, --no-listing|-L\n" 294 312 " Enables or disables listing mode. Default: --no-listing\n" 295 313 " --offset|-o <offset>\n" 296 314 " The file offset at which to start disassembling. Default: 0\n" 315 " --raw|-r, --no-raw|-R\n" 316 " Whether to employ byte defines for unknown bits. Default: --no-raw\n" 297 317 " --style|-s <default|yasm|masm>\n" 298 318 " The assembly output style. Default: default\n" … … 310 330 ASMSTYLE enmStyle = kAsmStyle_Default; 311 331 bool fListing = true; 332 bool fRaw = false; 333 bool fAllInvalid = false; 312 334 DISCPUMODE enmCpuMode = CPUMODE_32BIT; 313 335 RTFOFF off = 0; … … 323 345 { "--help", 'h', 0 }, 324 346 { "--bytes", 'b', RTGETOPT_REQ_INT64 }, 347 { "--all-invalid", 'i', 0, }, 325 348 { "--listing", 'l', 0 }, 326 349 { "--no-listing", 'L', 0 }, 327 350 { "--offset", 'o', RTGETOPT_REQ_INT64 }, 351 { "--raw", 'r', 0 }, 352 { "--no-raw", 'R', 0 }, 328 353 { "--style", 's', RTGETOPT_REQ_STRING }, 329 354 }; … … 361 386 return Usage(argv[0]); 362 387 388 case 'i': 389 fAllInvalid = true; 390 break; 391 363 392 case 'l': 364 393 fListing = true; … … 371 400 case 'o': 372 401 off = ValueUnion.i; 402 break; 403 404 case 'r': 405 fRaw = true; 406 break; 407 408 case 'R': 409 fRaw = false; 373 410 break; 374 411 … … 420 457 * Disassemble it. 421 458 */ 422 rc = MyDisasmBlock(argv[0], enmCpuMode, uAddress, (uint8_t *)pvFile, cbFile, enmStyle, fListing );459 rc = MyDisasmBlock(argv[0], enmCpuMode, uAddress, (uint8_t *)pvFile, cbFile, enmStyle, fListing, fRaw, fAllInvalid); 423 460 if (RT_FAILURE(rc)) 424 461 break;
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