Changeset 89454 in vbox

Timestamp:

Jun 2, 2021 8:00:30 AM (3 years ago)

Author:

vboxsync

Message:

Intel IOMMU: bugref:9967 Address translation, WIP.

File:

• trunk/src/VBox/Devices/Bus/DevIommuIntel.cpp (modified) (3 diffs)

trunk/src/VBox/Devices/Bus/DevIommuIntel.cpp

@@ -1915 +1915 @@
  *
  * @returns @c true if it's supported, @c false otherwise.
- * @param   pThis               The shared DMAR device state.
- * @param   pCtxEntry           The context entry.
- * @param   pcPagingLevel       Where to store the paging level. Optional, can be
- *                              NULL.
+ * @param   pThis           The shared DMAR device state.
+ * @param   pCtxEntry       The context entry.
+ * @param   pcPagingLevel   Where to store the paging level. Optional, can be NULL.
  */
 static bool dmarDrLegacyModeIsAwValid(PCDMAR pThis, PCVTD_CONTEXT_ENTRY_T pCtxEntry, uint8_t *pcPagingLevel)
@@ -2279 +2278 @@
                                         if (pMemReqRemap->Req.enmAddrType == PCIADDRTYPE_UNTRANSLATED)
                                         {
-                                            /** @todo Check AW == maximum SAGAW bit? */
-                                            pMemReqRemap->Iotlbe.GCPhysBase = pMemReqRemap->Req.uDmaAddr & X86_PAGE_4K_BASE_MASK;
-                                            pMemReqRemap->Iotlbe.cShift     = X86_PAGE_4K_SHIFT;
-                                            pMemReqRemap->Iotlbe.fPerm      = DMAR_PERM_ALL;
-                                            pMemReqRemap->Iotlbe.idDomain   = idDomain;
-                                            pMemReqRemap->cbContiguous      = pMemReqRemap->Req.cbDma;
-                                            return VINF_SUCCESS;
+                                            if (dmarDrLegacyModeIsAwValid(pThis, &CtxEntry, NULL /* pcPagingLevel */))
+                                            {
+                                                pMemReqRemap->Iotlbe.GCPhysBase = pMemReqRemap->Req.uDmaAddr & X86_PAGE_4K_BASE_MASK;
+                                                pMemReqRemap->Iotlbe.cShift     = X86_PAGE_4K_SHIFT;
+                                                pMemReqRemap->Iotlbe.fPerm      = DMAR_PERM_ALL;
+                                                pMemReqRemap->Iotlbe.idDomain   = idDomain;
+                                                pMemReqRemap->cbContiguous      = pMemReqRemap->Req.cbDma;
+                                                return VINF_SUCCESS;
+                                            }
+                                            dmarAtFaultRecord(pDevIns, kDmarDiag_Atf_Lgn_1_3, VTDATFAULT_LGN_1_3, pMemReqRemap);
                                         }
-                                        dmarAtFaultRecord(pDevIns, kDmarDiag_Atf_Lct_5, VTDATFAULT_LCT_5, pMemReqRemap);
+                                        else
+                                            dmarAtFaultRecord(pDevIns, kDmarDiag_Atf_Lct_5, VTDATFAULT_LCT_5, pMemReqRemap);
                                         break;
                                     }
@@ -3538 +3541 @@
         dmarRegWriteRaw64(pThis, VTD_MMIO_OFF_CAP_REG, pThis->fCapReg);
 
-        pThis->fHawBaseMask = ~(UINT64_MAX << cGstPhysAddrBits) & X86_PAGE_4K_BASE_MASK;
-        pThis->fInvMgawMask = UINT64_MAX << cGstPhysAddrBits;
+        pThis->fHawBaseMask    = ~(UINT64_MAX << cGstPhysAddrBits) & X86_PAGE_4K_BASE_MASK;
+        pThis->fInvMgawMask    = UINT64_MAX << cGstPhysAddrBits;
         pThis->cMaxPagingLevel = vtdCapRegGetMaxPagingLevel(fSagaw);
     }