Changeset 89523 in vbox for trunk/src/VBox
- Timestamp:
- Jun 5, 2021 6:49:18 AM (4 years ago)
- File:
-
- 1 edited
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- Unmodified
- Added
- Removed
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trunk/src/VBox/Devices/Bus/DevIommuIntel.cpp
r89513 r89523 179 179 180 180 /* Address Translation Faults. */ 181 kDmarDiag_Atf_Lct_1, 182 kDmarDiag_Atf_Lct_2, 183 kDmarDiag_Atf_Lct_3, 184 kDmarDiag_Atf_Lct_4_1, 185 kDmarDiag_Atf_Lct_4_2, 186 kDmarDiag_Atf_Lct_4_3, 187 kDmarDiag_Atf_Lct_5, 188 kDmarDiag_Atf_Lgn_1_1, 189 kDmarDiag_Atf_Lgn_1_2, 190 kDmarDiag_Atf_Lgn_1_3, 191 kDmarDiag_Atf_Lgn_4, 192 kDmarDiag_Atf_Lrt_1, 193 kDmarDiag_Atf_Lrt_2, 194 kDmarDiag_Atf_Lrt_3, 195 kDmarDiag_Atf_Lsl_1, 196 kDmarDiag_Atf_Lsl_2, 197 kDmarDiag_Atf_Lsl_2_LargePage, 198 kDmarDiag_Atf_Rta_1_1, 199 kDmarDiag_Atf_Rta_1_2, 200 kDmarDiag_Atf_Rta_1_3, 201 kDmarDiag_Atf_Sgn_5, 202 kDmarDiag_Atf_Sgn_8, 203 kDmarDiag_Atf_Ssl_1, 204 kDmarDiag_Atf_Ssl_2, 205 kDmarDiag_Atf_Ssl_3, 206 kDmarDiag_Atf_Ssl_3_LargePage, 181 kDmarDiag_At_Lm_CtxEntry_Not_Present, 182 kDmarDiag_At_Lm_CtxEntry_Read_Failed, 183 kDmarDiag_At_Lm_CtxEntry_Rsvd, 184 kDmarDiag_At_Lm_Pt_At_Block, 185 kDmarDiag_At_Lm_Pt_Aw_Invalid, 186 kDmarDiag_At_Lm_RootEntry_Not_Present, 187 kDmarDiag_At_Lm_RootEntry_Read_Failed, 188 kDmarDiag_At_Lm_RootEntry_Rsvd, 189 kDmarDiag_At_Lm_Slpptr_Read_Failed, 190 kDmarDiag_At_Lm_Tt_Invalid, 191 kDmarDiag_At_Lm_Ut_At_Block, 192 kDmarDiag_At_Lm_Ut_Aw_Invalid, 193 kDmarDiag_At_Rta_Adms_Not_Supported, 194 kDmarDiag_At_Rta_Rsvd, 195 kDmarDiag_At_Rta_Smts_Not_Supported, 196 kDmarDiag_At_Xm_AddrIn_Invalid, 197 kDmarDiag_At_Xm_AddrOut_Invalid, 198 kDmarDiag_At_Xm_Perm_Denied, 199 kDmarDiag_At_Xm_Pte_Rsvd, 200 kDmarDiag_At_Xm_Pte_Sllps_Invalid, 201 kDmarDiag_At_Xm_Read_Pte_Failed, 207 202 208 203 /* CCMD_REG faults. */ 209 kDmarDiag_CcmdReg_Not Supported,204 kDmarDiag_CcmdReg_Not_Supported, 210 205 kDmarDiag_CcmdReg_Qi_Enabled, 211 206 kDmarDiag_CcmdReg_Ttm_Invalid, … … 225 220 /* IQT_REG faults. */ 226 221 kDmarDiag_IqtReg_Qt_Invalid, 227 kDmarDiag_IqtReg_Qt_Not Aligned,228 229 /* Compatibility Format InterruptFaults. */222 kDmarDiag_IqtReg_Qt_Not_Aligned, 223 224 /* Interrupt Remapping Faults. */ 230 225 kDmarDiag_Ir_Cfi_Blocked, 231 232 /* Remappable Format Interrupt Faults. */233 226 kDmarDiag_Ir_Rfi_Intr_Index_Invalid, 234 227 kDmarDiag_Ir_Rfi_Irte_Mode_Invalid, … … 257 250 static const char *const g_apszDmarDiagDesc[] = 258 251 { 259 DMARDIAG_DESC(None ), 260 DMARDIAG_DESC(Atf_Lct_1 ), 261 DMARDIAG_DESC(Atf_Lct_2 ), 262 DMARDIAG_DESC(Atf_Lct_3 ), 263 DMARDIAG_DESC(Atf_Lct_4_1 ), 264 DMARDIAG_DESC(Atf_Lct_4_2 ), 265 DMARDIAG_DESC(Atf_Lct_4_3 ), 266 DMARDIAG_DESC(Atf_Lct_5 ), 267 DMARDIAG_DESC(Atf_Lgn_1_1 ), 268 DMARDIAG_DESC(Atf_Lgn_1_2 ), 269 DMARDIAG_DESC(Atf_Lgn_1_3 ), 270 DMARDIAG_DESC(Atf_Lgn_4 ), 271 DMARDIAG_DESC(Atf_Lrt_1 ), 272 DMARDIAG_DESC(Atf_Lrt_2 ), 273 DMARDIAG_DESC(Atf_Lrt_3 ), 274 DMARDIAG_DESC(Atf_Lsl_1 ), 275 DMARDIAG_DESC(Atf_Lsl_2 ), 276 DMARDIAG_DESC(Atf_Lsl_2_LargePage ), 277 DMARDIAG_DESC(Atf_Rta_1_1 ), 278 DMARDIAG_DESC(Atf_Rta_1_2 ), 279 DMARDIAG_DESC(Atf_Rta_1_3 ), 280 DMARDIAG_DESC(Atf_Sgn_5 ), 281 DMARDIAG_DESC(Atf_Sgn_8 ), 282 DMARDIAG_DESC(Atf_Ssl_1 ), 283 DMARDIAG_DESC(Atf_Ssl_2 ), 284 DMARDIAG_DESC(Atf_Ssl_3 ), 285 DMARDIAG_DESC(Atf_Ssl_3_LargePage ), 286 DMARDIAG_DESC(CcmdReg_NotSupported ), 287 DMARDIAG_DESC(CcmdReg_Qi_Enabled ), 288 DMARDIAG_DESC(CcmdReg_Ttm_Invalid ), 289 DMARDIAG_DESC(IqaReg_Dsc_Fetch_Error ), 290 DMARDIAG_DESC(IqaReg_Dw_128_Invalid ), 291 DMARDIAG_DESC(IqaReg_Dw_256_Invalid ), 292 DMARDIAG_DESC(Iqei_Dsc_Type_Invalid ), 293 DMARDIAG_DESC(Iqei_Inv_Wait_Dsc_0_1_Rsvd), 294 DMARDIAG_DESC(Iqei_Inv_Wait_Dsc_2_3_Rsvd), 295 DMARDIAG_DESC(Iqei_Inv_Wait_Dsc_Invalid ), 296 DMARDIAG_DESC(Iqei_Ttm_Rsvd ), 297 DMARDIAG_DESC(IqtReg_Qt_Invalid ), 298 DMARDIAG_DESC(IqtReg_Qt_NotAligned ), 299 DMARDIAG_DESC(Ir_Cfi_Blocked ), 300 DMARDIAG_DESC(Ir_Rfi_Intr_Index_Invalid ), 301 DMARDIAG_DESC(Ir_Rfi_Irte_Mode_Invalid ), 302 DMARDIAG_DESC(Ir_Rfi_Irte_Not_Present ), 303 DMARDIAG_DESC(Ir_Rfi_Irte_Read_Failed ), 304 DMARDIAG_DESC(Ir_Rfi_Irte_Rsvd ), 305 DMARDIAG_DESC(Ir_Rfi_Irte_Svt_Bus ), 306 DMARDIAG_DESC(Ir_Rfi_Irte_Svt_Masked ), 307 DMARDIAG_DESC(Ir_Rfi_Irte_Svt_Rsvd ), 308 DMARDIAG_DESC(Ir_Rfi_Rsvd ), 252 DMARDIAG_DESC(None ), 253 254 /* Address Translation Faults. */ 255 DMARDIAG_DESC(At_Lm_CtxEntry_Not_Present ), 256 DMARDIAG_DESC(At_Lm_CtxEntry_Read_Failed ), 257 DMARDIAG_DESC(At_Lm_CtxEntry_Rsvd ), 258 DMARDIAG_DESC(At_Lm_Pt_At_Block ), 259 DMARDIAG_DESC(At_Lm_Pt_Aw_Invalid ), 260 DMARDIAG_DESC(At_Lm_RootEntry_Not_Present), 261 DMARDIAG_DESC(At_Lm_RootEntry_Read_Failed), 262 DMARDIAG_DESC(At_Lm_RootEntry_Rsvd ), 263 DMARDIAG_DESC(At_Lm_Slpptr_Read_Failed ), 264 DMARDIAG_DESC(At_Lm_Tt_Invalid ), 265 DMARDIAG_DESC(At_Lm_Ut_At_Block ), 266 DMARDIAG_DESC(At_Lm_Ut_Aw_Invalid ), 267 DMARDIAG_DESC(At_Rta_Adms_Not_Supported ), 268 DMARDIAG_DESC(At_Rta_Rsvd ), 269 DMARDIAG_DESC(At_Rta_Smts_Not_Supported ), 270 DMARDIAG_DESC(At_Xm_AddrIn_Invalid ), 271 DMARDIAG_DESC(At_Xm_AddrOut_Invalid ), 272 DMARDIAG_DESC(At_Xm_Perm_Denied ), 273 DMARDIAG_DESC(At_Xm_Pte_Rsvd ), 274 DMARDIAG_DESC(At_Xm_Pte_Sllps_Invalid ), 275 DMARDIAG_DESC(At_Xm_Read_Pte_Failed ), 276 277 /* CCMD_REG faults. */ 278 DMARDIAG_DESC(CcmdReg_Not_Supported ), 279 DMARDIAG_DESC(CcmdReg_Qi_Enabled ), 280 DMARDIAG_DESC(CcmdReg_Ttm_Invalid ), 281 282 /* IQA_REG faults. */ 283 DMARDIAG_DESC(IqaReg_Dsc_Fetch_Error ), 284 DMARDIAG_DESC(IqaReg_Dw_128_Invalid ), 285 DMARDIAG_DESC(IqaReg_Dw_256_Invalid ), 286 287 /* Invalidation Queue Error Info. */ 288 DMARDIAG_DESC(Iqei_Dsc_Type_Invalid ), 289 DMARDIAG_DESC(Iqei_Inv_Wait_Dsc_0_1_Rsvd ), 290 DMARDIAG_DESC(Iqei_Inv_Wait_Dsc_2_3_Rsvd ), 291 DMARDIAG_DESC(Iqei_Inv_Wait_Dsc_Invalid ), 292 DMARDIAG_DESC(Iqei_Ttm_Rsvd ), 293 294 /* IQT_REG faults. */ 295 DMARDIAG_DESC(IqtReg_Qt_Invalid ), 296 DMARDIAG_DESC(IqtReg_Qt_Not_Aligned ), 297 298 /* Interrupt remapping faults. */ 299 DMARDIAG_DESC(Ir_Cfi_Blocked ), 300 DMARDIAG_DESC(Ir_Rfi_Intr_Index_Invalid ), 301 DMARDIAG_DESC(Ir_Rfi_Irte_Mode_Invalid ), 302 DMARDIAG_DESC(Ir_Rfi_Irte_Not_Present ), 303 DMARDIAG_DESC(Ir_Rfi_Irte_Read_Failed ), 304 DMARDIAG_DESC(Ir_Rfi_Irte_Rsvd ), 305 DMARDIAG_DESC(Ir_Rfi_Irte_Svt_Bus ), 306 DMARDIAG_DESC(Ir_Rfi_Irte_Svt_Masked ), 307 DMARDIAG_DESC(Ir_Rfi_Irte_Svt_Rsvd ), 308 DMARDIAG_DESC(Ir_Rfi_Rsvd ), 309 309 /* kDmarDiag_End */ 310 310 }; … … 1549 1549 1550 1550 /** 1551 * Records an address translation fault (extended version).1551 * Records an address translation fault. 1552 1552 * 1553 1553 * @param pDevIns The IOMMU device instance. 1554 1554 * @param enmDiag The diagnostic reason. 1555 * @param enmAtFault The address translation fault reason.1556 1555 * @param pMemReqIn The DMA memory request input. 1557 1556 * @param pMemReqAux The DMA memory request auxiliary info. 1558 1557 */ 1559 static void dmarAtFaultRecordEx(PPDMDEVINS pDevIns, DMARDIAG enmDiag, VTDATFAULT enmAtFault, PCDMARMEMREQIN pMemReqIn, 1560 PCDMARMEMREQAUX pMemReqAux) 1561 { 1562 /* Update the diagnostic reason (even if software wants to supress faults). */ 1558 static void dmarAtFaultRecord(PPDMDEVINS pDevIns, DMARDIAG enmDiag, PCDMARMEMREQIN pMemReqIn, PCDMARMEMREQAUX pMemReqAux) 1559 { 1560 /* 1561 * Update the diagnostic reason (even if software wants to supress faults). 1562 */ 1563 1563 PDMAR pThis = PDMDEVINS_2_DATA(pDevIns, PDMAR); 1564 1564 pThis->enmDiag = enmDiag; … … 1570 1570 if (!pMemReqAux->fFpd) 1571 1571 { 1572 /* 1573 * Figure out the fault reason to report to software from our diagnostic code. 1574 * The case labels below are sorted alphabetically for convenience. 1575 */ 1576 VTDATFAULT enmAtFault; 1577 bool const fLm = pMemReqAux->fTtm == VTD_TTM_LEGACY_MODE; 1578 switch (enmDiag) 1579 { 1580 /* LM (Legacy Mode) faults. */ 1581 case kDmarDiag_At_Lm_CtxEntry_Not_Present: enmAtFault = VTDATFAULT_LCT_2; break; 1582 case kDmarDiag_At_Lm_CtxEntry_Read_Failed: enmAtFault = VTDATFAULT_LCT_1; break; 1583 case kDmarDiag_At_Lm_CtxEntry_Rsvd: enmAtFault = VTDATFAULT_LCT_3; break; 1584 case kDmarDiag_At_Lm_Pt_At_Block: enmAtFault = VTDATFAULT_LCT_5; break; 1585 case kDmarDiag_At_Lm_Pt_Aw_Invalid: enmAtFault = VTDATFAULT_LGN_1_3; break; 1586 case kDmarDiag_At_Lm_RootEntry_Not_Present: enmAtFault = VTDATFAULT_LRT_2; break; 1587 case kDmarDiag_At_Lm_RootEntry_Read_Failed: enmAtFault = VTDATFAULT_LRT_1; break; 1588 case kDmarDiag_At_Lm_RootEntry_Rsvd: enmAtFault = VTDATFAULT_LRT_3; break; 1589 case kDmarDiag_At_Lm_Slpptr_Read_Failed: enmAtFault = VTDATFAULT_LCT_4_3; break; 1590 case kDmarDiag_At_Lm_Tt_Invalid: enmAtFault = VTDATFAULT_LCT_4_2; break; 1591 case kDmarDiag_At_Lm_Ut_At_Block: enmAtFault = VTDATFAULT_LCT_5; break; 1592 case kDmarDiag_At_Lm_Ut_Aw_Invalid: enmAtFault = VTDATFAULT_LCT_4_1; break; 1593 1594 /* RTA (Root Table Address) faults. */ 1595 case kDmarDiag_At_Rta_Adms_Not_Supported: enmAtFault = VTDATFAULT_RTA_1_1; break; 1596 case kDmarDiag_At_Rta_Rsvd: enmAtFault = VTDATFAULT_RTA_1_2; break; 1597 case kDmarDiag_At_Rta_Smts_Not_Supported: enmAtFault = VTDATFAULT_RTA_1_3; break; 1598 1599 /* XM (Legacy mode or Scalable Mode) faults. */ 1600 case kDmarDiag_At_Xm_AddrIn_Invalid: enmAtFault = fLm ? VTDATFAULT_LGN_1_1 : VTDATFAULT_SGN_5; break; 1601 case kDmarDiag_At_Xm_AddrOut_Invalid: enmAtFault = fLm ? VTDATFAULT_LGN_4 : VTDATFAULT_SGN_8; break; 1602 case kDmarDiag_At_Xm_Perm_Denied: enmAtFault = fLm ? VTDATFAULT_LSL_2 : VTDATFAULT_SSL_2; break; 1603 case kDmarDiag_At_Xm_Pte_Rsvd: 1604 case kDmarDiag_At_Xm_Pte_Sllps_Invalid: enmAtFault = fLm ? VTDATFAULT_LSL_2 : VTDATFAULT_SSL_3; break; 1605 case kDmarDiag_At_Xm_Read_Pte_Failed: enmAtFault = fLm ? VTDATFAULT_LSL_1 : VTDATFAULT_SSL_1; break; 1606 1607 /* Shouldn't ever happen. */ 1608 default: 1609 { 1610 AssertLogRelMsgFailedReturnVoid(("%s: Invalid address translation fault diagnostic code %#x\n", 1611 DMAR_LOG_PFX, enmDiag)); 1612 } 1613 } 1614 1615 /* Construct and record the error. */ 1572 1616 uint16_t const idDevice = pMemReqIn->idDevice; 1573 1617 uint8_t const fType1 = pMemReqIn->enmReqType & RT_BIT(1); … … 1592 1636 dmarPrimaryFaultRecord(pDevIns, uFrcdHi, uFrcdLo); 1593 1637 } 1594 }1595 1596 1597 /**1598 * Records an address translation fault.1599 *1600 * @param pDevIns The IOMMU device instance.1601 * @param enmDiag The diagnostic reason.1602 * @param enmAtFault The address translation fault reason.1603 * @param pMemReqRemap The DMA memory request remapping info.1604 */1605 static void dmarAtFaultRecord(PPDMDEVINS pDevIns, DMARDIAG enmDiag, VTDATFAULT enmAtFault, PCDMARMEMREQREMAP pMemReqRemap)1606 {1607 dmarAtFaultRecordEx(pDevIns, enmDiag, enmAtFault, &pMemReqRemap->In, &pMemReqRemap->Aux);1608 1638 } 1609 1639 … … 1761 1791 } 1762 1792 else 1763 pThis->enmDiag = kDmarDiag_CcmdReg_Not Supported;1793 pThis->enmDiag = kDmarDiag_CcmdReg_Not_Supported; 1764 1794 dmarRegChangeRaw64(pThis, VTD_MMIO_OFF_GSTS_REG, ~VTD_BF_CCMD_REG_CAIG_MASK, 0 /* fOrMask */); 1765 1795 } … … 1845 1875 /* Hardware treats bit 4 as RsvdZ in this situation, so clear it. */ 1846 1876 dmarRegChangeRaw32(pThis, offReg, ~RT_BIT(4), 0 /* fOrMask */); 1847 dmarIqeFaultRecord(pDevIns, kDmarDiag_IqtReg_Qt_Not Aligned, VTDIQEI_QUEUE_TAIL_MISALIGNED);1877 dmarIqeFaultRecord(pDevIns, kDmarDiag_IqtReg_Qt_Not_Aligned, VTDIQEI_QUEUE_TAIL_MISALIGNED); 1848 1878 } 1849 1879 return VINF_SUCCESS; … … 2090 2120 } 2091 2121 2092 if (pMemReqAux->fTtm == VTD_TTM_LEGACY_MODE) 2093 dmarAtFaultRecordEx(pDevIns, kDmarDiag_Atf_Lgn_4, VTDATFAULT_LGN_4, pMemReqIn, pMemReqAux); 2094 else 2095 dmarAtFaultRecordEx(pDevIns, kDmarDiag_Atf_Sgn_8, VTDATFAULT_SGN_8, pMemReqIn, pMemReqAux); 2122 dmarAtFaultRecord(pDevIns, kDmarDiag_At_Xm_AddrOut_Invalid, pMemReqIn, pMemReqAux); 2096 2123 return VERR_IOMMU_ADDR_TRANSLATION_FAILED; 2097 2124 } … … 2138 2165 else 2139 2166 { 2140 if (pMemReqAux->fTtm == VTD_TTM_LEGACY_MODE) 2141 dmarAtFaultRecordEx(pDevIns, kDmarDiag_Atf_Lgn_1_1, VTDATFAULT_LGN_1_1, pMemReqIn, pMemReqAux); 2142 else 2143 dmarAtFaultRecordEx(pDevIns, kDmarDiag_Atf_Sgn_5, VTDATFAULT_SGN_5, pMemReqIn, pMemReqAux); 2167 dmarAtFaultRecord(pDevIns, kDmarDiag_At_Xm_AddrIn_Invalid, pMemReqIn, pMemReqAux); 2144 2168 return VERR_IOMMU_ADDR_TRANSLATION_FAILED; 2145 2169 } … … 2169 2193 else 2170 2194 { 2171 if (pMemReqAux->fTtm == VTD_TTM_LEGACY_MODE) 2172 dmarAtFaultRecordEx(pDevIns, kDmarDiag_Atf_Lsl_2, VTDATFAULT_LSL_2, pMemReqIn, pMemReqAux); 2173 else 2174 dmarAtFaultRecordEx(pDevIns, kDmarDiag_Atf_Ssl_2, VTDATFAULT_SSL_2, pMemReqIn, pMemReqAux); 2195 dmarAtFaultRecord(pDevIns, kDmarDiag_At_Xm_Perm_Denied, pMemReqIn, pMemReqAux); 2175 2196 return VERR_IOMMU_ADDR_TRANSLATION_FAILED; 2176 2197 } … … 2183 2204 else 2184 2205 { 2185 if (pMemReqAux->fTtm == VTD_TTM_LEGACY_MODE) 2186 dmarAtFaultRecordEx(pDevIns, kDmarDiag_Atf_Lsl_2, VTDATFAULT_LSL_2, pMemReqIn, pMemReqAux); 2187 else 2188 dmarAtFaultRecordEx(pDevIns, kDmarDiag_Atf_Ssl_3, VTDATFAULT_SSL_3, pMemReqIn, pMemReqAux); 2206 dmarAtFaultRecord(pDevIns, kDmarDiag_At_Xm_Pte_Rsvd, pMemReqIn, pMemReqAux); 2189 2207 return VERR_IOMMU_ADDR_TRANSLATION_FAILED; 2190 2208 } … … 2212 2230 } 2213 2231 2214 if (pMemReqAux->fTtm == VTD_TTM_LEGACY_MODE) 2215 dmarAtFaultRecordEx(pDevIns, kDmarDiag_Atf_Lsl_2_LargePage, VTDATFAULT_LSL_2, pMemReqIn, pMemReqAux); 2216 else 2217 dmarAtFaultRecordEx(pDevIns, kDmarDiag_Atf_Ssl_3_LargePage, VTDATFAULT_SSL_3, pMemReqIn, pMemReqAux); 2232 dmarAtFaultRecord(pDevIns, kDmarDiag_At_Xm_Pte_Sllps_Invalid, pMemReqIn, pMemReqAux); 2218 2233 return VERR_IOMMU_ADDR_TRANSLATION_FAILED; 2219 2234 } … … 2246 2261 else 2247 2262 { 2248 if (pMemReqAux->fTtm == VTD_TTM_LEGACY_MODE) 2249 dmarAtFaultRecordEx(pDevIns, kDmarDiag_Atf_Lsl_1, VTDATFAULT_LSL_1, pMemReqIn, pMemReqAux); 2250 else 2251 dmarAtFaultRecordEx(pDevIns, kDmarDiag_Atf_Ssl_1, VTDATFAULT_SSL_1, pMemReqIn, pMemReqAux); 2263 dmarAtFaultRecord(pDevIns, kDmarDiag_At_Xm_Read_Pte_Failed, pMemReqIn, pMemReqAux); 2252 2264 return VERR_IOMMU_ADDR_TRANSLATION_FAILED; 2253 2265 } … … 2373 2385 static int dmarDrLegacyModeRemapAddr(PPDMDEVINS pDevIns, uint64_t uRtaddrReg, PDMARMEMREQREMAP pMemReqRemap) 2374 2386 { 2375 Assert(pMemReqRemap->Aux.fTtm == VTD_TTM_LEGACY_MODE); /* Paranoia. */ 2387 PCDMARMEMREQIN pMemReqIn = &pMemReqRemap->In; 2388 PDMARMEMREQAUX pMemReqAux = &pMemReqRemap->Aux; 2389 PDMARMEMREQOUT pMemReqOut = &pMemReqRemap->Out; 2390 Assert(pMemReqAux->fTtm == VTD_TTM_LEGACY_MODE); /* Paranoia. */ 2376 2391 2377 2392 /* Read the root-entry from guest memory. */ 2378 uint8_t const idxRootEntry = RT_HI_U8(pMemReq Remap->In.idDevice);2393 uint8_t const idxRootEntry = RT_HI_U8(pMemReqIn->idDevice); 2379 2394 VTD_ROOT_ENTRY_T RootEntry; 2380 2395 int rc = dmarDrReadRootEntry(pDevIns, uRtaddrReg, idxRootEntry, &RootEntry); … … 2393 2408 /* Read the context-entry from guest memory. */ 2394 2409 RTGCPHYS const GCPhysCtxTable = uRootEntryQword0 & VTD_BF_0_ROOT_ENTRY_CTP_MASK; 2395 uint8_t const idxCtxEntry = RT_LO_U8(pMemReq Remap->In.idDevice);2410 uint8_t const idxCtxEntry = RT_LO_U8(pMemReqIn->idDevice); 2396 2411 VTD_CONTEXT_ENTRY_T CtxEntry; 2397 2412 rc = dmarDrReadCtxEntry(pDevIns, GCPhysCtxTable, idxCtxEntry, &CtxEntry); … … 2402 2417 2403 2418 /* Note the FPD bit which software can use to supress translation faults from here on in. */ 2404 pMemReq Remap->Aux.fFpd = RT_BF_GET(uCtxEntryQword0, VTD_BF_0_CONTEXT_ENTRY_FPD);2419 pMemReqAux->fFpd = RT_BF_GET(uCtxEntryQword0, VTD_BF_0_CONTEXT_ENTRY_FPD); 2405 2420 2406 2421 /* Check if the context-entry is present (must be done before validating reserved bits). */ … … 2413 2428 { 2414 2429 /* Get the domain ID for this mapping. */ 2415 pMemReq Remap->Out.idDomain = RT_BF_GET(uCtxEntryQword1, VTD_BF_1_CONTEXT_ENTRY_DID);2430 pMemReqOut->idDomain = RT_BF_GET(uCtxEntryQword1, VTD_BF_1_CONTEXT_ENTRY_DID); 2416 2431 2417 2432 /* Validate the translation type (TT). */ … … 2426 2441 * through SLPTPTR. Translated requests and Translation Requests are blocked. 2427 2442 */ 2428 if (pMemReq Remap->In.enmAddrType == PCIADDRTYPE_UNTRANSLATED)2443 if (pMemReqIn->enmAddrType == PCIADDRTYPE_UNTRANSLATED) 2429 2444 { 2430 2445 /* Validate the address width and get the paging level. */ … … 2439 2454 { 2440 2455 /* Finally... perform second-level translation. */ 2441 pMemReq Remap->Aux.uSlptPtr = SlptPtr;2442 pMemReq Remap->Aux.cPagingLevel = cPagingLevel;2456 pMemReqAux->uSlptPtr = SlptPtr; 2457 pMemReqAux->cPagingLevel = cPagingLevel; 2443 2458 return dmarDrMemRangeLookup(pDevIns, dmarDrSecondLevelTranslate, pMemReqRemap); 2444 2459 } 2445 dmarAtFaultRecord(pDevIns, kDmarDiag_At f_Lct_4_3, VTDATFAULT_LCT_4_3, pMemReqRemap);2460 dmarAtFaultRecord(pDevIns, kDmarDiag_At_Lm_Slpptr_Read_Failed, pMemReqIn, pMemReqAux); 2446 2461 } 2447 2462 else 2448 dmarAtFaultRecord(pDevIns, kDmarDiag_At f_Lct_4_1, VTDATFAULT_LCT_4_1, pMemReqRemap);2463 dmarAtFaultRecord(pDevIns, kDmarDiag_At_Lm_Ut_Aw_Invalid, pMemReqIn, pMemReqAux); 2449 2464 } 2450 2465 else 2451 dmarAtFaultRecord(pDevIns, kDmarDiag_At f_Lct_5, VTDATFAULT_LCT_5, pMemReqRemap);2466 dmarAtFaultRecord(pDevIns, kDmarDiag_At_Lm_Ut_At_Block, pMemReqIn, pMemReqAux); 2452 2467 break; 2453 2468 } … … 2473 2488 return VINF_SUCCESS; 2474 2489 } 2475 dmarAtFaultRecord(pDevIns, kDmarDiag_At f_Lgn_1_3, VTDATFAULT_LGN_1_3, pMemReqRemap);2490 dmarAtFaultRecord(pDevIns, kDmarDiag_At_Lm_Pt_Aw_Invalid, pMemReqIn, pMemReqAux); 2476 2491 } 2477 2492 else 2478 dmarAtFaultRecord(pDevIns, kDmarDiag_At f_Lct_5, VTDATFAULT_LCT_5, pMemReqRemap);2493 dmarAtFaultRecord(pDevIns, kDmarDiag_At_Lm_Pt_At_Block, pMemReqIn, pMemReqAux); 2479 2494 break; 2480 2495 } … … 2495 2510 { 2496 2511 /* Any other TT value is reserved. */ 2497 dmarAtFaultRecord(pDevIns, kDmarDiag_At f_Lct_4_2, VTDATFAULT_LCT_4_2, pMemReqRemap);2512 dmarAtFaultRecord(pDevIns, kDmarDiag_At_Lm_Tt_Invalid, pMemReqIn, pMemReqAux); 2498 2513 break; 2499 2514 } … … 2501 2516 } 2502 2517 else 2503 dmarAtFaultRecord(pDevIns, kDmarDiag_At f_Lct_3, VTDATFAULT_LCT_3, pMemReqRemap);2518 dmarAtFaultRecord(pDevIns, kDmarDiag_At_Lm_CtxEntry_Rsvd, pMemReqIn, pMemReqAux); 2504 2519 } 2505 2520 else 2506 dmarAtFaultRecord(pDevIns, kDmarDiag_At f_Lct_2, VTDATFAULT_LCT_2, pMemReqRemap);2521 dmarAtFaultRecord(pDevIns, kDmarDiag_At_Lm_CtxEntry_Not_Present, pMemReqIn, pMemReqAux); 2507 2522 } 2508 2523 else 2509 dmarAtFaultRecord(pDevIns, kDmarDiag_At f_Lct_1, VTDATFAULT_LCT_1, pMemReqRemap);2524 dmarAtFaultRecord(pDevIns, kDmarDiag_At_Lm_CtxEntry_Read_Failed, pMemReqIn, pMemReqAux); 2510 2525 } 2511 2526 else 2512 dmarAtFaultRecord(pDevIns, kDmarDiag_At f_Lrt_3, VTDATFAULT_LRT_3, pMemReqRemap);2527 dmarAtFaultRecord(pDevIns, kDmarDiag_At_Lm_RootEntry_Rsvd, pMemReqIn, pMemReqAux); 2513 2528 } 2514 2529 else 2515 dmarAtFaultRecord(pDevIns, kDmarDiag_At f_Lrt_2, VTDATFAULT_LRT_2, pMemReqRemap);2530 dmarAtFaultRecord(pDevIns, kDmarDiag_At_Lm_RootEntry_Not_Present, pMemReqIn, pMemReqAux); 2516 2531 } 2517 2532 else 2518 dmarAtFaultRecord(pDevIns, kDmarDiag_At f_Lrt_1, VTDATFAULT_LRT_1, pMemReqRemap);2533 dmarAtFaultRecord(pDevIns, kDmarDiag_At_Lm_RootEntry_Read_Failed, pMemReqIn, pMemReqAux); 2519 2534 return VERR_IOMMU_ADDR_TRANSLATION_FAILED; 2520 2535 } … … 2531 2546 static int dmarDrScalableModeRemapAddr(PPDMDEVINS pDevIns, uint64_t uRtaddrReg, PDMARMEMREQREMAP pMemReqRemap) 2532 2547 { 2548 NOREF(pMemReqRemap); 2549 2533 2550 PCDMAR pThis = PDMDEVINS_2_DATA(pDevIns, PDMAR); 2534 2551 if (pThis->fExtCapReg & VTD_BF_ECAP_REG_SMTS_MASK) … … 2538 2555 } 2539 2556 2540 dmarAtFaultRecord(pDevIns, kDmarDiag_Atf_Rta_1_3, VTDATFAULT_RTA_1_3, pMemReqRemap);2541 2557 return VERR_IOMMU_ADDR_TRANSLATION_FAILED; 2542 2558 } … … 2638 2654 case VTD_TTM_SCALABLE_MODE: 2639 2655 { 2640 rc = dmarDrScalableModeRemapAddr(pDevIns, uRtaddrReg, &MemReqRemap); 2656 if (pThis->fExtCapReg & VTD_BF_ECAP_REG_SMTS_MASK) 2657 rc = dmarDrScalableModeRemapAddr(pDevIns, uRtaddrReg, &MemReqRemap); 2658 else 2659 { 2660 rc = VERR_IOMMU_ADDR_TRANSLATION_FAILED; 2661 dmarAtFaultRecord(pDevIns, kDmarDiag_At_Rta_Smts_Not_Supported, &MemReqRemap.In, &MemReqRemap.Aux); 2662 } 2641 2663 break; 2642 2664 } … … 2648 2670 dmarDrTargetAbort(pDevIns); 2649 2671 else 2650 dmarAtFaultRecord(pDevIns, kDmarDiag_At f_Rta_1_1, VTDATFAULT_RTA_1_1, &MemReqRemap);2672 dmarAtFaultRecord(pDevIns, kDmarDiag_At_Rta_Adms_Not_Supported, &MemReqRemap.In, &MemReqRemap.Aux); 2651 2673 break; 2652 2674 } … … 2655 2677 { 2656 2678 rc = VERR_IOMMU_ADDR_TRANSLATION_FAILED; 2657 dmarAtFaultRecord(pDevIns, kDmarDiag_At f_Rta_1_2, VTDATFAULT_RTA_1_2, &MemReqRemap);2679 dmarAtFaultRecord(pDevIns, kDmarDiag_At_Rta_Rsvd, &MemReqRemap.In, &MemReqRemap.Aux); 2658 2680 break; 2659 2681 }
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