Changeset 89590 in vbox for trunk/src/VBox/Devices/testcase

Timestamp:

Jun 10, 2021 8:43:08 AM (4 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

145028

Message:

Intel IOMMU: bugref:9967 Added to device struct size and alignment tests.

Location:

trunk/src/VBox/Devices/testcase

Files:

• Makefile.kmk (modified) (1 diff)
• tstDeviceStructSize.cpp (modified) (2 diffs)
• tstDeviceStructSizeRC.cpp (modified) (2 diffs)

trunk/src/VBox/Devices/testcase/Makefile.kmk

@@ -49 +49 @@
         $(if $(VBOX_WITH_XHCI_IMPL),VBOX_WITH_XHCI_IMPL,) \
         $(if $(VBOX_WITH_IOMMU_AMD),VBOX_WITH_IOMMU_AMD,) \
-       $(VBOX_AUDIO_DEFS) \
-       $(VMM_COMMON_DEFS)
+        $(if $(VBOX_WITH_IOMMU_INTEL),VBOX_WITH_IOMMU_INTEL,) \
+        $(VBOX_AUDIO_DEFS) \
+        $(VMM_COMMON_DEFS)
 
 #

trunk/src/VBox/Devices/testcase/tstDeviceStructSize.cpp

@@ -134 +134 @@
 # undef LOG_GROUP
 # include "../Bus/DevIommuAmd.cpp"
+#endif
+#ifdef VBOX_WITH_IOMMU_INTEL
+# undef LOG_GROUP
+# include "../Bus/DevIommuIntel.cpp"
 #endif
 
@@ -420 +424 @@
 # endif
 #endif
+#ifdef VBOX_WITH_IOMMU_INTEL
+    CHECK_MEMBER_ALIGNMENT(DMAR, abRegs0, 8);
+    CHECK_MEMBER_ALIGNMENT(DMAR, abRegs1, 8);
+    CHECK_MEMBER_ALIGNMENT(DMAR, uIrtaReg, 8);
+    CHECK_MEMBER_ALIGNMENT(DMAR, uRtaddrReg, 8);
+    CHECK_MEMBER_ALIGNMENT(DMAR, hEvtInvQueue, 8);
+# ifdef VBOX_WITH_STATISTICS
+    CHECK_MEMBER_ALIGNMENT(DMAR, StatMmioReadR3, 8);
+    CHECK_MEMBER_ALIGNMENT(DMAR, StatPasidDevtlbInvDsc, 8);
+# endif
+#endif
 
 #ifdef VBOX_WITH_RAW_MODE

trunk/src/VBox/Devices/testcase/tstDeviceStructSizeRC.cpp

@@ -147 +147 @@
 # undef LOG_GROUP
 # include "../Bus/DevIommuAmd.cpp"
+#endif
+#ifdef VBOX_WITH_IOMMU_INTEL
+# undef LOG_GROUP
+# include "../Bus/DevIommuIntel.cpp"
 #endif
 
@@ -2216 +2220 @@
 # endif
 #endif
+
+#ifdef VBOX_WITH_IOMMU_INTEL
+    GEN_CHECK_SIZE(DMAR);
+    GEN_CHECK_OFF(DMAR, idxIommu);
+    GEN_CHECK_OFF(DMAR, abRegs0);
+    GEN_CHECK_OFF(DMAR, abRegs1);
+    GEN_CHECK_OFF(DMAR, uIrtaReg);
+    GEN_CHECK_OFF(DMAR, uRtaddrReg);
+    GEN_CHECK_OFF(DMAR, uVerReg);
+    GEN_CHECK_OFF(DMAR, fCapReg);
+    GEN_CHECK_OFF(DMAR, fExtCapReg);
+    GEN_CHECK_OFF(DMAR, fHawBaseMask);
+    GEN_CHECK_OFF(DMAR, fMgawInvMask);
+    GEN_CHECK_OFF(DMAR, cMaxPagingLevel);
+    GEN_CHECK_OFF(DMAR, fPermValidMask);
+    GEN_CHECK_OFF(DMAR, hEvtInvQueue);
+    GEN_CHECK_OFF(DMAR, enmDiag);
+    GEN_CHECK_OFF(DMAR, hMmio);
+# ifdef VBOX_WITH_STATISTICS
+    GEN_CHECK_OFF(DMAR, StatMmioReadR3);
+    GEN_CHECK_OFF(DMAR, StatMmioReadRZ);
+    GEN_CHECK_OFF(DMAR, StatMmioWriteR3);
+    GEN_CHECK_OFF(DMAR, StatMmioWriteRZ);
+    GEN_CHECK_OFF(DMAR, StatMsiRemapCfiR3);
+    GEN_CHECK_OFF(DMAR, StatMsiRemapCfiRZ);
+    GEN_CHECK_OFF(DMAR, StatMsiRemapRfiR3);
+    GEN_CHECK_OFF(DMAR, StatMsiRemapRfiRZ);
+    GEN_CHECK_OFF(DMAR, StatMemReadR3);
+    GEN_CHECK_OFF(DMAR, StatMemReadRZ);
+    GEN_CHECK_OFF(DMAR, StatMemWriteR3);
+    GEN_CHECK_OFF(DMAR, StatMemWriteRZ);
+    GEN_CHECK_OFF(DMAR, StatMemBulkReadR3);
+    GEN_CHECK_OFF(DMAR, StatMemBulkReadRZ);
+    GEN_CHECK_OFF(DMAR, StatMemBulkWriteR3);
+    GEN_CHECK_OFF(DMAR, StatMemBulkWriteRZ);
+    GEN_CHECK_OFF(DMAR, StatCcInvDsc);
+    GEN_CHECK_OFF(DMAR, StatIotlbInvDsc);
+    GEN_CHECK_OFF(DMAR, StatDevtlbInvDsc);
+    GEN_CHECK_OFF(DMAR, StatIecInvDsc);
+    GEN_CHECK_OFF(DMAR, StatInvWaitDsc);
+    GEN_CHECK_OFF(DMAR, StatPasidIotlbInvDsc);
+    GEN_CHECK_OFF(DMAR, StatPasidCacheInvDsc);
+    GEN_CHECK_OFF(DMAR, StatPasidDevtlbInvDsc);
+# endif
+
+    GEN_CHECK_SIZE(DMARIOPAGE);
+    GEN_CHECK_OFF(DMARIOPAGE, GCPhysBase);
+    GEN_CHECK_OFF(DMARIOPAGE, cShift);
+    GEN_CHECK_OFF(DMARIOPAGE, fPerm);
+
+    GEN_CHECK_SIZE(DMARIOADDRRANGE);
+    GEN_CHECK_OFF(DMARIOADDRRANGE, uAddr);
+    GEN_CHECK_OFF(DMARIOADDRRANGE, cb);
+    GEN_CHECK_OFF(DMARIOADDRRANGE, fPerm);
+
+    GEN_CHECK_SIZE(DMARMEMREQIN);
+    GEN_CHECK_OFF(DMARMEMREQIN, AddrRange);
+    GEN_CHECK_OFF(DMARMEMREQIN, idDevice);
+    GEN_CHECK_OFF(DMARMEMREQIN, Pasid);
+    GEN_CHECK_OFF(DMARMEMREQIN, enmAddrType);
+    GEN_CHECK_OFF(DMARMEMREQIN, enmReqType);
+
+    GEN_CHECK_SIZE(DMARMEMREQOUT);
+    GEN_CHECK_OFF(DMARMEMREQOUT, AddrRange);
+    GEN_CHECK_OFF(DMARMEMREQOUT, idDomain);
+
+    GEN_CHECK_SIZE(DMARMEMREQAUX);
+    GEN_CHECK_OFF(DMARMEMREQAUX, fTtm
+    GEN_CHECK_OFF(DMARMEMREQAUX, fFpd);
+    GEN_CHECK_OFF(DMARMEMREQAUX, cPagingLevel);
+    GEN_CHECK_OFF(DMARMEMREQAUX, GCPhysFlPt);
+    GEN_CHECK_OFF(DMARMEMREQAUX, GCPhysSlPt);
+
+    GEN_CHECK_SIZE(DMARMEMREQREMAP);
+    GEN_CHECK_OFF(DMARMEMREQREMAP, In);
+    GEN_CHECK_OFF(DMARMEMREQREMAP, Aux);
+    GEN_CHECK_OFF(DMARMEMREQREMAP, Out);
+#endif
+
     return (0);
 }