- Timestamp:
- May 20, 2008 6:22:41 PM (17 years ago)
- Location:
- trunk/src/VBox/Disassembler/testcase
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Disassembler/testcase/tstAsmLock-1.asm
r8968 r8971 25 25 26 26 %include "tstAsm.mac" 27 %if TEST_BITS == 64 28 ; The disassembler doesn't do imm32 right for 64-bit stuff, so disable it for now. 29 ; %define WITH_64_BIT_TESTS_IMM32 30 %define WITH_64_BIT_TESTS 31 %endif 27 32 28 33 BITS TEST_BITS 29 34 30 ; The disassembler doesn't do imm32 right for 64-bit stuff, so disable it for now. 31 ;%if TEST_BITS == 64 32 ; %define WITH_64_BIT_TESTS 33 ;%endif 34 35 ; 35 36 ; ADC 37 ; 36 38 ; 80 /2 ib ADC reg/mem8, imm8 - sans reg dst 37 39 lock adc byte [1000h], byte 8 … … 45 47 lock adc dword [xBX], dword 0cc90cc90h 46 48 lock adc dword [xDI], dword 0cc90cc90h 47 %ifdef WITH_64_BIT_TESTS 49 %ifdef WITH_64_BIT_TESTS_IMM32 48 50 lock adc qword [1000h], dword 0cc90cc90h 49 51 lock adc qword [rbx], dword 0cc90cc90h … … 97 99 lock add dword [xBX], dword 0cc90cc90h 98 100 lock add dword [xDI], dword 0cc90cc90h 99 %ifdef WITH_64_BIT_TESTS 101 %ifdef WITH_64_BIT_TESTS_IMM32 100 102 lock add qword [1000h], dword 0cc90cc90h 101 103 lock add qword [rbx], dword 0cc90cc90h … … 149 151 lock and dword [xBX], dword 0cc90cc90h 150 152 lock and dword [xDI], dword 0cc90cc90h 151 %ifdef WITH_64_BIT_TESTS 153 %ifdef WITH_64_BIT_TESTS_IMM32 152 154 lock and qword [1000h], dword 0cc90cc90h 153 155 lock and qword [rbx], dword 0cc90cc90h … … 187 189 %endif 188 190 191 ; 189 192 ; BTC 193 ; 194 ; 0f bb /r BTC reg/memX, regX (X != 8) - sans reg dst 195 lock btc word [20cch], bx 196 lock btc word [xBX], bx 197 lock btc word [xDI], bx 198 lock btc dword [20cch], ebx 199 lock btc dword [xBX], ebx 200 lock btc dword [xDI], ebx 201 %ifdef WITH_64_BIT_TESTS 202 lock btc qword [20cch], rbx 203 lock btc qword [rdx], rbx 204 lock btc qword [rdi], r10 205 lock btc qword [r8], r12 206 %endif 207 ; 0f ba /7 ib BTC reg/memX, imm8 (X != 8) - sans reg dst 208 lock btc word [20cch], 15 209 lock btc word [xBX], 15 210 lock btc word [xDI], 15 211 lock btc dword [20cch], 30 212 lock btc dword [xBX], 30 213 lock btc dword [xDI], 30 214 %ifdef WITH_64_BIT_TESTS 215 lock btc qword [20cch], 60 216 lock btc qword [rdx], 60 217 lock btc qword [rdi], 60 218 lock btc qword [r9], 60 219 lock btc qword [r12], 60 220 %endif 221 222 ; 190 223 ; BTR 224 ; 225 ; 0f b3 /r BTR reg/memX, regX (X != 8) - sans reg dst 226 lock btr word [20cch], bx 227 lock btr word [xBX], bx 228 lock btr word [xDI], bx 229 lock btr dword [20cch], ebx 230 lock btr dword [xBX], ebx 231 lock btr dword [xDI], ebx 232 %ifdef WITH_64_BIT_TESTS 233 lock btr qword [20cch], rbx 234 lock btr qword [rdx], rbx 235 lock btr qword [rdi], r10 236 lock btr qword [r8], r12 237 %endif 238 ; 0f ba /6 ib BTR reg/memX, imm8 (X != 8) - sans reg dst 239 lock btr word [20cch], 15 240 lock btr word [xBX], 15 241 lock btr word [xDI], 15 242 lock btr dword [20cch], 30 243 lock btr dword [xBX], 30 244 lock btr dword [xDI], 30 245 %ifdef WITH_64_BIT_TESTS 246 lock btr qword [20cch], 60 247 lock btr qword [rdx], 60 248 lock btr qword [rdi], 60 249 lock btr qword [r9], 60 250 lock btr qword [r12], 60 251 %endif 252 253 ; 191 254 ; BTS 255 ; 256 ; 0f ab /r BTS reg/memX, regX (X != 8) - sans reg dst 257 lock bts word [20cch], bx 258 lock bts word [xBX], bx 259 lock bts word [xDI], bx 260 lock bts dword [20cch], ebx 261 lock bts dword [xBX], ebx 262 lock bts dword [xDI], ebx 263 %if TEST_BITS == 64 264 lock bts qword [20cch], rbx 265 lock bts qword [rdx], rbx 266 lock bts qword [rdi], r10 267 lock bts qword [r8], r12 268 %endif 269 ; 0f ba /5 ib BTS reg/memX, imm8 (X != 8) - sans reg dst 270 lock bts word [20cch], 15 271 lock bts word [xBX], 15 272 lock bts word [xDI], 15 273 lock bts dword [20cch], 30 274 lock bts dword [xBX], 30 275 lock bts dword [xDI], 30 276 %if TEST_BITS == 64 277 lock bts qword [20cch], 60 278 lock bts qword [rdx], 60 279 lock bts qword [rdi], 60 280 lock bts qword [r9], 60 281 lock bts qword [r12], 60 282 %endif 283 192 284 ; CMPXCHG 193 285 ; CMPXCHG8B -
trunk/src/VBox/Disassembler/testcase/tstAsmLock-2.asm
r8968 r8971 24 24 25 25 %include "tstAsm.mac" 26 %if TEST_BITS == 64 27 ; The disassembler doesn't do imm32 right for 64-bit stuff, so disable it for now. 28 ; %define WITH_64_BIT_TESTS_IMM32 29 %define WITH_64_BIT_TESTS 30 %endif 26 31 27 32 BITS TEST_BITS 28 ; The disassembler doesn't do imm32 right for 64-bit stuff, so disable it for now.29 ;%if TEST_BITS == 6430 ; %define WITH_64_BIT_TESTS31 ;%endif32 33 33 34 ; … … 39 40 lock adc ax, word 16 40 41 lock adc eax, dword 128 41 %ifdef WITH_64_BIT_TESTS 42 %ifdef WITH_64_BIT_TESTS_IMM32 42 43 lock adc rax, dword 256 43 44 lock adc rax, dword 0cc90cc90h … … 48 49 lock adc cx, word 1000h 49 50 lock adc ecx, dword 100000h 50 %ifdef WITH_64_BIT_TESTS 51 %ifdef WITH_64_BIT_TESTS_IMM32 51 52 lock adc rcx, dword 100000h 52 53 %endif … … 54 55 lock adc cx, byte 07fh 55 56 lock adc ecx, byte 07fh 56 %ifdef WITH_64_BIT_TESTS 57 %ifdef WITH_64_BIT_TESTS_IMM32 57 58 lock adc rcx, byte 07fh 58 59 %endif … … 83 84 lock add ax, word 16 84 85 lock add eax, dword 128 85 %ifdef WITH_64_BIT_TESTS 86 %ifdef WITH_64_BIT_TESTS_IMM32 86 87 lock add rax, dword 256 87 88 lock add rax, dword 0cc90cc90h … … 92 93 lock add cx, word 1000h 93 94 lock add ecx, dword 100000h 94 %ifdef WITH_64_BIT_TESTS 95 %ifdef WITH_64_BIT_TESTS_IMM32 95 96 lock add rcx, dword 100000h 96 97 %endif … … 127 128 lock and ax, word 16 128 129 lock and eax, dword 128 129 %ifdef WITH_64_BIT_TESTS 130 %ifdef WITH_64_BIT_TESTS_IMM32 130 131 lock and rax, dword 256 131 132 lock and rax, dword 0cc90cc90h … … 136 137 lock and cx, word 1000h 137 138 lock and ecx, dword 100000h 138 %ifdef WITH_64_BIT_TESTS 139 %ifdef WITH_64_BIT_TESTS_IMM32 139 140 lock and rcx, dword 100000h 140 141 %endif … … 163 164 %endif 164 165 166 ; 165 167 ; BTC 168 ; 169 ; 0f bb /r BTC reg/memX, regX (X != 8) - with reg dst 170 lock btc cx, bx 171 lock btc ecx, ebx 172 %ifdef WITH_64_BIT_TESTS 173 lock btc rcx, rbx 174 lock btc r8, rbx 175 lock btc r10, r8 176 %endif 177 ; 0f ba /7 ib BTC reg/memX, imm8 (X != 8) - with reg dst 178 lock btc cx, 15 179 lock btc ecx, 30 180 %ifdef WITH_64_BIT_TESTS 181 lock btc rcx, 60 182 lock btc r8, 61 183 lock btc r10, 3 184 %endif 185 186 ; 166 187 ; BTR 188 ; 189 ; 0f b3 /r BTR reg/memX, regX (X != 8) - with reg dst 190 lock btr cx, bx 191 lock btr ecx, ebx 192 %ifdef WITH_64_BIT_TESTS 193 lock btr rcx, rbx 194 lock btr r8, rbx 195 lock btr r10, r8 196 %endif 197 ; 0f ba /6 ib BTR reg/memX, imm8 (X != 8) - with reg dst 198 lock btr cx, 15 199 lock btr ecx, 30 200 %ifdef WITH_64_BIT_TESTS 201 lock btr rcx, 60 202 lock btr r8, 61 203 lock btr r10, 3 204 %endif 205 206 ; 167 207 ; BTS 208 ; 209 ; 0f ab /r BTS reg/memX, regX (X != 8) - with reg dst 210 lock bts cx, bx 211 lock bts ecx, ebx 212 %ifdef WITH_64_BIT_TESTS 213 lock bts rcx, rbx 214 lock bts r8, rbx 215 lock bts r10, r8 216 %endif 217 ; 0f ba /5 ib BTS reg/memX, imm8 (X != 8) - with reg dst 218 lock bts cx, 15 219 lock bts ecx, 30 220 %ifdef WITH_64_BIT_TESTS 221 lock bts rcx, 60 222 lock bts r8, 61 223 lock bts r10, 3 224 %endif 225 168 226 ; CMPXCHG 169 227 ; CMPXCHG8B
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