Changeset 89756 in vbox for trunk/src/VBox/Devices/Audio
- Timestamp:
- Jun 16, 2021 11:22:00 PM (4 years ago)
- svn:sync-xref-src-repo-rev:
- 145207
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Audio/DevIchAc97.cpp
r89754 r89756 401 401 /** Number of bytes involved in unresolved flow errors. */ 402 402 STAMCOUNTER StatDmaFlowErrorBytes; 403 STAMPROFILE StatStart; 404 STAMPROFILE StatReset; 405 STAMPROFILE StatStop; 406 STAMCOUNTER StatWriteLviRecover; 407 STAMCOUNTER StatWriteCr; 403 408 } AC97STREAMSTATE; 404 409 AssertCompileSizeAlignment(AC97STREAMSTATE, 8); … … 445 450 /** The timer for pumping data thru the attached LUN drivers. */ 446 451 TMTIMERHANDLE hTimer; 452 STAMCOUNTER StatWriteLvi; 453 STAMCOUNTER StatWriteSr1; 454 STAMCOUNTER StatWriteSr2; 455 STAMCOUNTER StatWriteBdBar; 447 456 } AC97STREAM; 448 457 AssertCompileSizeAlignment(AC97STREAM, 8); … … 2648 2657 case AC97_NABM_OFF_LVI: 2649 2658 DEVAC97_LOCK_RETURN(pDevIns, pThis, VINF_IOM_R3_IOPORT_WRITE); 2659 2650 2660 if ( !(pRegs->sr & AC97_SR_DCH) 2651 2661 || !(pRegs->cr & AC97_CR_RPBM)) 2652 2662 { 2653 2663 pRegs->lvi = u32 % AC97_MAX_BDLE; 2664 STAM_REL_COUNTER_INC(&pStream->StatWriteLvi); 2654 2665 DEVAC97_UNLOCK(pDevIns, pThis); 2655 2666 Log3Func(("[SD%RU8] LVI <- %#x\n", pStream->u8SD, u32)); … … 2675 2686 /** @todo Stop the DMA timer when we get into the AC97_SR_CELV situation to 2676 2687 * avoid potential race here. */ 2688 STAM_REL_COUNTER_INC(&pStreamCC->State.StatWriteLviRecover); 2677 2689 DEVAC97_UNLOCK(pDevIns, pThis); 2678 2690 … … 2696 2708 #ifdef IN_RING3 2697 2709 DEVAC97_LOCK(pDevIns, pThis); 2710 STAM_REL_COUNTER_INC(&pStreamCC->State.StatWriteCr); 2698 2711 2699 2712 uint32_t const fCrChanged = pRegs->cr ^ u32; … … 2705 2718 if (u32 & AC97_CR_RR) 2706 2719 { 2720 STAM_REL_PROFILE_START_NS(&pStreamCC->State.StatReset, r); 2707 2721 LogFunc(("[SD%RU8] Reset\n", pStream->u8SD)); 2708 2722 … … 2719 2733 2720 2734 DEVAC97_UNLOCK(pDevIns, pThis); 2735 STAM_REL_PROFILE_STOP_NS(&pStreamCC->State.StatReset, r); 2721 2736 break; 2722 2737 } … … 2734 2749 else if (!(pRegs->cr & AC97_CR_RPBM)) 2735 2750 { 2751 STAM_REL_PROFILE_START_NS(&pStreamCC->State.StatStop, p); 2736 2752 LogFunc(("[SD%RU8] Pause busmaster (disable stream) SR=%#x -> %#x\n", 2737 2753 pStream->u8SD, pRegs->sr, pRegs->sr | AC97_SR_DCH)); … … 2740 2756 2741 2757 DEVAC97_UNLOCK(pDevIns, pThis); 2758 STAM_REL_PROFILE_STOP_NS(&pStreamCC->State.StatStop, p); 2742 2759 } 2743 2760 /* … … 2746 2763 else 2747 2764 { 2765 STAM_REL_PROFILE_START_NS(&pStreamCC->State.StatStart, r); 2748 2766 LogFunc(("[SD%RU8] Run busmaster (enable stream) SR=%#x -> %#x\n", 2749 2767 pStream->u8SD, pRegs->sr, pRegs->sr & ~AC97_SR_DCH)); … … 2773 2791 int rc2 = PDMDevHlpTimerSetRelative(pDevIns, pStream->hTimer, cTicksToDeadline, NULL /*pu64Now*/); 2774 2792 AssertRC(rc2); 2793 2794 STAM_REL_PROFILE_STOP_NS(&pStreamCC->State.StatStart, r); 2775 2795 } 2776 2796 #else /* !IN_RING3 */ … … 2786 2806 DEVAC97_LOCK_RETURN(pDevIns, pThis, VINF_IOM_R3_IOPORT_WRITE); 2787 2807 ichac97StreamWriteSR(pDevIns, pThis, pStream, u32); 2808 STAM_REL_COUNTER_INC(&pStream->StatWriteSr1); 2788 2809 DEVAC97_UNLOCK(pDevIns, pThis); 2789 2810 break; … … 2802 2823 DEVAC97_LOCK_RETURN(pDevIns, pThis, VINF_IOM_R3_IOPORT_WRITE); 2803 2824 ichac97StreamWriteSR(pDevIns, pThis, pStream, u32); 2825 STAM_REL_COUNTER_INC(&pStream->StatWriteSr2); 2804 2826 DEVAC97_UNLOCK(pDevIns, pThis); 2805 2827 break; … … 2819 2841 pRegs->bdbar = u32 & ~(uint32_t)3; 2820 2842 Log3Func(("[SD%RU8] BDBAR <- %#x (bdbar %#x)\n", AC97_PORT2IDX(offPort), u32, pRegs->bdbar)); 2843 STAM_REL_COUNTER_INC(&pStream->StatWriteBdBar); 2821 2844 DEVAC97_UNLOCK(pDevIns, pThis); 2822 2845 break; … … 4482 4505 for (unsigned idxStream = 0; idxStream < RT_ELEMENTS(pThis->aStreams); idxStream++) 4483 4506 { 4507 PDMDevHlpSTAMRegisterF(pDevIns, &pThisCC->aStreams[idxStream].State.cbTransferChunk, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, 4508 "Bytes to transfer in the current DMA period.", "Stream%u/cbTransferChunk", idxStream); 4509 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aStreams[idxStream].Regs.cr, STAMTYPE_X8, STAMVISIBILITY_ALWAYS, STAMUNIT_NONE, 4510 "Control register (CR), bit 0 is the run bit.", "Stream%u/reg-CR", idxStream); 4511 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aStreams[idxStream].Regs.sr, STAMTYPE_X16, STAMVISIBILITY_ALWAYS, STAMUNIT_NONE, 4512 "Status register (SR).", "Stream%u/reg-SR", idxStream); 4513 PDMDevHlpSTAMRegisterF(pDevIns, &pThisCC->aStreams[idxStream].State.Cfg.Props.uHz, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, 4514 "The stream frequency.", "Stream%u/Hz", idxStream); 4515 PDMDevHlpSTAMRegisterF(pDevIns, &pThisCC->aStreams[idxStream].State.Cfg.Props.cbFrame, STAMTYPE_U8, STAMVISIBILITY_USED, STAMUNIT_BYTES, 4516 "The frame size.", "Stream%u/FrameSize", idxStream); 4484 4517 PDMDevHlpSTAMRegisterF(pDevIns, &pThisCC->aStreams[idxStream].State.offRead, STAMTYPE_U64, STAMVISIBILITY_USED, STAMUNIT_BYTES, 4485 "Virtual internal buffer read position.", "Stream%u/offRead", idxStream);4518 "Virtual internal buffer read position.", "Stream%u/offRead", idxStream); 4486 4519 PDMDevHlpSTAMRegisterF(pDevIns, &pThisCC->aStreams[idxStream].State.offWrite, STAMTYPE_U64, STAMVISIBILITY_USED, STAMUNIT_BYTES, 4487 "Virtual internal buffer write position.", "Stream%u/offWrite", idxStream);4520 "Virtual internal buffer write position.", "Stream%u/offWrite", idxStream); 4488 4521 PDMDevHlpSTAMRegisterF(pDevIns, &pThisCC->aStreams[idxStream].State.StatDmaBufSize, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, 4489 "Size of the internal DMA buffer.", "Stream%u/DMABufSize", idxStream);4522 "Size of the internal DMA buffer.", "Stream%u/DMABufSize", idxStream); 4490 4523 PDMDevHlpSTAMRegisterF(pDevIns, &pThisCC->aStreams[idxStream].State.StatDmaBufUsed, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, 4491 "Number of bytes used in the internal DMA buffer.", 4524 "Number of bytes used in the internal DMA buffer.", "Stream%u/DMABufUsed", idxStream); 4492 4525 PDMDevHlpSTAMRegisterF(pDevIns, &pThisCC->aStreams[idxStream].State.StatDmaFlowProblems, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, 4493 "Number of internal DMA buffer problems.", "Stream%u/DMABufferProblems", idxStream);4526 "Number of internal DMA buffer problems.", "Stream%u/DMABufferProblems", idxStream); 4494 4527 if (ichac97R3GetDirFromSD(idxStream) == PDMAUDIODIR_OUT) 4495 4528 PDMDevHlpSTAMRegisterF(pDevIns, &pThisCC->aStreams[idxStream].State.StatDmaFlowErrors, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, … … 4502 4535 "Number of bytes of silence added to cope with underruns.", "Stream%u/DMABufferSilence", idxStream); 4503 4536 } 4537 4538 PDMDevHlpSTAMRegisterF(pDevIns, &pThisCC->aStreams[idxStream].State.StatStart, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_NS_PER_CALL, 4539 "Starting the stream.", "Stream%u/Start", idxStream); 4540 PDMDevHlpSTAMRegisterF(pDevIns, &pThisCC->aStreams[idxStream].State.StatStop, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_NS_PER_CALL, 4541 "Stopping the stream.", "Stream%u/Stop", idxStream); 4542 PDMDevHlpSTAMRegisterF(pDevIns, &pThisCC->aStreams[idxStream].State.StatReset, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_NS_PER_CALL, 4543 "Resetting the stream.", "Stream%u/Reset", idxStream); 4544 PDMDevHlpSTAMRegisterF(pDevIns, &pThisCC->aStreams[idxStream].State.StatWriteCr, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, 4545 "CR register writes.", "Stream%u/WriteCr", idxStream); 4546 PDMDevHlpSTAMRegisterF(pDevIns, &pThisCC->aStreams[idxStream].State.StatWriteLviRecover, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, 4547 "LVI register writes recovering from underflow.", "Stream%u/WriteLviRecover", idxStream); 4548 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aStreams[idxStream].StatWriteLvi, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, 4549 "LVI register writes (non-recoving).", "Stream%u/WriteLvi", idxStream); 4550 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aStreams[idxStream].StatWriteSr1, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, 4551 "SR register 1-byte writes.", "Stream%u/WriteSr-1byte", idxStream); 4552 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aStreams[idxStream].StatWriteSr2, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, 4553 "SR register 2-byte writes.", "Stream%u/WriteSr-2byte", idxStream); 4554 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aStreams[idxStream].StatWriteBdBar, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, 4555 "BDBAR register writes.", "Stream%u/WriteBdBar", idxStream); 4504 4556 } 4505 4557
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