Changeset 89942 in vbox for trunk/src/VBox/ValidationKit/bootsectors

Timestamp:

Jun 29, 2021 8:37:15 AM (4 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

145400

Message:

bs3-cpu-basic-2: Must make sure to cross cachelines in the #AC test. bugref:10052

File:

• trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-x0.c (modified) (6 diffs)

trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-x0.c

@@ -1518 +1518 @@
 
 
-static void bs3CpuBasic2_RaiseXcpt11Worker(uint8_t bMode, uint8_t *pbBuf, bool fAm,
+static void bs3CpuBasic2_RaiseXcpt11Worker(uint8_t bMode, uint8_t *pbBuf, unsigned cbCacheLine, bool fAm,
                                            BS3CPUBASIC2PFTTSTCMNMODE const BS3_FAR *pCmn)
 {
@@ -1573 +1573 @@
             for (iTest = 0; iTest < pCmn->cEntries; iTest++)
             {
+                uint8_t const    fOp    = pCmn->paEntries[iTest].fOp;
                 uint8_t const    cbMem  = pCmn->paEntries[iTest].cbMem;
-                uint8_t const    fOp    = pCmn->paEntries[iTest].fOp;
-                uint8_t          offMem;
+                uint16_t const   cbMax  = cbCacheLine + cbMem;
+                uint16_t         offMem;
                 uint8_t BS3_FAR *poffUd = (uint8_t BS3_FAR *)Bs3SelLnkPtrToCurPtr(pCmn->paEntries[iTest].pfn);
                 Bs3RegCtxSetRipCsFromLnkPtr(&Ctx, pCmn->paEntries[iTest].pfn);
@@ -1603 +1604 @@
                 /*
                  * Buffer misalignment loop.
+                 * Note! We must make sure to cross a cache line here to make sure
+                 *       to cover the split-lock scenario. (The buffer is cache
+                 *       line aligned.)
                  */
-                for (offMem = 0; offMem < cbMem; offMem++)
+                for (offMem = 0; offMem < cbMax; offMem++)
                 {
-                    unsigned offBuf = cbMem * 2 + cbMem;
+                    unsigned offBuf = cbMax + cbMem * 2;
                     while (offBuf-- > 0)
                         pbBuf[offBuf] = 1; /* byte-by-byte to make sure it doesn't trigger AC. */
@@ -1657 +1661 @@
 BS3_DECL_FAR(uint8_t) BS3_CMN_FAR_NM(bs3CpuBasic2_RaiseXcpt11)(uint8_t bMode)
 {
-    uint8_t             abBuf[4096 /** @todo 128 - but that went crazy in real mode; now it's long mode going wrong.  */];
+    unsigned            cbCacheLine = 128; /** @todo detect */
+    uint8_t             abBuf[4096 /** @todo 512 - but that went crazy in real mode; now it's long mode going wrong.  */];
     uint8_t BS3_FAR    *pbBuf;
     unsigned            idxCmnModes;
@@ -1676 +1681 @@
     /* Get us a 64-byte aligned buffer. */
     pbBuf = abBuf;
-    if (BS3_FP_OFF(pbBuf) & 63)
-        pbBuf = &abBuf[64 - BS3_FP_OFF(pbBuf) & 63];
+    if (BS3_FP_OFF(pbBuf) & (cbCacheLine - 1))
+        pbBuf = &abBuf[cbCacheLine - BS3_FP_OFF(pbBuf) & (cbCacheLine - 1)];
     //Bs3TestPrintf("pbBuf=%p\n", pbBuf);
 
@@ -1690 +1695 @@
     BS3_ASSERT(!(fCr0 & X86_CR0_AM));
     Bs3RegSetCr0(fCr0 & ~X86_CR0_AM);
-    bs3CpuBasic2_RaiseXcpt11Worker(bMode, pbBuf, false /*fAm*/, &g_aCmnModes[idxCmnModes]);
+    bs3CpuBasic2_RaiseXcpt11Worker(bMode, pbBuf, cbCacheLine, false /*fAm*/, &g_aCmnModes[idxCmnModes]);
 
 #if 1
     /* The second round is with aligment checks enabled. */
     Bs3RegSetCr0(Bs3RegGetCr0() | X86_CR0_AM);
-    bs3CpuBasic2_RaiseXcpt11Worker(bMode, pbBuf, true /*fAm*/, &g_aCmnModes[idxCmnModes]);
+    bs3CpuBasic2_RaiseXcpt11Worker(bMode, pbBuf, cbCacheLine, true /*fAm*/, &g_aCmnModes[idxCmnModes]);
 #endif