Changeset 9008 in vbox for trunk/src/VBox

Timestamp:

May 21, 2008 10:17:41 AM (17 years ago)

Author:

vboxsync

Message:

Changes for proper flushing of the TLB for physical registration changes.

Location:

trunk/src/VBox/VMM

Files:

• Makefile.kmk (modified) (2 diffs)
• PGMInternal.h (modified) (3 diffs)
• VMMAll/PGMAllHandler.cpp (modified) (5 diffs)
• VMMAll/PGMAllPool.cpp (modified) (2 diffs)
• VMMR0/HWACCMR0.cpp (modified) (1 diff)
• VMMR0/HWSVMR0.cpp (modified) (3 diffs)
• VMMR0/HWSVMR0.h (modified) (1 diff)
• VMMR0/PGMR0.cpp (modified) (1 diff)

trunk/src/VBox/VMM/Makefile.kmk

@@ -102 +102 @@
         VMMAll/CPUMAllRegs.cpp \
         VMMAll/DBGFAll.cpp \
+        VMMAll/HWACCMAll.cpp \
         VMMAll/IOMAll.cpp \
         VMMAll/IOMAllMMIO.cpp \
@@ -390 +391 @@
         VMMAll/EMAll.cpp \
         VMMAll/EMAllA.asm \
+        VMMAll/HWACCMAll.cpp \
         VMMAll/IOMAll.cpp \
         VMMAll/IOMAllMMIO.cpp \

trunk/src/VBox/VMM/PGMInternal.h

@@ -268 +268 @@
 # define PGM_INVL_PG(GCVirt)        ASMInvalidatePage((void *)(GCVirt))
 #elif defined(IN_RING0)
-# define PGM_INVL_PG(GCVirt)        HWACCMR0InvalidatePage(pVM, (RTGCPTR)(GCVirt))
+# define PGM_INVL_PG(GCVirt)        HWACCMInvalidatePage(pVM, (RTGCPTR)(GCVirt))
 #else
-# define PGM_INVL_PG(GCVirt)        ((void)0)
+# define PGM_INVL_PG(GCVirt)        HWACCMInvalidatePage(pVM, (RTGCPTR)(GCVirt))
 #endif
 
@@ -281 +281 @@
 # define PGM_INVL_BIG_PG(GCVirt)    ASMReloadCR3()
 #elif defined(IN_RING0)
-# define PGM_INVL_BIG_PG(GCVirt)    HWACCMR0FlushTLB(pVM)
+# define PGM_INVL_BIG_PG(GCVirt)    HWACCMFlushTLB(pVM)
 #else
-# define PGM_INVL_BIG_PG(GCVirt)    ((void)0)
+# define PGM_INVL_BIG_PG(GCVirt)    HWACCMFlushTLB(pVM)
 #endif
 
@@ -292 +292 @@
 # define PGM_INVL_GUEST_TLBS()      ASMReloadCR3()
 #elif defined(IN_RING0)
-# define PGM_INVL_GUEST_TLBS()      HWACCMR0FlushTLB(pVM)
+# define PGM_INVL_GUEST_TLBS()      HWACCMFlushTLB(pVM)
 #else
-# define PGM_INVL_GUEST_TLBS()      ((void)0)
+# define PGM_INVL_GUEST_TLBS()      HWACCMFlushTLB(pVM)
 #endif
 

trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp

@@ -166 +166 @@
         }
         pVM->pgm.s.fPhysCacheFlushPending = true;
+        HWACCMFlushTLB(pVM);
 #ifndef IN_RING3
         REMNotifyHandlerPhysicalRegister(pVM, enmType, GCPhys, GCPhysLast - GCPhys + 1, !!pfnHandlerR3);
@@ -298 +299 @@
          * Clear the page bits and notify the REM about this change.
          */
+        HWACCMFlushTLB(pVM);
         pgmHandlerPhysicalResetRamFlags(pVM, pCur);
         pgmHandlerPhysicalDeregisterNotifyREM(pVM, pCur);
@@ -540 +542 @@
                                                      pCur->Core.KeyLast - GCPhys + 1, !!pCur->pfnHandlerR3, fRestoreAsRAM);
 #endif
+                    HWACCMFlushTLB(pVM);
                     pgmUnlock(pVM);
                     Log(("PGMHandlerPhysicalModify: GCPhysCurrent=%VGp -> GCPhys=%VGp GCPhysLast=%VGp\n",
@@ -631 +634 @@
 
 /**
- * Splitts a physical access handler in two.
+ * Splits a physical access handler in two.
  *
  * @returns VBox status code.
@@ -813 +816 @@
                 }
                 pVM->pgm.s.fPhysCacheFlushPending = true;
+                HWACCMFlushTLB(pVM);
 
                 rc = VINF_SUCCESS;

trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

@@ -908 +908 @@
 static int pgmPoolCacheFreeOne(PPGMPOOL pPool, uint16_t iUser)
 {
-#ifdef IN_RING0
+#ifndef IN_GC
     const PVM pVM = pPool->CTXSUFF(pVM);
 #endif
@@ -1035 +1035 @@
 static int pgmPoolCacheAlloc(PPGMPOOL pPool, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, uint16_t iUser, uint16_t iUserTable, PPPGMPOOLPAGE ppPage)
 {
-#ifdef IN_RING0
+#ifndef IN_GC
     const PVM pVM = pPool->CTXSUFF(pVM);
 #endif

trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp

@@ -812 +812 @@
         return SVMR0RunGuestCode(pVM, pCtx, &HWACCMR0Globals.aCpuInfo[idCpu]);
     }
-}
-
-/**
- * Invalidates a guest page
- *
- * @returns VBox status code.
- * @param   pVM         The VM to operate on.
- * @param   GCVirt      Page to invalidate
- */
-HWACCMR0DECL(int) HWACCMR0InvalidatePage(PVM pVM, RTGCPTR GCVirt)
-{
-    if (pVM->hwaccm.s.svm.fSupported)
-        return SVMR0InvalidatePage(pVM, GCVirt);
-
-    return VINF_SUCCESS;
-}
-
-/**
- * Flushes the guest TLB
- *
- * @returns VBox status code.
- * @param   pVM         The VM to operate on.
- */
-HWACCMR0DECL(int) HWACCMR0FlushTLB(PVM pVM)
-{
-    if (pVM->hwaccm.s.svm.fSupported)
-        return SVMR0FlushTLB(pVM);
-
-    return VINF_SUCCESS;
 }
 

trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

@@ -266 +266 @@
         pVMCB->ctrl.u16InterceptWrCRx = RT_BIT(0) | RT_BIT(3) | RT_BIT(4) | RT_BIT(8);
     else
-        pVMCB->ctrl.u16InterceptWrCRx = RT_BIT(0) | RT_BIT(4) | RT_BIT(8);
+        pVMCB->ctrl.u16InterceptWrCRx = RT_BIT(0) | RT_BIT(8);
 
     /* Intercept all DRx reads and writes. */
@@ -1414 +1414 @@
             break;
         case 4:
+            Assert(!pVM->hwaccm.s.svm.fNestedPaging);
             pVM->hwaccm.s.fContextUseFlags |= HWACCM_CHANGED_GUEST_CR4;
             break;
@@ -1877 +1878 @@
 }
 
-/**
- * Flushes the guest TLB
- *
- * @returns VBox status code.
- * @param   pVM         The VM to operate on.
- */
-HWACCMR0DECL(int) SVMR0FlushTLB(PVM pVM)
-{
-    Log2(("SVMR0FlushTLB\n"));
-    pVM->hwaccm.s.svm.fForceTLBFlush = true;
-    STAM_COUNTER_INC(&pVM->hwaccm.s.StatFlushTLBManual);
-    return VINF_SUCCESS;
-}

trunk/src/VBox/VMM/VMMR0/HWSVMR0.h

@@ -127 +127 @@
 HWACCMR0DECL(int) SVMR0LoadGuestState(PVM pVM, CPUMCTX *pCtx);
 
-/**
- * Invalidates a guest page
- *
- * @returns VBox status code.
- * @param   pVM         The VM to operate on.
- * @param   GCVirt      Page to invalidate
- */
-HWACCMR0DECL(int) SVMR0InvalidatePage(PVM pVM, RTGCPTR GCVirt);
-
-/**
- * Flushes the guest TLB
- *
- * @returns VBox status code.
- * @param   pVM         The VM to operate on.
- */
-HWACCMR0DECL(int) SVMR0FlushTLB(PVM pVM);
-
 
 /* Convert hidden selector attribute word between VMX and SVM formats. */

trunk/src/VBox/VMM/VMMR0/PGMR0.cpp

@@ -82 +82 @@
 
     /* AMD uses the host's paging mode; Intel's version is on the todo list */
-    Assert(enmShwPagingMode == PGMMODE_32_BIT || enmShwPagingMode == PGMMODE_PAE); // || enmShwPagingMode == PGMMODE_AMD64);
+    Assert(enmShwPagingMode == PGMMODE_32_BIT || enmShwPagingMode == PGMMODE_PAE || enmShwPagingMode == PGMMODE_AMD64);
 
 #ifdef VBOX_WITH_STATISTICS