Changeset 9021 in vbox for trunk/src/VBox/VMM
- Timestamp:
- May 21, 2008 2:38:13 PM (17 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/HWACCM.cpp
r8943 r9021 102 102 103 103 pVM->hwaccm.s.fActive = false; 104 pVM->hwaccm.s.fNestedPaging = false; 104 105 105 106 /* On first entry we'll sync everything. */ -
trunk/src/VBox/VMM/HWACCMInternal.h
r8943 r9021 138 138 /** Set when hardware acceleration is allowed. */ 139 139 bool fAllowed; 140 141 /** Set if nested paging is enabled. */ 142 bool fNestedPaging; 140 143 141 144 /** HWACCM_CHANGED_* flags. */ … … 214 217 /** Set if we need to flush the TLB during the world switch. */ 215 218 bool fForceTLBFlush; 216 /** Set if nested paging is enabled. */217 bool fNestedPaging;218 219 219 220 /* Id of the last cpu we were executing code on (NIL_RTCPUID for the first time) */ -
trunk/src/VBox/VMM/PGM.cpp
r8952 r9021 654 654 655 655 656 #if 1/// @todo ndef RT_ARCH_AMD64657 656 /* 658 657 * Shadow - 32-bit mode … … 730 729 #undef PGM_SHW_NAME_GC_STR 731 730 #undef PGM_SHW_NAME_R0_STR 732 #endif /* !RT_ARCH_AMD64 */733 731 734 732 … … 850 848 #define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB 851 849 #include "PGMGst.h" 850 #include "PGMBth.h" 851 #undef BTH_PGMPOOLKIND_PT_FOR_BIG 852 #undef BTH_PGMPOOLKIND_PT_FOR_PT 853 #undef PGM_BTH_NAME 854 #undef PGM_BTH_NAME_GC_STR 855 #undef PGM_BTH_NAME_R0_STR 856 #undef PGM_GST_TYPE 857 #undef PGM_GST_NAME 858 #undef PGM_GST_NAME_GC_STR 859 #undef PGM_GST_NAME_R0_STR 860 861 #undef PGM_SHW_TYPE 862 #undef PGM_SHW_NAME 863 #undef PGM_SHW_NAME_GC_STR 864 #undef PGM_SHW_NAME_R0_STR 865 866 /* 867 * Shadow - Nested paging mode 868 */ 869 #define PGM_SHW_TYPE PGM_TYPE_NESTED 870 #define PGM_SHW_NAME(name) PGM_SHW_NAME_NESTED(name) 871 #define PGM_SHW_NAME_GC_STR(name) PGM_SHW_NAME_GC_NESTED_STR(name) 872 #define PGM_SHW_NAME_R0_STR(name) PGM_SHW_NAME_R0_NESTED_STR(name) 873 #include "PGMShw.h" 874 875 /* Guest - real mode */ 876 #define PGM_GST_TYPE PGM_TYPE_REAL 877 #define PGM_GST_NAME(name) PGM_GST_NAME_REAL(name) 878 #define PGM_GST_NAME_GC_STR(name) PGM_GST_NAME_GC_REAL_STR(name) 879 #define PGM_GST_NAME_R0_STR(name) PGM_GST_NAME_R0_REAL_STR(name) 880 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_REAL(name) 881 #define PGM_BTH_NAME_GC_STR(name) PGM_BTH_NAME_GC_NESTED_REAL_STR(name) 882 #define PGM_BTH_NAME_R0_STR(name) PGM_BTH_NAME_R0_NESTED_REAL_STR(name) 883 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PHYS 884 #include "PGMBth.h" 885 #undef BTH_PGMPOOLKIND_PT_FOR_PT 886 #undef PGM_BTH_NAME 887 #undef PGM_BTH_NAME_GC_STR 888 #undef PGM_BTH_NAME_R0_STR 889 #undef PGM_GST_TYPE 890 #undef PGM_GST_NAME 891 #undef PGM_GST_NAME_GC_STR 892 #undef PGM_GST_NAME_R0_STR 893 894 /* Guest - protected mode */ 895 #define PGM_GST_TYPE PGM_TYPE_PROT 896 #define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name) 897 #define PGM_GST_NAME_GC_STR(name) PGM_GST_NAME_GC_PROT_STR(name) 898 #define PGM_GST_NAME_R0_STR(name) PGM_GST_NAME_R0_PROT_STR(name) 899 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_PROT(name) 900 #define PGM_BTH_NAME_GC_STR(name) PGM_BTH_NAME_GC_NESTED_PROT_STR(name) 901 #define PGM_BTH_NAME_R0_STR(name) PGM_BTH_NAME_R0_NESTED_PROT_STR(name) 902 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PHYS 903 #include "PGMBth.h" 904 #undef BTH_PGMPOOLKIND_PT_FOR_PT 905 #undef PGM_BTH_NAME 906 #undef PGM_BTH_NAME_GC_STR 907 #undef PGM_BTH_NAME_R0_STR 908 #undef PGM_GST_TYPE 909 #undef PGM_GST_NAME 910 #undef PGM_GST_NAME_GC_STR 911 #undef PGM_GST_NAME_R0_STR 912 913 /* Guest - 32-bit mode */ 914 #define PGM_GST_TYPE PGM_TYPE_32BIT 915 #define PGM_GST_NAME(name) PGM_GST_NAME_32BIT(name) 916 #define PGM_GST_NAME_GC_STR(name) PGM_GST_NAME_GC_32BIT_STR(name) 917 #define PGM_GST_NAME_R0_STR(name) PGM_GST_NAME_R0_32BIT_STR(name) 918 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_32BIT(name) 919 #define PGM_BTH_NAME_GC_STR(name) PGM_BTH_NAME_GC_NESTED_32BIT_STR(name) 920 #define PGM_BTH_NAME_R0_STR(name) PGM_BTH_NAME_R0_NESTED_32BIT_STR(name) 921 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_32BIT_PT 922 #define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB 923 #include "PGMBth.h" 924 #undef BTH_PGMPOOLKIND_PT_FOR_BIG 925 #undef BTH_PGMPOOLKIND_PT_FOR_PT 926 #undef PGM_BTH_NAME 927 #undef PGM_BTH_NAME_GC_STR 928 #undef PGM_BTH_NAME_R0_STR 929 #undef PGM_GST_TYPE 930 #undef PGM_GST_NAME 931 #undef PGM_GST_NAME_GC_STR 932 #undef PGM_GST_NAME_R0_STR 933 934 /* Guest - PAE mode */ 935 #define PGM_GST_TYPE PGM_TYPE_PAE 936 #define PGM_GST_NAME(name) PGM_GST_NAME_PAE(name) 937 #define PGM_GST_NAME_GC_STR(name) PGM_GST_NAME_GC_PAE_STR(name) 938 #define PGM_GST_NAME_R0_STR(name) PGM_GST_NAME_R0_PAE_STR(name) 939 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_PAE(name) 940 #define PGM_BTH_NAME_GC_STR(name) PGM_BTH_NAME_GC_NESTED_PAE_STR(name) 941 #define PGM_BTH_NAME_R0_STR(name) PGM_BTH_NAME_R0_NESTED_PAE_STR(name) 942 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PAE_PT 943 #define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB 944 #include "PGMBth.h" 945 #undef BTH_PGMPOOLKIND_PT_FOR_BIG 946 #undef BTH_PGMPOOLKIND_PT_FOR_PT 947 #undef PGM_BTH_NAME 948 #undef PGM_BTH_NAME_GC_STR 949 #undef PGM_BTH_NAME_R0_STR 950 #undef PGM_GST_TYPE 951 #undef PGM_GST_NAME 952 #undef PGM_GST_NAME_GC_STR 953 #undef PGM_GST_NAME_R0_STR 954 955 /* Guest - AMD64 mode */ 956 #define PGM_GST_TYPE PGM_TYPE_AMD64 957 #define PGM_GST_NAME(name) PGM_GST_NAME_AMD64(name) 958 #define PGM_GST_NAME_GC_STR(name) PGM_GST_NAME_GC_AMD64_STR(name) 959 #define PGM_GST_NAME_R0_STR(name) PGM_GST_NAME_R0_AMD64_STR(name) 960 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_AMD64(name) 961 #define PGM_BTH_NAME_GC_STR(name) PGM_BTH_NAME_GC_NESTED_AMD64_STR(name) 962 #define PGM_BTH_NAME_R0_STR(name) PGM_BTH_NAME_R0_NESTED_AMD64_STR(name) 963 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PAE_PT 964 #define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB 852 965 #include "PGMBth.h" 853 966 #undef BTH_PGMPOOLKIND_PT_FOR_BIG … … 2336 2449 case PGMMODE_AMD64: 2337 2450 case PGMMODE_AMD64_NX: return PGM_TYPE_AMD64; 2451 case PGMMODE_NESTED: return PGM_TYPE_NESTED; 2338 2452 default: 2339 2453 AssertFatalMsgFailed(("pgmMode=%d\n", pgmMode)); … … 2351 2465 DECLINLINE(unsigned) pgmModeDataIndex(unsigned uShwType, unsigned uGstType) 2352 2466 { 2353 Assert(uShwType >= PGM_TYPE_32BIT && uShwType <= PGM_TYPE_ AMD64);2467 Assert(uShwType >= PGM_TYPE_32BIT && uShwType <= PGM_TYPE_NESTED); 2354 2468 Assert(uGstType >= PGM_TYPE_REAL && uGstType <= PGM_TYPE_AMD64); 2355 return (uShwType - PGM_TYPE_32BIT) * (PGM_TYPE_AMD64 - PGM_TYPE_ 32BIT+ 1)2469 return (uShwType - PGM_TYPE_32BIT) * (PGM_TYPE_AMD64 - PGM_TYPE_REAL + 1) 2356 2470 + (uGstType - PGM_TYPE_REAL); 2357 2471 } … … 2375 2489 /** 2376 2490 * Calculates the max data index. 2377 * @returns The number of entries in the pag aing data array.2491 * @returns The number of entries in the paging data array. 2378 2492 */ 2379 2493 DECLINLINE(unsigned) pgmModeDataMaxIndex(void) 2380 2494 { 2381 return pgmModeDataIndex(PGM_TYPE_ AMD64, PGM_TYPE_AMD64) + 1;2495 return pgmModeDataIndex(PGM_TYPE_NESTED, PGM_TYPE_AMD64) + 1; 2382 2496 } 2383 2497 … … 2460 2574 pModeData->uShwType = PGM_TYPE_AMD64; 2461 2575 pModeData->uGstType = PGM_TYPE_AMD64; 2462 rc = PGM_SHW_NAME_AMD64(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2463 rc = PGM_GST_NAME_AMD64(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2576 rc = PGM_SHW_NAME_AMD64(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2577 rc = PGM_GST_NAME_AMD64(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2578 rc = PGM_BTH_NAME_AMD64_AMD64(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2579 2580 pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED, PGM_TYPE_REAL)]; 2581 pModeData->uShwType = PGM_TYPE_NESTED; 2582 pModeData->uGstType = PGM_TYPE_REAL; 2583 rc = PGM_SHW_NAME_NESTED(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2584 rc = PGM_GST_NAME_REAL(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2585 rc = PGM_BTH_NAME_NESTED_REAL(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2586 2587 pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED, PGMMODE_PROTECTED)]; 2588 pModeData->uShwType = PGM_TYPE_NESTED; 2589 pModeData->uGstType = PGM_TYPE_PROT; 2590 rc = PGM_SHW_NAME_NESTED(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2591 rc = PGM_GST_NAME_PROT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2592 rc = PGM_BTH_NAME_NESTED_PROT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2593 2594 pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED, PGM_TYPE_32BIT)]; 2595 pModeData->uShwType = PGM_TYPE_NESTED; 2596 pModeData->uGstType = PGM_TYPE_32BIT; 2597 rc = PGM_SHW_NAME_NESTED(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2598 rc = PGM_GST_NAME_32BIT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2599 rc = PGM_BTH_NAME_NESTED_32BIT(InitData)(pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2600 2601 pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED, PGM_TYPE_PAE)]; 2602 pModeData->uShwType = PGM_TYPE_NESTED; 2603 pModeData->uGstType = PGM_TYPE_PAE; 2604 rc = PGM_SHW_NAME_NESTED(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2605 rc = PGM_GST_NAME_PAE(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2606 rc = PGM_BTH_NAME_NESTED_PAE(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2607 2608 pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED, PGM_TYPE_AMD64)]; 2609 pModeData->uShwType = PGM_TYPE_NESTED; 2610 pModeData->uGstType = PGM_TYPE_AMD64; 2611 rc = PGM_SHW_NAME_NESTED(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2612 rc = PGM_GST_NAME_AMD64(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2613 rc = PGM_BTH_NAME_NESTED_AMD64(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2464 2614 2465 2615 return VINF_SUCCESS; -
trunk/src/VBox/VMM/PGMInternal.h
r9008 r9021 191 191 #define PGM_TYPE_PAE 4 192 192 #define PGM_TYPE_AMD64 5 193 #define PGM_TYPE_NESTED 6 193 194 /** @} */ 194 195 … … 197 198 * @remark ASSUMES certain order of the PGM_TYPE_* values. 198 199 */ 199 #define PGM_WITH_PAGING(uType) ((uType) >= PGM_TYPE_32BIT )200 #define PGM_WITH_PAGING(uType) ((uType) >= PGM_TYPE_32BIT && (uType) != PGM_TYPE_NESTED) 200 201 201 202 /** Macro for checking if the guest supports the NX bit. … … 203 204 * @remark ASSUMES certain order of the PGM_TYPE_* values. 204 205 */ 205 #define PGM_WITH_NX(uType) ((uType) >= PGM_TYPE_PAE )206 #define PGM_WITH_NX(uType) ((uType) >= PGM_TYPE_PAE && (uType) != PGM_TYPE_NESTED) 206 207 207 208 … … 1710 1711 #define PGM_SHW_NAME_GC_AMD64_STR(name) "pgmGCShwAMD64" #name 1711 1712 #define PGM_SHW_NAME_R0_AMD64_STR(name) "pgmR0ShwAMD64" #name 1713 #define PGM_SHW_NAME_NESTED(name) PGM_CTX(pgm,ShwNested##name) 1714 #define PGM_SHW_NAME_GC_NESTED_STR(name) "pgmGCShwNested" #name 1715 #define PGM_SHW_NAME_R0_NESTED_STR(name) "pgmR0ShwNested" #name 1712 1716 #define PGM_SHW_DECL(type, name) PGM_CTX_DECL(type) PGM_SHW_NAME(name) 1713 1717 #define PGM_SHW_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Shw##name)) … … 1723 1727 #define PGM_BTH_NAME_AMD64_PROT(name) PGM_CTX(pgm,BthAMD64Prot##name) 1724 1728 #define PGM_BTH_NAME_AMD64_AMD64(name) PGM_CTX(pgm,BthAMD64AMD64##name) 1729 #define PGM_BTH_NAME_NESTED_REAL(name) PGM_CTX(pgm,BthNestedReal##name) 1730 #define PGM_BTH_NAME_NESTED_PROT(name) PGM_CTX(pgm,BthNestedProt##name) 1731 #define PGM_BTH_NAME_NESTED_32BIT(name) PGM_CTX(pgm,BthNested32Bit##name) 1732 #define PGM_BTH_NAME_NESTED_PAE(name) PGM_CTX(pgm,BthNestedPAE##name) 1733 #define PGM_BTH_NAME_NESTED_AMD64(name) PGM_CTX(pgm,BthNestedAMD64##name) 1734 1725 1735 #define PGM_BTH_NAME_GC_32BIT_REAL_STR(name) "pgmGCBth32BitReal" #name 1726 1736 #define PGM_BTH_NAME_GC_32BIT_PROT_STR(name) "pgmGCBth32BitProt" #name … … 1731 1741 #define PGM_BTH_NAME_GC_PAE_PAE_STR(name) "pgmGCBthPAEPAE" #name 1732 1742 #define PGM_BTH_NAME_GC_AMD64_AMD64_STR(name) "pgmGCBthAMD64AMD64" #name 1743 #define PGM_BTH_NAME_GC_NESTED_REAL_STR(name) "pgmGCBthNestedReal" #name 1744 #define PGM_BTH_NAME_GC_NESTED_PROT_STR(name) "pgmGCBthNestedProt" #name 1745 #define PGM_BTH_NAME_GC_NESTED_32BIT_STR(name) "pgmGCBthNested32Bit" #name 1746 #define PGM_BTH_NAME_GC_NESTED_PAE_STR(name) "pgmGCBthNestedPAE" #name 1747 #define PGM_BTH_NAME_GC_NESTED_AMD64_STR(name) "pgmGCBthNestedAMD64" #name 1733 1748 #define PGM_BTH_NAME_R0_32BIT_REAL_STR(name) "pgmR0Bth32BitReal" #name 1734 1749 #define PGM_BTH_NAME_R0_32BIT_PROT_STR(name) "pgmR0Bth32BitProt" #name … … 1740 1755 #define PGM_BTH_NAME_R0_AMD64_PROT_STR(name) "pgmR0BthAMD64Prot" #name 1741 1756 #define PGM_BTH_NAME_R0_AMD64_AMD64_STR(name) "pgmR0BthAMD64AMD64" #name 1757 #define PGM_BTH_NAME_R0_NESTED_REAL_STR(name) "pgmR0BthNestedReal" #name 1758 #define PGM_BTH_NAME_R0_NESTED_PROT_STR(name) "pgmR0BthNestedProt" #name 1759 #define PGM_BTH_NAME_R0_NESTED_32BIT_STR(name) "pgmR0BthNested32Bit" #name 1760 #define PGM_BTH_NAME_R0_NESTED_PAE_STR(name) "pgmR0BthNestedPAE" #name 1761 #define PGM_BTH_NAME_R0_NESTED_AMD64_STR(name) "pgmR0BthNestedAMD64" #name 1762 1742 1763 #define PGM_BTH_DECL(type, name) PGM_CTX_DECL(type) PGM_BTH_NAME(name) 1743 1764 #define PGM_BTH_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Bth##name)) -
trunk/src/VBox/VMM/VMMAll/PGMAll.cpp
r9001 r9021 215 215 #undef PGM_SHW_TYPE 216 216 #undef PGM_SHW_NAME 217 218 /* 219 * Shadow - Nested paging mode 220 */ 221 #define PGM_SHW_TYPE PGM_TYPE_NESTED 222 #define PGM_SHW_NAME(name) PGM_SHW_NAME_NESTED(name) 223 #include "PGMAllShw.h" 224 225 /* Guest - real mode */ 226 #define PGM_GST_TYPE PGM_TYPE_REAL 227 #define PGM_GST_NAME(name) PGM_GST_NAME_REAL(name) 228 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_REAL(name) 229 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PHYS 230 #include "PGMAllBth.h" 231 #undef BTH_PGMPOOLKIND_PT_FOR_PT 232 #undef PGM_BTH_NAME 233 #undef PGM_GST_TYPE 234 #undef PGM_GST_NAME 235 236 /* Guest - protected mode */ 237 #define PGM_GST_TYPE PGM_TYPE_PROT 238 #define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name) 239 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_PROT(name) 240 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PHYS 241 #include "PGMAllBth.h" 242 #undef BTH_PGMPOOLKIND_PT_FOR_PT 243 #undef PGM_BTH_NAME 244 #undef PGM_GST_TYPE 245 #undef PGM_GST_NAME 246 247 /* Guest - 32-bit mode */ 248 #define PGM_GST_TYPE PGM_TYPE_32BIT 249 #define PGM_GST_NAME(name) PGM_GST_NAME_32BIT(name) 250 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_32BIT(name) 251 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_32BIT_PT 252 #define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB 253 #include "PGMAllBth.h" 254 #undef BTH_PGMPOOLKIND_PT_FOR_BIG 255 #undef BTH_PGMPOOLKIND_PT_FOR_PT 256 #undef PGM_BTH_NAME 257 #undef PGM_GST_TYPE 258 #undef PGM_GST_NAME 259 260 /* Guest - PAE mode */ 261 #define PGM_GST_TYPE PGM_TYPE_PAE 262 #define PGM_GST_NAME(name) PGM_GST_NAME_PAE(name) 263 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_PAE(name) 264 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PAE_PT 265 #define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB 266 #include "PGMAllBth.h" 267 #undef BTH_PGMPOOLKIND_PT_FOR_BIG 268 #undef BTH_PGMPOOLKIND_PT_FOR_PT 269 #undef PGM_BTH_NAME 270 #undef PGM_GST_TYPE 271 #undef PGM_GST_NAME 272 273 /* Guest - AMD64 mode */ 274 #define PGM_GST_TYPE PGM_TYPE_AMD64 275 #define PGM_GST_NAME(name) PGM_GST_NAME_AMD64(name) 276 #define PGM_BTH_NAME(name) PGM_BTH_NAME_NESTED_AMD64(name) 277 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PAE_PT 278 #define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB 279 #include "PGMAllBth.h" 280 #undef BTH_PGMPOOLKIND_PT_FOR_BIG 281 #undef BTH_PGMPOOLKIND_PT_FOR_PT 282 #undef PGM_BTH_NAME 283 #undef PGM_GST_TYPE 284 #undef PGM_GST_NAME 285 286 #undef PGM_SHW_TYPE 287 #undef PGM_SHW_NAME 288 217 289 #endif 218 290 … … 433 505 } 434 506 435 /* 436 * Next step is to verify if we protected this page for dirty bit tracking or for CSAM scanning 437 */ 438 rc = PGMShwGetPage(pVM, (RTGCPTR)Addr, NULL, NULL); 439 if ( rc == VERR_PAGE_NOT_PRESENT 440 || rc == VERR_PAGE_TABLE_NOT_PRESENT) 507 if (!HWACCMIsNestedPagingActive(pVM)) 441 508 { 442 509 /* 443 * Page is not present in our page tables. 444 * Try to sync it! 445 */ 446 Assert(X86_TRAP_PF_RW == X86_PTE_RW && X86_TRAP_PF_US == X86_PTE_US); 447 uint32_t uErr = fAccess & (X86_TRAP_PF_RW | X86_TRAP_PF_US); 448 rc = PGM_BTH_PFN(VerifyAccessSyncPage, pVM)(pVM, Addr, fPageGst, uErr); 449 if (rc != VINF_SUCCESS) 450 return rc; 451 } 452 else 453 AssertMsg(rc == VINF_SUCCESS, ("PGMShwGetPage %VGv failed with %Vrc\n", Addr, rc)); 510 * Next step is to verify if we protected this page for dirty bit tracking or for CSAM scanning 511 */ 512 rc = PGMShwGetPage(pVM, (RTGCPTR)Addr, NULL, NULL); 513 if ( rc == VERR_PAGE_NOT_PRESENT 514 || rc == VERR_PAGE_TABLE_NOT_PRESENT) 515 { 516 /* 517 * Page is not present in our page tables. 518 * Try to sync it! 519 */ 520 Assert(X86_TRAP_PF_RW == X86_PTE_RW && X86_TRAP_PF_US == X86_PTE_US); 521 uint32_t uErr = fAccess & (X86_TRAP_PF_RW | X86_TRAP_PF_US); 522 rc = PGM_BTH_PFN(VerifyAccessSyncPage, pVM)(pVM, Addr, fPageGst, uErr); 523 if (rc != VINF_SUCCESS) 524 return rc; 525 } 526 else 527 AssertMsg(rc == VINF_SUCCESS, ("PGMShwGetPage %VGv failed with %Vrc\n", Addr, rc)); 528 } 454 529 455 530 #if 0 /* def VBOX_STRICT; triggers too often now */ … … 667 742 int rc; 668 743 744 Assert(!HWACCMIsNestedPagingActive(pVM)); 745 669 746 pPml4e = &pPGM->pHCPaePML4->a[iPml4e]; 670 747 if ( !pPml4e->n.u1Present … … 1351 1428 STAM_PROFILE_STOP(&pVM->pgm.s.CTXMID(Stat,SyncCR3), a); 1352 1429 return cErrors; 1430 return 0; 1353 1431 } 1354 1432 -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r9001 r9021 44 44 45 45 /* Filter out some illegal combinations of guest and shadow paging, so we can remove redundant checks inside functions. */ 46 #if PGM_GST_TYPE == PGM_TYPE_PAE && PGM_SHW_TYPE != PGM_TYPE_PAE 46 #if PGM_GST_TYPE == PGM_TYPE_PAE && PGM_SHW_TYPE != PGM_TYPE_PAE && PGM_SHW_TYPE != PGM_TYPE_NESTED 47 47 # error "Invalid combination; PAE guest implies PAE shadow" 48 48 #endif 49 49 50 50 #if (PGM_GST_TYPE == PGM_TYPE_REAL || PGM_GST_TYPE == PGM_TYPE_PROT) \ 51 && !(PGM_SHW_TYPE == PGM_TYPE_32BIT || PGM_SHW_TYPE == PGM_TYPE_PAE || PGM_SHW_TYPE == PGM_TYPE_AMD64 )51 && !(PGM_SHW_TYPE == PGM_TYPE_32BIT || PGM_SHW_TYPE == PGM_TYPE_PAE || PGM_SHW_TYPE == PGM_TYPE_AMD64 || PGM_SHW_TYPE == PGM_TYPE_NESTED) 52 52 # error "Invalid combination; real or protected mode without paging implies 32 bits or PAE shadow paging." 53 53 #endif 54 54 55 55 #if (PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE) \ 56 && !(PGM_SHW_TYPE == PGM_TYPE_32BIT || PGM_SHW_TYPE == PGM_TYPE_PAE )56 && !(PGM_SHW_TYPE == PGM_TYPE_32BIT || PGM_SHW_TYPE == PGM_TYPE_PAE || PGM_SHW_TYPE == PGM_TYPE_NESTED) 57 57 # error "Invalid combination; 32 bits guest paging or PAE implies 32 bits or PAE shadow paging." 58 58 #endif 59 59 60 #if (PGM_GST_TYPE == PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_AMD64 )61 || (PGM_SHW_TYPE == PGM_TYPE_AMD64 && PGM_GST_TYPE != PGM_TYPE_AMD64 )60 #if (PGM_GST_TYPE == PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_NESTED) \ 61 || (PGM_SHW_TYPE == PGM_TYPE_AMD64 && PGM_GST_TYPE != PGM_TYPE_AMD64 && PGM_GST_TYPE != PGM_TYPE_PROT) 62 62 # error "Invalid combination; AMD64 guest implies AMD64 shadow and vice versa" 63 63 #endif … … 78 78 PGM_BTH_DECL(int, Trap0eHandler)(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault) 79 79 { 80 #if PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_REAL || PGM_GST_TYPE == PGM_TYPE_PROT || PGM_GST_TYPE == PGM_TYPE_PAE || PGM_GST_TYPE == PGM_TYPE_AMD64 80 #if (PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_REAL || PGM_GST_TYPE == PGM_TYPE_PROT || PGM_GST_TYPE == PGM_TYPE_PAE || PGM_GST_TYPE == PGM_TYPE_AMD64) \ 81 && PGM_SHW_TYPE != PGM_TYPE_NESTED 81 82 82 83 # if PGM_SHW_TYPE == PGM_TYPE_PAE && PGM_GST_TYPE != PGM_TYPE_PAE … … 846 847 PGM_BTH_DECL(int, InvalidatePage)(PVM pVM, RTGCUINTPTR GCPtrPage) 847 848 { 848 #if PGM_GST_TYPE == PGM_TYPE_32BIT \ 849 || PGM_GST_TYPE == PGM_TYPE_PAE \ 850 || PGM_GST_TYPE == PGM_TYPE_AMD64 849 #if PGM_WITH_PAGING(PGM_GST_TYPE) \ 850 && PGM_SHW_TYPE != PGM_TYPE_NESTED 851 851 int rc; 852 852 … … 1418 1418 LogFlow(("SyncPage: GCPtrPage=%VGv cPages=%d uErr=%#x\n", GCPtrPage, cPages, uErr)); 1419 1419 1420 #if PGM_GST_TYPE == PGM_TYPE_32BIT \ 1421 || PGM_GST_TYPE == PGM_TYPE_PAE 1420 #if (PGM_GST_TYPE == PGM_TYPE_32BIT \ 1421 || PGM_GST_TYPE == PGM_TYPE_PAE) \ 1422 && PGM_SHW_TYPE != PGM_TYPE_NESTED 1422 1423 1423 1424 # if PGM_WITH_NX(PGM_GST_TYPE) … … 1660 1661 return VINF_PGM_SYNCPAGE_MODIFIED_PDE; 1661 1662 1662 #elif PGM_GST_TYPE == PGM_TYPE_REAL || PGM_GST_TYPE == PGM_TYPE_PROT 1663 #elif (PGM_GST_TYPE == PGM_TYPE_REAL || PGM_GST_TYPE == PGM_TYPE_PROT) \ 1664 && PGM_SHW_TYPE != PGM_TYPE_NESTED 1663 1665 1664 1666 # ifdef PGM_SYNC_N_PAGES … … 2091 2093 LogFlow(("SyncPT: GCPtrPage=%VGv\n", GCPtrPage)); 2092 2094 2093 #if PGM_GST_TYPE == PGM_TYPE_32BIT \ 2094 || PGM_GST_TYPE == PGM_TYPE_PAE 2095 #if ( PGM_GST_TYPE == PGM_TYPE_32BIT \ 2096 || PGM_GST_TYPE == PGM_TYPE_PAE) \ 2097 && PGM_SHW_TYPE != PGM_TYPE_NESTED 2095 2098 2096 2099 /* … … 2444 2447 return rc; 2445 2448 2446 #elif PGM_GST_TYPE == PGM_TYPE_REAL || PGM_GST_TYPE == PGM_TYPE_PROT 2449 #elif (PGM_GST_TYPE == PGM_TYPE_REAL || PGM_GST_TYPE == PGM_TYPE_PROT) \ 2450 && PGM_SHW_TYPE != PGM_TYPE_NESTED 2447 2451 2448 2452 int rc = VINF_SUCCESS; … … 2519 2523 PGM_BTH_DECL(int, PrefetchPage)(PVM pVM, RTGCUINTPTR GCPtrPage) 2520 2524 { 2521 #if (PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_REAL || PGM_GST_TYPE == PGM_TYPE_PROT || PGM_GST_TYPE == PGM_TYPE_PAE) && PGM_SHW_TYPE != PGM_TYPE_AMD64 2525 Assert(!HWACCMIsNestedPagingActive(pVM)); 2526 #if (PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_REAL || PGM_GST_TYPE == PGM_TYPE_PROT || PGM_GST_TYPE == PGM_TYPE_PAE) \ 2527 && PGM_SHW_TYPE != PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_NESTED 2522 2528 /* 2523 2529 * Check that all Guest levels thru the PDE are present, getting the … … 2596 2602 LogFlow(("VerifyAccessSyncPage: GCPtrPage=%VGv fPage=%#x uErr=%#x\n", GCPtrPage, fPage, uErr)); 2597 2603 2598 #if (PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_REAL || PGM_GST_TYPE == PGM_TYPE_PROT || PGM_GST_TYPE == PGM_TYPE_PAE) && PGM_SHW_TYPE != PGM_TYPE_AMD64 2604 Assert(!HWACCMIsNestedPagingActive(pVM)); 2605 #if (PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_REAL || PGM_GST_TYPE == PGM_TYPE_PROT || PGM_GST_TYPE == PGM_TYPE_PAE) \ 2606 && PGM_SHW_TYPE != PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_NESTED 2599 2607 2600 2608 # ifndef IN_RING0 … … 2751 2759 PGM_BTH_DECL(int, SyncCR3)(PVM pVM, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal) 2752 2760 { 2761 #if PGM_SHW_TYPE == PGM_TYPE_NESTED 2762 /* @todo check if this is really necessary */ 2763 HWACCMFlushTLB(pVM); 2764 return VINF_SUCCESS; 2765 #else 2753 2766 if (VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3)) 2754 2767 fGlobal = true; /* Change this CR3 reload to be a global one. */ … … 3111 3124 return VINF_SUCCESS; 3112 3125 3113 # elif PGM_GST_TYPE == PGM_TYPE_AMD643126 # elif PGM_GST_TYPE == PGM_TYPE_AMD64 3114 3127 //# error not implemented 3115 3128 return VERR_INTERNAL_ERROR; 3116 # else /* guest real and protected mode */3129 # else /* guest real and protected mode */ 3117 3130 return VINF_SUCCESS; 3118 #endif 3131 # endif 3132 #endif /* PGM_SHW_TYPE != PGM_TYPE_NESTED */ 3119 3133 } 3120 3134 … … 3159 3173 PGM_BTH_DECL(unsigned, AssertCR3)(PVM pVM, uint64_t cr3, uint64_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb) 3160 3174 { 3175 #if PGM_SHW_TYPE == PGM_TYPE_NESTED 3176 return 0; 3177 #else 3161 3178 unsigned cErrors = 0; 3162 3179 … … 3768 3785 #endif 3769 3786 return cErrors; 3787 3788 #endif /* PGM_SHW_TYPE != PGM_TYPE_NESTED */ 3770 3789 } 3771 3790 #endif /* VBOX_STRICT */ -
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r9008 r9021 255 255 /* Note: CR8 reads will refer to V_TPR, so no need to catch them. */ 256 256 /** @note CR0 & CR4 can be safely read when guest and shadow copies are identical. */ 257 if (!pVM->hwaccm.s. svm.fNestedPaging)257 if (!pVM->hwaccm.s.fNestedPaging) 258 258 pVMCB->ctrl.u16InterceptRdCRx = RT_BIT(0) | RT_BIT(3) | RT_BIT(4); 259 259 else … … 263 263 * CR0/3/4 writes must be intercepted for obvious reasons. 264 264 */ 265 if (!pVM->hwaccm.s. svm.fNestedPaging)265 if (!pVM->hwaccm.s.fNestedPaging) 266 266 pVMCB->ctrl.u16InterceptWrCRx = RT_BIT(0) | RT_BIT(3) | RT_BIT(4) | RT_BIT(8); 267 267 else … … 277 277 278 278 pVMCB->ctrl.u32InterceptException = HWACCM_SVM_TRAP_MASK; 279 if (pVM->hwaccm.s. svm.fNestedPaging)279 if (pVM->hwaccm.s.fNestedPaging) 280 280 pVMCB->ctrl.u32InterceptException &= ~RT_BIT(14); /* no longer need to intercept #PF. */ 281 281 … … 298 298 ; 299 299 /* With nested paging we don't care about invlpg anymore. */ 300 if (pVM->hwaccm.s. svm.fNestedPaging)300 if (pVM->hwaccm.s.fNestedPaging) 301 301 pVMCB->ctrl.u32InterceptCtrl1 &= ~SVM_CTRL1_INTERCEPT_INVLPG; 302 302 … … 595 595 /* Note: WP is not relevant in nested paging mode as we catch accesses on the (host) physical level. */ 596 596 /* Note: In nested paging mode the guest is allowed to run with paging disabled; the guest physical to host physical translation will remain active. */ 597 if (!pVM->hwaccm.s. svm.fNestedPaging)597 if (!pVM->hwaccm.s.fNestedPaging) 598 598 { 599 599 val |= X86_CR0_PG; /* Paging is always enabled; even when the guest is running in real mode or PE without paging. */ … … 608 608 { 609 609 /* Save our shadow CR3 register. */ 610 if (pVM->hwaccm.s. svm.fNestedPaging)610 if (pVM->hwaccm.s.fNestedPaging) 611 611 { 612 612 pVMCB->ctrl.u64NestedPagingCR3 = PGMGetHyperCR3(pVM); … … 620 620 { 621 621 val = pCtx->cr4; 622 if (!pVM->hwaccm.s. svm.fNestedPaging)622 if (!pVM->hwaccm.s.fNestedPaging) 623 623 { 624 624 switch(pVM->hwaccm.s.enmShadowMode) … … 729 729 STAM_PROFILE_ADV_START(&pVM->hwaccm.s.StatEntry, x); 730 730 731 Assert(!pVM->hwaccm.s. svm.fNestedPaging);731 Assert(!pVM->hwaccm.s.fNestedPaging); 732 732 AssertReturn(pCpu->fSVMConfigured, VERR_EM_INTERNAL_ERROR); 733 733 … … 814 814 815 815 /* Enable nested paging if necessary (disabled each time after #VMEXIT). */ 816 pVMCB->ctrl.NestedPaging.n.u1NestedPaging = pVM->hwaccm.s. svm.fNestedPaging;816 pVMCB->ctrl.NestedPaging.n.u1NestedPaging = pVM->hwaccm.s.fNestedPaging; 817 817 818 818 /* Force a TLB flush for the first world switch if the current cpu differs from the one we ran on last. */ … … 1039 1039 /* Note: no reason to sync back the CRx and DRx registers. They can't be changed by the guest. */ 1040 1040 /* Note: only in the nested paging case can CR3 & CR4 be changed by the guest. */ 1041 if (pVM->hwaccm.s. svm.fNestedPaging)1041 if (pVM->hwaccm.s.fNestedPaging) 1042 1042 { 1043 1043 CPUMSetGuestCR3(pVM, pVMCB->guest.u64CR3); … … 1145 1145 RTGCUINTPTR uFaultAddress = pVMCB->ctrl.u64ExitInfo2; /* EXITINFO2 = fault address */ 1146 1146 1147 Assert(!pVM->hwaccm.s. svm.fNestedPaging);1147 Assert(!pVM->hwaccm.s.fNestedPaging); 1148 1148 1149 1149 Log2(("Page fault at %VGv cr2=%VGv error code %x\n", pCtx->eip, uFaultAddress, errCode)); … … 1283 1283 RTGCPHYS uFaultAddress = pVMCB->ctrl.u64ExitInfo2; /* EXITINFO2 = fault address */ 1284 1284 1285 Assert(pVM->hwaccm.s. svm.fNestedPaging);1285 Assert(pVM->hwaccm.s.fNestedPaging); 1286 1286 1287 1287 Log2(("Page fault at %VGp cr2=%VGv error code %x\n", pCtx->eip, uFaultAddress, errCode)); … … 1379 1379 STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitInvpg); 1380 1380 1381 Assert(!pVM->hwaccm.s. svm.fNestedPaging);1381 Assert(!pVM->hwaccm.s.fNestedPaging); 1382 1382 1383 1383 /* Truly a pita. Why can't SVM give the same information as VMX? */ … … 1410 1410 break; 1411 1411 case 3: 1412 Assert(!pVM->hwaccm.s. svm.fNestedPaging);1412 Assert(!pVM->hwaccm.s.fNestedPaging); 1413 1413 pVM->hwaccm.s.fContextUseFlags |= HWACCM_CHANGED_GUEST_CR3; 1414 1414 break; 1415 1415 case 4: 1416 Assert(!pVM->hwaccm.s. svm.fNestedPaging);1416 Assert(!pVM->hwaccm.s.fNestedPaging); 1417 1417 pVM->hwaccm.s.fContextUseFlags |= HWACCM_CHANGED_GUEST_CR4; 1418 1418 break;
Note:
See TracChangeset
for help on using the changeset viewer.