Changeset 90307 in vbox

Timestamp:

Jul 23, 2021 1:56:30 PM (4 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

145863

Message:

DevIoApic: IRQ tagging fixes. Todo for EIO. bugref:10073 oem2tickeref:43

File:

• trunk/src/VBox/Devices/PC/DevIoApic.cpp (modified) (7 diffs)

trunk/src/VBox/Devices/PC/DevIoApic.cpp

@@ -861 +861 @@
     {
         uint64_t const u64Rte = pThis->au64RedirTable[idxRte];
+/** @todo r=bird: bugref:10073: Ignore edge triggered entries here since
+ * the APIC will only call us for those?  Not doing so confuses ended up
+ * with spurious HPET/RTC IRQs in SMP linux because of it sharing the vector
+ * with a level-triggered IRQ (like vboxguest) delivered on a different CPU.
+ * Alternatively, make the call specify the APIC number of use that in the
+ * filter too/instead. */
         if (IOAPIC_RTE_GET_VECTOR(u64Rte) == u8Vector)
         {
@@ -896 +902 @@
 {
     RT_NOREF(uBusDevFn);    /** @todo r=ramshankar: Remove this argument if it's also unnecessary with Intel IOMMU. */
-#define IOAPIC_ASSERT_IRQ(a_uBusDevFn, a_idxRte, a_PinMask) do { \
-        pThis->au32TagSrc[(a_idxRte)] = !pThis->au32TagSrc[(a_idxRte)] ? uTagSrc : RT_BIT_32(31); \
+#define IOAPIC_ASSERT_IRQ(a_uBusDevFn, a_idxRte, a_PinMask, a_fForceTag) do { \
+        pThis->au32TagSrc[(a_idxRte)] = (a_fForceTag) || !pThis->au32TagSrc[(a_idxRte)] ? uTagSrc : RT_BIT_32(31); \
         pThis->uIrr |= a_PinMask; \
         ioapicSignalIntrForRte(pDevIns, pThis, pThisCC, (a_idxRte)); \
@@ -928 +934 @@
         {
             pThis->uIrr &= ~uPinMask;
+            pThis->au32TagSrc[idxRte] = 0;
             IOAPIC_UNLOCK(pDevIns, pThis, pThisCC);
             return;
         }
 
-        bool const     fFlipFlop = ((iLevel & PDM_IRQ_LEVEL_FLIP_FLOP) == PDM_IRQ_LEVEL_FLIP_FLOP);
-        uint32_t const uPrevIrr  = pThis->uIrr & uPinMask;
+        bool const fFlipFlop = ((iLevel & PDM_IRQ_LEVEL_FLIP_FLOP) == PDM_IRQ_LEVEL_FLIP_FLOP);
         if (!fFlipFlop)
         {
+            uint32_t const uPrevIrr = pThis->uIrr & uPinMask;
             if (u8TriggerMode == IOAPIC_RTE_TRIGGER_MODE_EDGE)
             {
@@ -943 +950 @@
                  */
                 if (!uPrevIrr)
-                    IOAPIC_ASSERT_IRQ(uBusDevFn, idxRte, uPinMask);
+                    IOAPIC_ASSERT_IRQ(uBusDevFn, idxRte, uPinMask, false);
                 else
                 {
@@ -967 +974 @@
                 }
 
-                IOAPIC_ASSERT_IRQ(uBusDevFn, idxRte, uPinMask);
+                IOAPIC_ASSERT_IRQ(uBusDevFn, idxRte, uPinMask, false);
             }
         }
@@ -978 +985 @@
              * hence just the assert is done.
              */
-            IOAPIC_ASSERT_IRQ(uBusDevFn, idxRte, uPinMask);
+            IOAPIC_ASSERT_IRQ(uBusDevFn, idxRte, uPinMask, true);
         }
 
@@ -994 +1001 @@
     PIOAPICCC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PIOAPICCC);
     PIOAPIC   pThis   = PDMDEVINS_2_DATA(pDevIns, PIOAPIC);
-    LogFlow(("IOAPIC: ioapicSendMsi: uBusDevFn=%#x Addr=%#RX64 Data=%#RX32\n", uBusDevFn, pMsi->Addr.u64, pMsi->Data.u32));
+    LogFlow(("IOAPIC: ioapicSendMsi: uBusDevFn=%#x Addr=%#RX64 Data=%#RX32 uTagSrc=%#x\n",
+             uBusDevFn, pMsi->Addr.u64, pMsi->Data.u32, uTagSrc));
 
     XAPICINTR ApicIntr;