- Timestamp:
- Jul 30, 2021 4:41:49 PM (4 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 17 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/PGMAll.cpp
r90346 r90439 947 947 { 948 948 PGM_LOCK_ASSERT_OWNER(pVM); 949 pgmUnlock(pVM);949 PGM_UNLOCK(pVM); 950 950 } 951 951 LogFlow(("PGMTrap0eHandler: uErr=%RGx pvFault=%RGv rc=%Rrc\n", uErr, pvFault, rc)); … … 1225 1225 */ 1226 1226 STAM_PROFILE_START(&pVCpu->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,InvalidatePage), a); 1227 pgmLock(pVM);1227 PGM_LOCK_VOID(pVM); 1228 1228 1229 1229 uintptr_t const idxBth = pVCpu->pgm.s.idxBothModeData; 1230 AssertReturnStmt(idxBth < RT_ELEMENTS(g_aPgmBothModeData), pgmUnlock(pVM), VERR_PGM_MODE_IPE);1231 AssertReturnStmt(g_aPgmBothModeData[idxBth].pfnInvalidatePage, pgmUnlock(pVM), VERR_PGM_MODE_IPE);1230 AssertReturnStmt(idxBth < RT_ELEMENTS(g_aPgmBothModeData), PGM_UNLOCK(pVM), VERR_PGM_MODE_IPE); 1231 AssertReturnStmt(g_aPgmBothModeData[idxBth].pfnInvalidatePage, PGM_UNLOCK(pVM), VERR_PGM_MODE_IPE); 1232 1232 rc = g_aPgmBothModeData[idxBth].pfnInvalidatePage(pVCpu, GCPtrPage); 1233 1233 1234 pgmUnlock(pVM);1234 PGM_UNLOCK(pVM); 1235 1235 STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,InvalidatePage), a); 1236 1236 … … 1293 1293 { 1294 1294 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 1295 pgmLock(pVM);1295 PGM_LOCK_VOID(pVM); 1296 1296 1297 1297 uintptr_t idxShw = pVCpu->pgm.s.idxShadowModeData; … … 1300 1300 int rc = g_aPgmShadowModeData[idxShw].pfnGetPage(pVCpu, GCPtr, pfFlags, pHCPhys); 1301 1301 1302 pgmUnlock(pVM);1302 PGM_UNLOCK(pVM); 1303 1303 return rc; 1304 1304 } … … 1327 1327 1328 1328 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 1329 pgmLock(pVM);1329 PGM_LOCK_VOID(pVM); 1330 1330 1331 1331 uintptr_t idxShw = pVCpu->pgm.s.idxShadowModeData; … … 1334 1334 int rc = g_aPgmShadowModeData[idxShw].pfnModifyPage(pVCpu, GCPtr, PAGE_SIZE, fFlags, fMask, fOpFlags); 1335 1335 1336 pgmUnlock(pVM);1336 PGM_UNLOCK(pVM); 1337 1337 return rc; 1338 1338 } … … 2197 2197 { 2198 2198 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 2199 pgmLock(pVM);2199 PGM_LOCK_VOID(pVM); 2200 2200 2201 2201 Assert(!pVCpu->pgm.s.CTX_SUFF(pGst32BitPd)); … … 2217 2217 pVCpu->pgm.s.pGst32BitPdR0 = *ppPd; 2218 2218 # endif 2219 pgmUnlock(pVM);2219 PGM_UNLOCK(pVM); 2220 2220 return VINF_SUCCESS; 2221 2221 } … … 2231 2231 *ppPd = (PX86PD)HCPtrGuestCR3; 2232 2232 2233 pgmUnlock(pVM);2233 PGM_UNLOCK(pVM); 2234 2234 return VINF_SUCCESS; 2235 2235 } … … 2237 2237 AssertRC(rc); 2238 2238 } 2239 pgmUnlock(pVM);2239 PGM_UNLOCK(pVM); 2240 2240 2241 2241 *ppPd = NULL; … … 2256 2256 Assert(!pVCpu->pgm.s.CTX_SUFF(pGstPaePdpt)); 2257 2257 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 2258 pgmLock(pVM);2258 PGM_LOCK_VOID(pVM); 2259 2259 2260 2260 RTGCPHYS GCPhysCR3 = pVCpu->pgm.s.GCPhysCR3 & X86_CR3_PAE_PAGE_MASK; … … 2274 2274 pVCpu->pgm.s.pGstPaePdptR0 = *ppPdpt; 2275 2275 # endif 2276 pgmUnlock(pVM);2276 PGM_UNLOCK(pVM); 2277 2277 return VINF_SUCCESS; 2278 2278 } … … 2288 2288 *ppPdpt = (PX86PDPT)HCPtrGuestCR3; 2289 2289 2290 pgmUnlock(pVM);2290 PGM_UNLOCK(pVM); 2291 2291 return VINF_SUCCESS; 2292 2292 } … … 2295 2295 } 2296 2296 2297 pgmUnlock(pVM);2297 PGM_UNLOCK(pVM); 2298 2298 *ppPdpt = NULL; 2299 2299 return rc; … … 2314 2314 { 2315 2315 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 2316 pgmLock(pVM);2316 PGM_LOCK_VOID(pVM); 2317 2317 2318 2318 PX86PDPT pGuestPDPT = pVCpu->pgm.s.CTX_SUFF(pGstPaePdpt); … … 2340 2340 if (fChanged) 2341 2341 pVCpu->pgm.s.aGCPhysGstPaePDs[iPdpt] = GCPhys; 2342 pgmUnlock(pVM);2342 PGM_UNLOCK(pVM); 2343 2343 return VINF_SUCCESS; 2344 2344 } … … 2357 2357 2358 2358 *ppPd = pVCpu->pgm.s.CTX_SUFF(apGstPaePDs)[iPdpt]; 2359 pgmUnlock(pVM);2359 PGM_UNLOCK(pVM); 2360 2360 return VINF_SUCCESS; 2361 2361 } … … 2370 2370 # endif 2371 2371 2372 pgmUnlock(pVM);2372 PGM_UNLOCK(pVM); 2373 2373 return rc; 2374 2374 } … … 2387 2387 Assert(!pVCpu->pgm.s.CTX_SUFF(pGstAmd64Pml4)); 2388 2388 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 2389 pgmLock(pVM);2389 PGM_LOCK_VOID(pVM); 2390 2390 2391 2391 RTGCPHYS GCPhysCR3 = pVCpu->pgm.s.GCPhysCR3 & X86_CR3_AMD64_PAGE_MASK; … … 2405 2405 pVCpu->pgm.s.pGstAmd64Pml4R0 = *ppPml4; 2406 2406 # endif 2407 pgmUnlock(pVM);2407 PGM_UNLOCK(pVM); 2408 2408 return VINF_SUCCESS; 2409 2409 } … … 2419 2419 *ppPml4 = (PX86PML4)HCPtrGuestCR3; 2420 2420 2421 pgmUnlock(pVM);2421 PGM_UNLOCK(pVM); 2422 2422 return VINF_SUCCESS; 2423 2423 } … … 2425 2425 } 2426 2426 2427 pgmUnlock(pVM);2427 PGM_UNLOCK(pVM); 2428 2428 *ppPml4 = NULL; 2429 2429 return rc; … … 2582 2582 if (pPool->cDirtyPages) 2583 2583 { 2584 pgmLock(pVM);2584 PGM_LOCK_VOID(pVM); 2585 2585 pgmPoolResetDirtyPages(pVM); 2586 pgmUnlock(pVM);2586 PGM_UNLOCK(pVM); 2587 2587 } 2588 2588 #endif … … 3517 3517 * @returns VBox status code 3518 3518 * @param pVM The cross context VM structure. 3519 * @param fVoid Set if the caller cannot handle failure returns. 3519 3520 * @param SRC_POS The source position of the caller (RT_SRC_POS). 3520 3521 */ 3521 #if (defined(VBOX_STRICT) && defined(IN_RING3)) || defined(DOXYGEN_RUNNING)3522 int pgmLockDebug(PVMCC pVM, RT_SRC_POS_DECL)3522 #if defined(VBOX_STRICT) || defined(DOXYGEN_RUNNING) 3523 int pgmLockDebug(PVMCC pVM, bool fVoid, RT_SRC_POS_DECL) 3523 3524 #else 3524 int pgmLock(PVMCC pVM )3525 int pgmLock(PVMCC pVM, bool fVoid) 3525 3526 #endif 3526 3527 { 3527 #if defined(VBOX_STRICT) && defined(IN_RING3)3528 #if defined(VBOX_STRICT) 3528 3529 int rc = PDMCritSectEnterDebug(pVM, &pVM->pgm.s.CritSectX, VERR_SEM_BUSY, (uintptr_t)ASMReturnAddress(), RT_SRC_POS_ARGS); 3529 3530 #else 3530 3531 int rc = PDMCritSectEnter(pVM, &pVM->pgm.s.CritSectX, VERR_SEM_BUSY); 3531 3532 #endif 3533 if (RT_SUCCESS(rc)) 3534 return rc; 3535 3532 3536 #ifdef IN_RING0 3533 3537 if (rc == VERR_SEM_BUSY) 3538 { 3534 3539 rc = VMMRZCallRing3NoCpu(pVM, VMMCALLRING3_PGM_LOCK, 0); 3540 if (RT_SUCCESS(rc)) 3541 return rc; 3542 } 3535 3543 #endif 3536 AssertMsg(rc == VINF_SUCCESS, ("%Rrc\n", rc)); 3544 if (fVoid) 3545 PDM_CRITSECT_RELEASE_ASSERT_RC(pVM, &pVM->pgm.s.CritSectX, rc); 3546 else 3547 AssertRC(rc); 3537 3548 return rc; 3538 3549 } … … 3771 3782 AssertReturn(g_aPgmBothModeData[idxBth].pfnAssertCR3, -VERR_PGM_MODE_IPE); 3772 3783 3773 pgmLock(pVM);3784 PGM_LOCK_VOID(pVM); 3774 3785 unsigned cErrors = g_aPgmBothModeData[idxBth].pfnAssertCR3(pVCpu, cr3, cr4, 0, ~(RTGCPTR)0); 3775 pgmUnlock(pVM);3786 PGM_UNLOCK(pVM); 3776 3787 3777 3788 STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,SyncCR3), a); -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r87141 r90439 114 114 Assert(!pVM->pgm.s.fNestedPaging); 115 115 116 pgmLock(pVM);116 PGM_LOCK_VOID(pVM); 117 117 /* Note: we only really need shadow paging in real and protected mode for VT-x and AMD-V (excluding nested paging/EPT modes), 118 118 * but any calls to GC need a proper shadow page setup as well. … … 160 160 # endif 161 161 162 pgmUnlock(pVM);162 PGM_UNLOCK(pVM); 163 163 return rc; 164 164 #else … … 346 346 if (pCur->hType != pPool->hAccessHandlerType) 347 347 { 348 pgmUnlock(pVM);348 PGM_UNLOCK(pVM); 349 349 *pfLockTaken = false; 350 350 } … … 353 353 354 354 # ifdef VBOX_WITH_STATISTICS 355 pgmLock(pVM);355 PGM_LOCK_VOID(pVM); 356 356 pCur = pgmHandlerPhysicalLookup(pVM, GCPhysFault); 357 357 if (pCur) 358 358 STAM_PROFILE_STOP(&pCur->Stat, h); 359 pgmUnlock(pVM);359 PGM_UNLOCK(pVM); 360 360 # endif 361 361 } … … 466 466 /* Take the big lock now before we update flags. */ 467 467 *pfLockTaken = true; 468 pgmLock(pVM);468 PGM_LOCK_VOID(pVM); 469 469 470 470 /* … … 546 546 /* Take the big lock now. */ 547 547 *pfLockTaken = true; 548 pgmLock(pVM);548 PGM_LOCK_VOID(pVM); 549 549 # endif /* !PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE) */ 550 550 … … 3185 3185 { 3186 3186 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 3187 pgmLock(pVM);3187 PGM_LOCK_VOID(pVM); 3188 3188 3189 3189 # if PGM_SHW_TYPE == PGM_TYPE_32BIT … … 3202 3202 if (rc != VINF_SUCCESS) 3203 3203 { 3204 pgmUnlock(pVM);3204 PGM_UNLOCK(pVM); 3205 3205 AssertRC(rc); 3206 3206 return rc; … … 3228 3228 if (rc != VINF_SUCCESS) 3229 3229 { 3230 pgmUnlock(pVM);3230 PGM_UNLOCK(pVM); 3231 3231 AssertRC(rc); 3232 3232 return rc; … … 3256 3256 } 3257 3257 } 3258 pgmUnlock(pVM);3258 PGM_UNLOCK(pVM); 3259 3259 } 3260 3260 return rc; … … 3336 3336 int rc = VINF_SUCCESS; 3337 3337 3338 pgmLock(pVM);3338 PGM_LOCK_VOID(pVM); 3339 3339 3340 3340 /* … … 3356 3356 if (rc != VINF_SUCCESS) 3357 3357 { 3358 pgmUnlock(pVM);3358 PGM_UNLOCK(pVM); 3359 3359 AssertRC(rc); 3360 3360 return rc; … … 3380 3380 if (rc != VINF_SUCCESS) 3381 3381 { 3382 pgmUnlock(pVM);3382 PGM_UNLOCK(pVM); 3383 3383 AssertRC(rc); 3384 3384 return rc; … … 3394 3394 { 3395 3395 PGM_DYNMAP_UNUSED_HINT(pVCpu, pPdeDst); 3396 pgmUnlock(pVM);3396 PGM_UNLOCK(pVM); 3397 3397 AssertRC(rc); 3398 3398 return rc; … … 3434 3434 } 3435 3435 PGM_DYNMAP_UNUSED_HINT(pVCpu, pPdeDst); 3436 pgmUnlock(pVM);3436 PGM_UNLOCK(pVM); 3437 3437 return rc; 3438 3438 … … 3468 3468 #if !PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE) && PGM_SHW_TYPE != PGM_TYPE_NONE 3469 3469 # ifdef PGMPOOL_WITH_OPTIMIZED_DIRTY_PT 3470 pgmLock(pVM);3470 PGM_LOCK_VOID(pVM); 3471 3471 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); 3472 3472 if (pPool->cDirtyPages) 3473 3473 pgmPoolResetDirtyPages(pVM); 3474 pgmUnlock(pVM);3474 PGM_UNLOCK(pVM); 3475 3475 # endif 3476 3476 #endif /* !NESTED && !EPT */ … … 4314 4314 */ 4315 4315 RTHCPTR HCPtrGuestCR3; 4316 pgmLock(pVM);4316 PGM_LOCK_VOID(pVM); 4317 4317 PPGMPAGE pPageCR3 = pgmPhysGetPage(pVM, GCPhysCR3); 4318 4318 AssertReturn(pPageCR3, VERR_PGM_INVALID_CR3_ADDR); 4319 4319 /** @todo this needs some reworking wrt. locking? */ 4320 4320 int rc = pgmPhysGCPhys2CCPtrInternalDepr(pVM, pPageCR3, GCPhysCR3 & GST_CR3_PAGE_MASK, (void **)&HCPtrGuestCR3); /** @todo r=bird: This GCPhysCR3 masking isn't necessary. */ 4321 pgmUnlock(pVM);4321 PGM_UNLOCK(pVM); 4322 4322 if (RT_SUCCESS(rc)) 4323 4323 { … … 4365 4365 RTHCPTR HCPtr; 4366 4366 RTGCPHYS GCPhys = PGM_A20_APPLY(pVCpu, pGuestPDPT->a[i].u & X86_PDPE_PG_MASK); 4367 pgmLock(pVM);4367 PGM_LOCK_VOID(pVM); 4368 4368 PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhys); 4369 4369 AssertReturn(pPage, VERR_PGM_INVALID_PDPE_ADDR); 4370 4370 int rc2 = pgmPhysGCPhys2CCPtrInternalDepr(pVM, pPage, GCPhys, (void **)&HCPtr); 4371 pgmUnlock(pVM);4371 PGM_UNLOCK(pVM); 4372 4372 if (RT_SUCCESS(rc2)) 4373 4373 { … … 4442 4442 PPGMPOOLPAGE pNewShwPageCR3; 4443 4443 4444 pgmLock(pVM);4444 PGM_LOCK_VOID(pVM); 4445 4445 4446 4446 # ifdef PGMPOOL_WITH_OPTIMIZED_DIRTY_PT … … 4493 4493 pgmPoolFreeByPage(pPool, pOldShwPageCR3, NIL_PGMPOOL_IDX, UINT32_MAX); 4494 4494 } 4495 pgmUnlock(pVM);4495 PGM_UNLOCK(pVM); 4496 4496 # else 4497 4497 NOREF(GCPhysCR3); … … 4556 4556 Assert(!pVM->pgm.s.fNestedPaging); 4557 4557 # endif 4558 pgmLock(pVM);4558 PGM_LOCK_VOID(pVM); 4559 4559 4560 4560 # ifndef PGM_WITHOUT_MAPPINGS … … 4581 4581 } 4582 4582 4583 pgmUnlock(pVM);4583 PGM_UNLOCK(pVM); 4584 4584 #endif 4585 4585 -
trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp
r90346 r90439 67 67 if (cRefs == 0) 68 68 { 69 pgmLock(pVM);69 PGM_LOCK_VOID(pVM); 70 70 pType->u32Magic = PGMPHYSHANDLERTYPEINT_MAGIC_DEAD; 71 71 RTListOff32NodeRemove(&pType->ListNode); 72 pgmUnlock(pVM);72 PGM_UNLOCK(pVM); 73 73 MMHyperFree(pVM, pType); 74 74 } … … 279 279 pPhysHandler->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT; 280 280 281 pgmLock(pVM);281 PGM_LOCK_VOID(pVM); 282 282 if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pPhysHandler->Core)) 283 283 { … … 289 289 NEMHCNotifyHandlerPhysicalRegister(pVM, pType->enmKind, GCPhys, GCPhysLast - GCPhys + 1); 290 290 #endif 291 pgmUnlock(pVM);291 PGM_UNLOCK(pVM); 292 292 293 293 if (rc != VINF_SUCCESS) … … 295 295 return rc; 296 296 } 297 pgmUnlock(pVM);297 PGM_UNLOCK(pVM); 298 298 299 299 pPhysHandler->Core.Key = NIL_RTGCPHYS; … … 441 441 * Remove the handler from the tree. 442 442 */ 443 pgmLock(pVM);443 PGM_LOCK_VOID(pVM); 444 444 PPGMPHYSHANDLER pRemoved = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, 445 445 pPhysHandler->Core.Key); … … 458 458 pPhysHandler->Core.KeyLast = NIL_RTGCPHYS; 459 459 460 pgmUnlock(pVM);460 PGM_UNLOCK(pVM); 461 461 462 462 return VINF_SUCCESS; … … 472 472 RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pRemoved->Core); 473 473 474 pgmUnlock(pVM);474 PGM_UNLOCK(pVM); 475 475 476 476 if (!pRemoved) … … 517 517 * Find the handler. 518 518 */ 519 pgmLock(pVM);519 PGM_LOCK_VOID(pVM); 520 520 PPGMPHYSHANDLER pRemoved = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys); 521 521 if (pRemoved) … … 533 533 pVM->pgm.s.pLastPhysHandlerR3 = 0; 534 534 535 pgmUnlock(pVM);535 PGM_UNLOCK(pVM); 536 536 537 537 pRemoved->Core.Key = NIL_RTGCPHYS; … … 540 540 } 541 541 542 pgmUnlock(pVM);542 PGM_UNLOCK(pVM); 543 543 544 544 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys)); … … 837 837 */ 838 838 int rc; 839 pgmLock(pVM);839 PGM_LOCK_VOID(pVM); 840 840 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhysCurrent); 841 841 if (pCur) … … 880 880 NEMHCNotifyHandlerPhysicalModify(pVM, enmKind, GCPhysCurrent, GCPhys, cb, fRestoreAsRAM); 881 881 882 pgmUnlock(pVM);882 PGM_UNLOCK(pVM); 883 883 884 884 PGM_INVL_ALL_VCPU_TLBS(pVM); … … 919 919 } 920 920 921 pgmUnlock(pVM);921 PGM_UNLOCK(pVM); 922 922 return rc; 923 923 } … … 939 939 */ 940 940 int rc = VINF_SUCCESS; 941 pgmLock(pVM);941 PGM_LOCK_VOID(pVM); 942 942 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys); 943 943 if (pCur) … … 955 955 } 956 956 957 pgmUnlock(pVM);957 PGM_UNLOCK(pVM); 958 958 return rc; 959 959 } … … 983 983 * Get the handler. 984 984 */ 985 pgmLock(pVM);985 PGM_LOCK_VOID(pVM); 986 986 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys); 987 987 if (RT_LIKELY(pCur)) … … 1003 1003 LogFlow(("PGMHandlerPhysicalSplit: %RGp-%RGp and %RGp-%RGp\n", 1004 1004 pCur->Core.Key, pCur->Core.KeyLast, pNew->Core.Key, pNew->Core.KeyLast)); 1005 pgmUnlock(pVM);1005 PGM_UNLOCK(pVM); 1006 1006 return VINF_SUCCESS; 1007 1007 } … … 1020 1020 rc = VERR_PGM_HANDLER_NOT_FOUND; 1021 1021 } 1022 pgmUnlock(pVM);1022 PGM_UNLOCK(pVM); 1023 1023 MMHyperFree(pVM, pNew); 1024 1024 return rc; … … 1040 1040 */ 1041 1041 int rc; 1042 pgmLock(pVM);1042 PGM_LOCK_VOID(pVM); 1043 1043 PPGMPHYSHANDLER pCur1 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys1); 1044 1044 if (RT_LIKELY(pCur1)) … … 1065 1065 PGMHandlerPhysicalTypeRelease(pVM, pCur2->hType); 1066 1066 MMHyperFree(pVM, pCur2); 1067 pgmUnlock(pVM);1067 PGM_UNLOCK(pVM); 1068 1068 return VINF_SUCCESS; 1069 1069 } … … 1096 1096 rc = VERR_PGM_HANDLER_NOT_FOUND; 1097 1097 } 1098 pgmUnlock(pVM);1098 PGM_UNLOCK(pVM); 1099 1099 return rc; 1100 1100 … … 1119 1119 { 1120 1120 LogFlow(("PGMHandlerPhysicalReset GCPhys=%RGp\n", GCPhys)); 1121 pgmLock(pVM);1121 PGM_LOCK_VOID(pVM); 1122 1122 1123 1123 /* … … 1205 1205 } 1206 1206 1207 pgmUnlock(pVM);1207 PGM_UNLOCK(pVM); 1208 1208 return rc; 1209 1209 } … … 1232 1232 { 1233 1233 LogFlow(("PGMHandlerPhysicalPageTempOff GCPhysPage=%RGp\n", GCPhysPage)); 1234 1235 pgmLock(pVM); 1234 PGM_LOCK_VOID(pVM); 1235 1236 1236 /* 1237 1237 * Validate the range. … … 1249 1249 AssertReturnStmt( pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE 1250 1250 || pCurType->enmKind == PGMPHYSHANDLERKIND_ALL, 1251 pgmUnlock(pVM), VERR_ACCESS_DENIED);1251 PGM_UNLOCK(pVM), VERR_ACCESS_DENIED); 1252 1252 1253 1253 /* … … 1256 1256 PPGMPAGE pPage; 1257 1257 int rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage); 1258 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);1258 AssertReturnStmt(RT_SUCCESS_NP(rc), PGM_UNLOCK(pVM), rc); 1259 1259 if (PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_DISABLED) 1260 1260 { … … 1272 1272 } 1273 1273 } 1274 pgmUnlock(pVM);1274 PGM_UNLOCK(pVM); 1275 1275 return VINF_SUCCESS; 1276 1276 } 1277 pgmUnlock(pVM);1277 PGM_UNLOCK(pVM); 1278 1278 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n", 1279 1279 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast)); 1280 1280 return VERR_INVALID_PARAMETER; 1281 1281 } 1282 pgmUnlock(pVM);1282 PGM_UNLOCK(pVM); 1283 1283 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys)); 1284 1284 return VERR_PGM_HANDLER_NOT_FOUND; … … 1381 1381 PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS offMmio2PageRemap) 1382 1382 { 1383 pgmLock(pVM);1383 PGM_LOCK_VOID(pVM); 1384 1384 1385 1385 /* … … 1390 1390 AssertMsgReturnStmt(PGM_PAGE_GET_TYPE(pPageRemap) == PGMPAGETYPE_MMIO2, 1391 1391 ("hMmio2=%RU64 offMmio2PageRemap=%RGp %R[pgmpage]\n", hMmio2, offMmio2PageRemap, pPageRemap), 1392 pgmUnlock(pVM), VERR_PGM_PHYS_NOT_MMIO2);1392 PGM_UNLOCK(pVM), VERR_PGM_PHYS_NOT_MMIO2); 1393 1393 else 1394 1394 { 1395 pgmUnlock(pVM);1395 PGM_UNLOCK(pVM); 1396 1396 return VERR_OUT_OF_RANGE; 1397 1397 } … … 1407 1407 { 1408 1408 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur); 1409 AssertReturnStmt(pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED);1410 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER);1411 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER);1409 AssertReturnStmt(pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO, PGM_UNLOCK(pVM), VERR_ACCESS_DENIED); 1410 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), PGM_UNLOCK(pVM), VERR_INVALID_PARAMETER); 1411 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, PGM_UNLOCK(pVM), VERR_INVALID_PARAMETER); 1412 1412 1413 1413 /* … … 1416 1416 PPGMPAGE pPage; 1417 1417 int rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage); 1418 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);1418 AssertReturnStmt(RT_SUCCESS_NP(rc), PGM_UNLOCK(pVM), rc); 1419 1419 if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO) 1420 1420 { … … 1424 1424 if (PGM_PAGE_GET_HCPHYS(pPage) == PGM_PAGE_GET_HCPHYS(pPageRemap)) 1425 1425 { 1426 pgmUnlock(pVM);1426 PGM_UNLOCK(pVM); 1427 1427 return VINF_PGM_HANDLER_ALREADY_ALIASED; 1428 1428 } … … 1466 1466 } 1467 1467 LogFlow(("PGMHandlerPhysicalPageAliasMmio2: => %R[pgmpage]\n", pPage)); 1468 pgmUnlock(pVM);1468 PGM_UNLOCK(pVM); 1469 1469 return VINF_SUCCESS; 1470 1470 } 1471 1471 1472 pgmUnlock(pVM);1472 PGM_UNLOCK(pVM); 1473 1473 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n", 1474 1474 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast)); … … 1476 1476 } 1477 1477 1478 pgmUnlock(pVM);1478 PGM_UNLOCK(pVM); 1479 1479 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys)); 1480 1480 return VERR_PGM_HANDLER_NOT_FOUND; … … 1516 1516 { 1517 1517 /// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */ 1518 pgmLock(pVM);1518 PGM_LOCK_VOID(pVM); 1519 1519 1520 1520 /* … … 1528 1528 { 1529 1529 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur); 1530 AssertReturnStmt(pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED);1531 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER);1532 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER);1530 AssertReturnStmt(pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO, PGM_UNLOCK(pVM), VERR_ACCESS_DENIED); 1531 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), PGM_UNLOCK(pVM), VERR_INVALID_PARAMETER); 1532 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, PGM_UNLOCK(pVM), VERR_INVALID_PARAMETER); 1533 1533 1534 1534 /* … … 1537 1537 PPGMPAGE pPage; 1538 1538 int rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage); 1539 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);1539 AssertReturnStmt(RT_SUCCESS_NP(rc), PGM_UNLOCK(pVM), rc); 1540 1540 if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO) 1541 1541 { 1542 pgmUnlock(pVM);1542 PGM_UNLOCK(pVM); 1543 1543 AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO, 1544 1544 ("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage), … … 1576 1576 } 1577 1577 LogFlow(("PGMHandlerPhysicalPageAliasHC: => %R[pgmpage]\n", pPage)); 1578 pgmUnlock(pVM);1578 PGM_UNLOCK(pVM); 1579 1579 return VINF_SUCCESS; 1580 1580 } 1581 pgmUnlock(pVM);1581 PGM_UNLOCK(pVM); 1582 1582 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n", 1583 1583 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast)); 1584 1584 return VERR_INVALID_PARAMETER; 1585 1585 } 1586 pgmUnlock(pVM);1586 PGM_UNLOCK(pVM); 1587 1587 1588 1588 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys)); … … 1605 1605 * Find the handler. 1606 1606 */ 1607 pgmLock(pVM);1607 PGM_LOCK_VOID(pVM); 1608 1608 PPGMPHYSHANDLER pCur = pgmHandlerPhysicalLookup(pVM, GCPhys); 1609 1609 if (pCur) … … 1616 1616 || pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO); 1617 1617 #endif 1618 pgmUnlock(pVM);1618 PGM_UNLOCK(pVM); 1619 1619 return true; 1620 1620 } 1621 pgmUnlock(pVM);1621 PGM_UNLOCK(pVM); 1622 1622 return false; 1623 1623 } … … 1637 1637 bool pgmHandlerPhysicalIsAll(PVMCC pVM, RTGCPHYS GCPhys) 1638 1638 { 1639 pgmLock(pVM);1639 PGM_LOCK_VOID(pVM); 1640 1640 PPGMPHYSHANDLER pCur = pgmHandlerPhysicalLookup(pVM, GCPhys); 1641 1641 if (!pCur) 1642 1642 { 1643 pgmUnlock(pVM);1643 PGM_UNLOCK(pVM); 1644 1644 AssertFailed(); 1645 1645 return true; … … 1654 1654 1655 1655 bool bRet = pCurType->enmKind != PGMPHYSHANDLERKIND_WRITE; 1656 pgmUnlock(pVM);1656 PGM_UNLOCK(pVM); 1657 1657 return bRet; 1658 1658 } -
trunk/src/VBox/VMM/VMMAll/PGMAllMap.cpp
r82968 r90439 645 645 * Iterate mappings. 646 646 */ 647 pgmLock(pVM);/* to avoid assertions */647 PGM_LOCK_VOID(pVM); /* to avoid assertions */ 648 648 for (PPGMMAPPING pCur = pVM->pgm.s.CTX_SUFF(pMappings); pCur; pCur = pCur->CTX_SUFF(pNext)) 649 649 { … … 651 651 pgmMapCheckShadowPDEs(pVM, pVCpu, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3), pCur, iPDE); 652 652 } 653 pgmUnlock(pVM);653 PGM_UNLOCK(pVM); 654 654 } 655 655 -
trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp
r90346 r90439 276 276 * kind of screw things up... 277 277 */ 278 int rc = pgmLock(pVM); 279 AssertRC(rc); 278 PGM_LOCK_VOID(pVM); 280 279 281 280 PPGMPAGE pShadowPage = &pRomPage->Shadow; … … 287 286 288 287 void *pvDstPage; 289 rc = pgmPhysPageMakeWritableAndMap(pVM, pShadowPage, GCPhys & X86_PTE_PG_MASK, &pvDstPage);288 int rc = pgmPhysPageMakeWritableAndMap(pVM, pShadowPage, GCPhys & X86_PTE_PG_MASK, &pvDstPage); 290 289 if (RT_SUCCESS(rc)) 291 290 { … … 300 299 } 301 300 302 pgmUnlock(pVM);301 PGM_UNLOCK(pVM); 303 302 return rc; 304 303 } … … 320 319 void pgmPhysInvalidRamRangeTlbs(PVMCC pVM) 321 320 { 322 pgmLock(pVM);321 PGM_LOCK_VOID(pVM); 323 322 RT_ZERO(pVM->pgm.s.apRamRangesTlbR3); 324 323 RT_ZERO(pVM->pgm.s.apRamRangesTlbR0); 325 pgmUnlock(pVM);324 PGM_UNLOCK(pVM); 326 325 } 327 326 … … 549 548 VMM_INT_DECL(int) PGMPhysGCPhys2HCPhys(PVMCC pVM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys) 550 549 { 551 pgmLock(pVM);550 PGM_LOCK_VOID(pVM); 552 551 PPGMPAGE pPage; 553 552 int rc = pgmPhysGetPageEx(pVM, GCPhys, &pPage); 554 553 if (RT_SUCCESS(rc)) 555 554 *pHCPhys = PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK); 556 pgmUnlock(pVM);555 PGM_UNLOCK(pVM); 557 556 return rc; 558 557 } … … 566 565 void pgmPhysInvalidatePageMapTLB(PVMCC pVM) 567 566 { 568 pgmLock(pVM);567 PGM_LOCK_VOID(pVM); 569 568 STAM_COUNTER_INC(&pVM->pgm.s.CTX_SUFF(pStats)->StatPageMapTlbFlushes); 570 569 … … 588 587 } 589 588 590 pgmUnlock(pVM);589 PGM_UNLOCK(pVM); 591 590 } 592 591 … … 1778 1777 VMM_INT_DECL(int) PGMPhysGCPhys2CCPtr(PVMCC pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock) 1779 1778 { 1780 int rc = pgmLock(pVM);1779 int rc = PGM_LOCK(pVM); 1781 1780 AssertRCReturn(rc, rc); 1782 1781 … … 1812 1811 } 1813 1812 1814 pgmUnlock(pVM);1813 PGM_UNLOCK(pVM); 1815 1814 return rc; 1816 1815 } … … 1847 1846 VMM_INT_DECL(int) PGMPhysGCPhys2CCPtrReadOnly(PVMCC pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock) 1848 1847 { 1849 int rc = pgmLock(pVM);1848 int rc = PGM_LOCK(pVM); 1850 1849 AssertRCReturn(rc, rc); 1851 1850 … … 1871 1870 } 1872 1871 1873 pgmUnlock(pVM);1872 PGM_UNLOCK(pVM); 1874 1873 return rc; 1875 1874 } … … 1970 1969 pLock->pvMap = NULL; 1971 1970 1972 pgmLock(pVM);1971 PGM_LOCK_VOID(pVM); 1973 1972 if (fWriteLock) 1974 1973 { … … 2012 2011 } 2013 2012 # endif 2014 pgmUnlock(pVM);2013 PGM_UNLOCK(pVM); 2015 2014 } 2016 2015 … … 2040 2039 #endif 2041 2040 2042 pgmLock(pVM);2041 PGM_LOCK_VOID(pVM); 2043 2042 if (fWriteLock) 2044 2043 { … … 2076 2075 if ((i & 1023) == 1023 && i + 1 < cPages) 2077 2076 { 2078 pgmUnlock(pVM);2079 pgmLock(pVM);2077 PGM_UNLOCK(pVM); 2078 PGM_LOCK_VOID(pVM); 2080 2079 } 2081 2080 } … … 2111 2110 if ((i & 1023) == 1023 && i + 1 < cPages) 2112 2111 { 2113 pgmUnlock(pVM);2114 pgmLock(pVM);2112 PGM_UNLOCK(pVM); 2113 PGM_LOCK_VOID(pVM); 2115 2114 } 2116 2115 } 2117 2116 } 2118 pgmUnlock(pVM);2117 PGM_UNLOCK(pVM); 2119 2118 2120 2119 RT_BZERO(paLocks, sizeof(paLocks[0]) * cPages); … … 2166 2165 2167 2166 Log(("pgmPhysGCPhys2R3Ptr(,%RGp,): dont use this API!\n", GCPhys)); /** @todo eliminate this API! */ 2168 pgmLock(pVM);2167 PGM_LOCK_VOID(pVM); 2169 2168 2170 2169 PPGMRAMRANGE pRam; … … 2174 2173 rc = pgmPhysGCPhys2CCPtrInternalDepr(pVM, pPage, GCPhys, (void **)pR3Ptr); 2175 2174 2176 pgmUnlock(pVM);2175 PGM_UNLOCK(pVM); 2177 2176 Assert(rc <= VINF_SUCCESS); 2178 2177 return rc; … … 2323 2322 2324 2323 /* Release the PGM lock as MMIO handlers take the IOM lock. (deadlock prevention) */ 2325 pgmUnlock(pVM);2324 PGM_UNLOCK(pVM); 2326 2325 rcStrict = pfnHandler(pVM, pVCpu, GCPhys, (void *)pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, enmOrigin, pvUser); 2327 pgmLock(pVM);2326 PGM_LOCK_VOID(pVM); 2328 2327 2329 2328 #ifdef VBOX_WITH_STATISTICS … … 2399 2398 STAM_COUNTER_ADD(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,PhysReadBytes), cbRead); 2400 2399 2401 pgmLock(pVM);2400 PGM_LOCK_VOID(pVM); 2402 2401 2403 2402 /* … … 2458 2457 { 2459 2458 memset(pvBuf, 0xff, cb); 2460 pgmUnlock(pVM);2459 PGM_UNLOCK(pVM); 2461 2460 return rcStrict2; 2462 2461 } … … 2466 2465 if (cb >= cbRead) 2467 2466 { 2468 pgmUnlock(pVM);2467 PGM_UNLOCK(pVM); 2469 2468 return rcStrict; 2470 2469 } … … 2501 2500 } /* Ram range walk */ 2502 2501 2503 pgmUnlock(pVM);2502 PGM_UNLOCK(pVM); 2504 2503 return rcStrict; 2505 2504 } … … 2563 2562 /* Release the PGM lock as MMIO handlers take the IOM lock. (deadlock prevention) */ 2564 2563 PGM_LOCK_ASSERT_OWNER(pVM); 2565 pgmUnlock(pVM);2564 PGM_UNLOCK(pVM); 2566 2565 rcStrict = pfnHandler(pVM, pVCpu, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, enmOrigin, pvUser); 2567 pgmLock(pVM);2566 PGM_LOCK_VOID(pVM); 2568 2567 2569 2568 #ifdef VBOX_WITH_STATISTICS … … 2682 2681 /* Release the PGM lock as MMIO handlers take the IOM lock. (deadlock prevention) */ 2683 2682 PGM_LOCK_ASSERT_OWNER(pVM); 2684 pgmUnlock(pVM);2683 PGM_UNLOCK(pVM); 2685 2684 rcStrict2 = pfnHandler(pVM, pVCpu, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, enmOrigin, pvUser); 2686 pgmLock(pVM);2685 PGM_LOCK_VOID(pVM); 2687 2686 2688 2687 #ifdef VBOX_WITH_STATISTICS … … 2785 2784 STAM_COUNTER_ADD(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,PhysWriteBytes), cbWrite); 2786 2785 2787 pgmLock(pVM);2786 PGM_LOCK_VOID(pVM); 2788 2787 2789 2788 /* … … 2839 2838 else 2840 2839 { 2841 pgmUnlock(pVM);2840 PGM_UNLOCK(pVM); 2842 2841 return rcStrict2; 2843 2842 } … … 2847 2846 if (cb >= cbWrite) 2848 2847 { 2849 pgmUnlock(pVM);2848 PGM_UNLOCK(pVM); 2850 2849 return rcStrict; 2851 2850 } … … 2878 2877 } /* Ram range walk */ 2879 2878 2880 pgmUnlock(pVM);2879 PGM_UNLOCK(pVM); 2881 2880 return rcStrict; 2882 2881 } … … 3056 3055 * when many VCPUs are fighting for the lock. 3057 3056 */ 3058 pgmLock(pVM);3057 PGM_LOCK_VOID(pVM); 3059 3058 3060 3059 /* map the 1st page */ … … 3064 3063 if (RT_FAILURE(rc)) 3065 3064 { 3066 pgmUnlock(pVM);3065 PGM_UNLOCK(pVM); 3067 3066 return rc; 3068 3067 } … … 3074 3073 memcpy(pvDst, pvSrc, cb); 3075 3074 PGMPhysReleasePageMappingLock(pVM, &Lock); 3076 pgmUnlock(pVM);3075 PGM_UNLOCK(pVM); 3077 3076 return VINF_SUCCESS; 3078 3077 } … … 3094 3093 if (RT_FAILURE(rc)) 3095 3094 { 3096 pgmUnlock(pVM);3095 PGM_UNLOCK(pVM); 3097 3096 return rc; 3098 3097 } … … 3103 3102 memcpy(pvDst, pvSrc, cb); 3104 3103 PGMPhysReleasePageMappingLock(pVM, &Lock); 3105 pgmUnlock(pVM);3104 PGM_UNLOCK(pVM); 3106 3105 return VINF_SUCCESS; 3107 3106 } … … 4069 4068 VMM_INT_DECL(PGMPAGETYPE) PGMPhysGetPageType(PVMCC pVM, RTGCPHYS GCPhys) 4070 4069 { 4071 pgmLock(pVM);4070 PGM_LOCK_VOID(pVM); 4072 4071 PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhys); 4073 4072 PGMPAGETYPE enmPgType = pPage ? (PGMPAGETYPE)PGM_PAGE_GET_TYPE(pPage) : PGMPAGETYPE_INVALID; 4074 pgmUnlock(pVM);4073 PGM_UNLOCK(pVM); 4075 4074 4076 4075 return enmPgType; … … 4107 4106 Assert(!(GCPhys & X86_PAGE_OFFSET_MASK)); 4108 4107 4109 pgmLock(pVM);4108 PGM_LOCK_VOID(pVM); 4110 4109 4111 4110 PPGMRAMRANGE pRam; … … 4204 4203 } 4205 4204 4206 pgmUnlock(pVM);4205 PGM_UNLOCK(pVM); 4207 4206 return VINF_SUCCESS; 4208 4207 } … … 4240 4239 PGM_A20_APPLY_TO_VAR(pVCpu, GCPhys); 4241 4240 4242 pgmLock(pVM);4241 PGM_LOCK_VOID(pVM); 4243 4242 4244 4243 PPGMRAMRANGE pRam; … … 4310 4309 rc = VERR_PGM_PHYS_TLB_UNASSIGNED; 4311 4310 4312 pgmUnlock(pVM);4311 PGM_UNLOCK(pVM); 4313 4312 return rc; 4314 4313 } … … 4340 4339 VMM_INT_DECL(int) PGMPhysIemQueryAccess(PVMCC pVM, RTGCPHYS GCPhys, bool fWritable, bool fByPassHandlers) 4341 4340 { 4342 pgmLock(pVM);4341 PGM_LOCK_VOID(pVM); 4343 4342 PGM_A20_ASSERT_MASKED(VMMGetCpu(pVM), GCPhys); 4344 4343 … … 4370 4369 } 4371 4370 4372 pgmUnlock(pVM);4371 PGM_UNLOCK(pVM); 4373 4372 return rc; 4374 4373 } … … 4394 4393 PFNPGMPHYSNEMCHECKPAGE pfnChecker, void *pvUser) 4395 4394 { 4396 pgmLock(pVM);4395 PGM_LOCK_VOID(pVM); 4397 4396 4398 4397 PPGMPAGE pPage; … … 4456 4455 4457 4456 /* Done. */ 4458 pgmUnlock(pVM);4457 PGM_UNLOCK(pVM); 4459 4458 } 4460 4459 else 4461 4460 { 4462 pgmUnlock(pVM);4461 PGM_UNLOCK(pVM); 4463 4462 4464 4463 pInfo->HCPhys = NIL_RTHCPHYS; … … 4492 4491 * Just brute force this problem. 4493 4492 */ 4494 pgmLock(pVM);4493 PGM_LOCK_VOID(pVM); 4495 4494 int rc = VINF_SUCCESS; 4496 4495 for (PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRangesX); pRam; pRam = pRam->CTX_SUFF(pNext)) … … 4512 4511 } 4513 4512 } 4514 pgmUnlock(pVM);4513 PGM_UNLOCK(pVM); 4515 4514 4516 4515 return rc; -
trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r90346 r90439 957 957 LogFlow(("pgmRZPoolAccessPfHandler: pvFault=%RGv pPage=%p:{.idx=%d} GCPhysFault=%RGp\n", pvFault, pPage, pPage->idx, GCPhysFault)); 958 958 959 pgmLock(pVM);959 PGM_LOCK_VOID(pVM); 960 960 if (PHYS_PAGE_ADDRESS(GCPhysFault) != PHYS_PAGE_ADDRESS(pPage->GCPhys)) 961 961 { … … 963 963 Log(("CPU%d: pgmRZPoolAccessPfHandler pgm pool page for %RGp changed (to %RGp) while waiting!\n", pVCpu->idCpu, PHYS_PAGE_ADDRESS(GCPhysFault), PHYS_PAGE_ADDRESS(pPage->GCPhys))); 964 964 STAM_PROFILE_STOP_EX(&pVM->pgm.s.CTX_SUFF(pPool)->StatMonitorPfRZ, &pPool->StatMonitorPfRZHandled, a); 965 pgmUnlock(pVM);965 PGM_UNLOCK(pVM); 966 966 return VINF_SUCCESS; 967 967 } … … 970 970 { 971 971 Assert(VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TLB_FLUSH)); 972 pgmUnlock(pVM);972 PGM_UNLOCK(pVM); 973 973 return VINF_SUCCESS; /* SMP guest case where we were blocking on the pgm lock while the same page was being marked dirty. */ 974 974 } … … 995 995 { 996 996 AssertMsg(rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT, ("Unexpected rc %d\n", rc)); 997 pgmUnlock(pVM);997 PGM_UNLOCK(pVM); 998 998 return rc; 999 999 } … … 1090 1090 1091 1091 STAM_PROFILE_STOP_EX(&pVM->pgm.s.CTX_SUFF(pPool)->StatMonitorPfRZ, &pPool->StatMonitorPfRZHandled, a); 1092 pgmUnlock(pVM);1092 PGM_UNLOCK(pVM); 1093 1093 return rc; 1094 1094 } … … 1132 1132 rc = pgmRZPoolAccessPfHandlerSTOSD(pVM, pPool, pPage, pDis, pRegFrame, GCPhysFault, pvFault); 1133 1133 STAM_PROFILE_STOP_EX(&pVM->pgm.s.CTX_SUFF(pPool)->StatMonitorPfRZ, &pPool->StatMonitorPfRZRepStosd, a); 1134 pgmUnlock(pVM);1134 PGM_UNLOCK(pVM); 1135 1135 return rc; 1136 1136 } … … 1210 1210 1211 1211 STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pPool)->StatMonitorPfRZ, a); 1212 pgmUnlock(pVM);1212 PGM_UNLOCK(pVM); 1213 1213 return rc; 1214 1214 } … … 1236 1236 } 1237 1237 STAM_PROFILE_STOP_EX(&pVM->pgm.s.CTX_SUFF(pPool)->StatMonitorPfRZ, &pPool->StatMonitorPfRZFlushPage, a); 1238 pgmUnlock(pVM);1238 PGM_UNLOCK(pVM); 1239 1239 return rc; 1240 1240 } … … 1260 1260 NOREF(pvPhys); NOREF(pvBuf); NOREF(enmAccessType); 1261 1261 1262 pgmLock(pVM);1262 PGM_LOCK_VOID(pVM); 1263 1263 1264 1264 #ifdef VBOX_WITH_STATISTICS … … 1342 1342 else 1343 1343 Log(("CPU%d: PGM_ALL_CB_DECL pgm pool page for %RGp changed (to %RGp) while waiting!\n", pVCpu->idCpu, PHYS_PAGE_ADDRESS(GCPhys), PHYS_PAGE_ADDRESS(pPage->GCPhys))); 1344 pgmUnlock(pVM);1344 PGM_UNLOCK(pVM); 1345 1345 return VINF_PGM_HANDLER_DO_DEFAULT; 1346 1346 } … … 2670 2670 static void pgmPoolMonitorModifiedClearAll(PVMCC pVM) 2671 2671 { 2672 pgmLock(pVM);2672 PGM_LOCK_VOID(pVM); 2673 2673 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); 2674 2674 LogFlow(("pgmPoolMonitorModifiedClearAll: cModifiedPages=%d\n", pPool->cModifiedPages)); … … 2693 2693 AssertMsg(cPages == pPool->cModifiedPages, ("%d != %d\n", cPages, pPool->cModifiedPages)); 2694 2694 pPool->cModifiedPages = 0; 2695 pgmUnlock(pVM);2695 PGM_UNLOCK(pVM); 2696 2696 } 2697 2697 … … 3461 3461 { 3462 3462 PVMCPUCC pVCpu = VMMGetCpu(pVM); 3463 pgmLock(pVM);3463 PGM_LOCK_VOID(pVM); 3464 3464 int rc = VINF_SUCCESS; 3465 3465 … … 3493 3493 3494 3494 *pfFlushTLBs = true; 3495 pgmUnlock(pVM);3495 PGM_UNLOCK(pVM); 3496 3496 return rc; 3497 3497 } … … 3537 3537 rc = VINF_PGM_SYNC_CR3; 3538 3538 } 3539 pgmUnlock(pVM);3539 PGM_UNLOCK(pVM); 3540 3540 return rc; 3541 3541 } … … 4041 4041 uint16_t pgmPoolTrackPhysExtAddref(PVMCC pVM, PPGMPAGE pPhysPage, uint16_t u16, uint16_t iShwPT, uint16_t iPte) 4042 4042 { 4043 pgmLock(pVM);4043 PGM_LOCK_VOID(pVM); 4044 4044 if (PGMPOOL_TD_GET_CREFS(u16) != PGMPOOL_TD_CREFS_PHYSEXT) 4045 4045 { … … 4072 4072 else 4073 4073 STAM_COUNTER_INC(&pVM->pgm.s.CTX_SUFF(pStats)->StatTrackAliasedLots); 4074 pgmUnlock(pVM);4074 PGM_UNLOCK(pVM); 4075 4075 return u16; 4076 4076 } … … 4094 4094 if (iPhysExt != PGMPOOL_TD_IDX_OVERFLOWED) 4095 4095 { 4096 pgmLock(pVM);4096 PGM_LOCK_VOID(pVM); 4097 4097 4098 4098 uint16_t iPhysExtPrev = NIL_PGMPOOL_PHYSEXT_INDEX; … … 4117 4117 { 4118 4118 Log2(("pgmPoolTrackPhysExtDerefGCPhys: pPhysPage=%R[pgmpage] idx=%d\n", pPhysPage, pPage->idx)); 4119 pgmUnlock(pVM);4119 PGM_UNLOCK(pVM); 4120 4120 return; 4121 4121 } … … 4146 4146 } 4147 4147 iPhysExt = iPhysExtNext; 4148 pgmUnlock(pVM);4148 PGM_UNLOCK(pVM); 4149 4149 return; 4150 4150 } … … 4156 4156 } while (iPhysExt != NIL_PGMPOOL_PHYSEXT_INDEX); 4157 4157 4158 pgmUnlock(pVM);4158 PGM_UNLOCK(pVM); 4159 4159 AssertFatalMsgFailed(("not-found! cRefs=%d pPhysPage=%R[pgmpage] pPage=%p:{.idx=%d}\n", cRefs, pPhysPage, pPage, pPage->idx)); 4160 4160 } … … 4808 4808 VINF_SUCCESS); 4809 4809 4810 pgmLock(pVM);4810 PGM_LOCK_VOID(pVM); 4811 4811 4812 4812 /* … … 4827 4827 ("Can't free the shadow CR3! (%RHp vs %RHp kind=%d\n", PGMGetHyperCR3(VMMGetCpu(pVM)), pPage->Core.Key, pPage->enmKind)); 4828 4828 Log(("pgmPoolFlushPage: current active shadow CR3, rejected. enmKind=%s idx=%d\n", pgmPoolPoolKindToStr(pPage->enmKind), pPage->idx)); 4829 pgmUnlock(pVM);4829 PGM_UNLOCK(pVM); 4830 4830 return VINF_SUCCESS; 4831 4831 } … … 4884 4884 } 4885 4885 4886 pgmUnlock(pVM);4886 PGM_UNLOCK(pVM); 4887 4887 STAM_PROFILE_STOP(&pPool->StatFlushPage, f); 4888 4888 return rc; … … 4912 4912 AssertReturnVoid(pPage->idx >= PGMPOOL_IDX_FIRST); /* paranoia (#6349) */ 4913 4913 4914 pgmLock(pVM);4914 PGM_LOCK_VOID(pVM); 4915 4915 if (iUser != NIL_PGMPOOL_IDX) 4916 4916 pgmPoolTrackFreeUser(pPool, pPage, iUser, iUserTable); 4917 4917 if (!pPage->fCached) 4918 4918 pgmPoolFlushPage(pPool, pPage); 4919 pgmUnlock(pVM);4919 PGM_UNLOCK(pVM); 4920 4920 STAM_PROFILE_STOP(&pPool->StatFree, a); 4921 4921 } … … 4998 4998 * Assert(!(pVM->pgm.s.fGlobalSyncFlags & PGM_SYNC_CLEAR_PGM_POOL)); */ 4999 4999 5000 pgmLock(pVM);5000 PGM_LOCK_VOID(pVM); 5001 5001 5002 5002 if (pPool->fCacheEnabled) … … 5007 5007 if (fLockPage) 5008 5008 pgmPoolLockPage(pPool, *ppPage); 5009 pgmUnlock(pVM);5009 PGM_UNLOCK(pVM); 5010 5010 STAM_PROFILE_ADV_STOP(&pPool->StatAlloc, a); 5011 5011 LogFlow(("pgmPoolAlloc: cached returns %Rrc *ppPage=%p:{.Key=%RHp, .idx=%d}\n", rc2, *ppPage, (*ppPage)->Core.Key, (*ppPage)->idx)); … … 5024 5024 if (RT_FAILURE(rc)) 5025 5025 { 5026 pgmUnlock(pVM);5026 PGM_UNLOCK(pVM); 5027 5027 Log(("pgmPoolAlloc: returns %Rrc (Free)\n", rc)); 5028 5028 STAM_PROFILE_ADV_STOP(&pPool->StatAlloc, a); … … 5077 5077 pPage->iNext = pPool->iFreeHead; 5078 5078 pPool->iFreeHead = pPage->idx; 5079 pgmUnlock(pVM);5079 PGM_UNLOCK(pVM); 5080 5080 STAM_PROFILE_ADV_STOP(&pPool->StatAlloc, a); 5081 5081 Log(("pgmPoolAlloc: returns %Rrc (Insert)\n", rc3)); … … 5102 5102 if (fLockPage) 5103 5103 pgmPoolLockPage(pPool, pPage); 5104 pgmUnlock(pVM);5104 PGM_UNLOCK(pVM); 5105 5105 LogFlow(("pgmPoolAlloc: returns %Rrc *ppPage=%p:{.Key=%RHp, .idx=%d, .fCached=%RTbool, .fMonitored=%RTbool}\n", 5106 5106 rc, pPage, pPage->Core.Key, pPage->idx, pPage->fCached, pPage->fMonitored)); -
trunk/src/VBox/VMM/VMMAll/PGMAllShw.h
r90346 r90439 238 238 Assert(!pVCpu->pgm.s.pShwPageCR3R3); 239 239 240 pgmLock(pVM);240 PGM_LOCK_VOID(pVM); 241 241 242 242 int rc = pgmPoolAlloc(pVM, GCPhysCR3, PGMPOOLKIND_ROOT_NESTED, PGMPOOLACCESS_DONTCARE, PGM_A20_IS_ENABLED(pVCpu), 243 243 NIL_PGMPOOL_IDX, UINT32_MAX, true /*fLockPage*/, 244 244 &pNewShwPageCR3); 245 AssertLogRelRCReturnStmt(rc, pgmUnlock(pVM), rc);245 AssertLogRelRCReturnStmt(rc, PGM_UNLOCK(pVM), rc); 246 246 247 247 pVCpu->pgm.s.pShwPageCR3R3 = (R3PTRTYPE(PPGMPOOLPAGE))MMHyperCCToR3(pVM, pNewShwPageCR3); 248 248 pVCpu->pgm.s.pShwPageCR3R0 = (R0PTRTYPE(PPGMPOOLPAGE))MMHyperCCToR0(pVM, pNewShwPageCR3); 249 249 250 pgmUnlock(pVM);250 PGM_UNLOCK(pVM); 251 251 252 252 Log(("Enter nested shadow paging mode: root %RHv phys %RHp\n", pVCpu->pgm.s.pShwPageCR3R3, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3)->Core.Key)); … … 272 272 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); 273 273 274 pgmLock(pVM);274 PGM_LOCK_VOID(pVM); 275 275 276 276 /* Do *not* unlock this page as we have two of them floating around in the 32-bit host & 64-bit guest case. … … 285 285 pVCpu->pgm.s.pShwPageCR3R0 = 0; 286 286 287 pgmUnlock(pVM);287 PGM_UNLOCK(pVM); 288 288 289 289 Log(("Leave nested shadow paging mode\n")); -
trunk/src/VBox/VMM/VMMR0/PGMR0.cpp
r86473 r90439 544 544 * IOMMU about each of them. 545 545 */ 546 pgmLock(pGVM);546 PGM_LOCK_VOID(pGVM); 547 547 rc = GPciRawR0GuestPageBeginAssignments(pGVM); 548 548 if (RT_SUCCESS(rc)) … … 573 573 rc = rc2; 574 574 } 575 pgmUnlock(pGVM);575 PGM_UNLOCK(pGVM); 576 576 } 577 577 else … … 683 683 { 684 684 PGM_LOCK_ASSERT_OWNER(pGVM); 685 pgmUnlock(pGVM);685 PGM_UNLOCK(pGVM); 686 686 } 687 687 … … 734 734 * Try lookup the all access physical handler for the address. 735 735 */ 736 pgmLock(pGVM);736 PGM_LOCK_VOID(pGVM); 737 737 PPGMPHYSHANDLER pHandler = pgmHandlerPhysicalLookup(pGVM, GCPhysFault); 738 738 PPGMPHYSHANDLERTYPEINT pHandlerType = RT_LIKELY(pHandler) ? PGMPHYSHANDLER_GET_TYPE(pGVM, pHandler) : NULL; … … 754 754 STAM_COUNTER_INC(&pGVCpu->pgm.s.CTX_SUFF(pStats)->StatR0NpMiscfgSyncPage); 755 755 rc = pgmShwSyncNestedPageLocked(pGVCpu, GCPhysFault, 1 /*cPages*/, enmShwPagingMode); 756 pgmUnlock(pGVM);756 PGM_UNLOCK(pGVM); 757 757 } 758 758 else … … 762 762 void *pvUser = pHandler->CTX_SUFF(pvUser); 763 763 STAM_PROFILE_START(&pHandler->Stat, h); 764 pgmUnlock(pGVM);764 PGM_UNLOCK(pGVM); 765 765 766 766 Log6(("PGMR0Trap0eHandlerNPMisconfig: calling %p(,%#x,,%RGp,%p)\n", pHandlerType->CTX_SUFF(pfnPfHandler), uErr, GCPhysFault, pvUser)); … … 769 769 770 770 #ifdef VBOX_WITH_STATISTICS 771 pgmLock(pGVM);771 PGM_LOCK_VOID(pGVM); 772 772 pHandler = pgmHandlerPhysicalLookup(pGVM, GCPhysFault); 773 773 if (pHandler) 774 774 STAM_PROFILE_STOP(&pHandler->Stat, h); 775 pgmUnlock(pGVM);775 PGM_UNLOCK(pGVM); 776 776 #endif 777 777 } 778 778 else 779 779 { 780 pgmUnlock(pGVM);780 PGM_UNLOCK(pGVM); 781 781 Log(("PGMR0Trap0eHandlerNPMisconfig: %RGp (uErr=%#x) -> R3\n", GCPhysFault, uErr)); 782 782 rc = VINF_EM_RAW_EMULATE_INSTR; … … 795 795 STAM_COUNTER_INC(&pGVCpu->pgm.s.CTX_SUFF(pStats)->StatR0NpMiscfgSyncPage); 796 796 rc = pgmShwSyncNestedPageLocked(pGVCpu, GCPhysFault, 1 /*cPages*/, enmShwPagingMode); 797 pgmUnlock(pGVM);797 PGM_UNLOCK(pGVM); 798 798 } 799 799 -
trunk/src/VBox/VMM/VMMR3/PGM.cpp
r90348 r90439 1997 1997 VM_ASSERT_EMT(pVM); 1998 1998 1999 pgmLock(pVM);1999 PGM_LOCK_VOID(pVM); 2000 2000 2001 2001 /* … … 2074 2074 2075 2075 //pgmLogState(pVM); 2076 pgmUnlock(pVM);2076 PGM_UNLOCK(pVM); 2077 2077 } 2078 2078 … … 2089 2089 if (fAtReset) 2090 2090 { 2091 pgmLock(pVM);2091 PGM_LOCK_VOID(pVM); 2092 2092 2093 2093 int rc = pgmR3PhysRamZeroAll(pVM); … … 2097 2097 AssertReleaseRC(rc); 2098 2098 2099 pgmUnlock(pVM);2099 PGM_UNLOCK(pVM); 2100 2100 } 2101 2101 } … … 2133 2133 { 2134 2134 /* Must free shared pages here. */ 2135 pgmLock(pVM);2135 PGM_LOCK_VOID(pVM); 2136 2136 pgmR3PhysRamTerm(pVM); 2137 2137 pgmR3PhysRomTerm(pVM); 2138 pgmUnlock(pVM);2138 PGM_UNLOCK(pVM); 2139 2139 2140 2140 PGMDeregisterStringFormatTypes(); … … 2278 2278 { 2279 2279 pszType = "MMIO"; 2280 pgmLock(pVM);2280 PGM_LOCK_VOID(pVM); 2281 2281 PPGMPHYSHANDLER pHandler = pgmHandlerPhysicalLookup(pVM, iFirstPage * X86_PAGE_SIZE); 2282 2282 if (pHandler) 2283 2283 pszMore = pHandler->pszDesc; 2284 pgmUnlock(pVM);2284 PGM_UNLOCK(pVM); 2285 2285 break; 2286 2286 } … … 2335 2335 * Get page directory addresses. 2336 2336 */ 2337 pgmLock(pVM);2337 PGM_LOCK_VOID(pVM); 2338 2338 PX86PD pPDSrc = pgmGstGet32bitPDPtr(pVCpu); 2339 2339 Assert(pPDSrc); … … 2361 2361 } 2362 2362 } 2363 pgmUnlock(pVM);2363 PGM_UNLOCK(pVM); 2364 2364 } 2365 2365 … … 2636 2636 RT_ZERO(abZeroPg); 2637 2637 2638 pgmLock(pVM);2638 PGM_LOCK_VOID(pVM); 2639 2639 for (PPGMRAMRANGE pRam = pVM->pgm.s.pRamRangesXR3; 2640 2640 pRam && pRam->GCPhys < GCPhysEnd && RT_SUCCESS(rc); … … 2710 2710 } 2711 2711 } 2712 pgmUnlock(pVM);2712 PGM_UNLOCK(pVM); 2713 2713 2714 2714 RTFileClose(hFile); -
trunk/src/VBox/VMM/VMMR3/PGMDbg.cpp
r86523 r90439 690 690 * bother to match across ranges. 691 691 */ 692 pgmLock(pVM);692 PGM_LOCK_VOID(pVM); 693 693 for (PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRangesX); 694 694 pRam; … … 750 750 { 751 751 *pGCPhysHit = GCPhys + offHit; 752 pgmUnlock(pVM);752 PGM_UNLOCK(pVM); 753 753 return VINF_SUCCESS; 754 754 } … … 764 764 if (GCPhys >= GCPhysLast) /* (may not always hit, but we're run out of ranges.) */ 765 765 { 766 pgmUnlock(pVM);766 PGM_UNLOCK(pVM); 767 767 return VERR_DBGF_MEM_NOT_FOUND; 768 768 } … … 774 774 } 775 775 } 776 pgmUnlock(pVM);776 PGM_UNLOCK(pVM); 777 777 return VERR_DBGF_MEM_NOT_FOUND; 778 778 } … … 872 872 RT_ZERO(Walk); 873 873 874 pgmLock(pVM);874 PGM_LOCK_VOID(pVM); 875 875 for (;; offPage = 0) 876 876 { … … 918 918 { 919 919 *pGCPtrHit = GCPtr + offHit; 920 pgmUnlock(pVM);920 PGM_UNLOCK(pVM); 921 921 return VINF_SUCCESS; 922 922 } … … 1005 1005 } 1006 1006 } 1007 pgmUnlock(pVM);1007 PGM_UNLOCK(pVM); 1008 1008 return VERR_DBGF_MEM_NOT_FOUND; 1009 1009 } … … 1163 1163 static void pgmR3DumpHierarchyShwTablePageInfo(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS HCPhys) 1164 1164 { 1165 pgmLock(pState->pVM);1165 PGM_LOCK_VOID(pState->pVM); 1166 1166 char szPage[80]; 1167 1167 PPGMPOOLPAGE pPage = pgmPoolQueryPageForDbg(pState->pVM->pgm.s.CTX_SUFF(pPool), HCPhys); … … 1192 1192 #endif /* !PGM_WITHOUT_MAPPINGS */ 1193 1193 } 1194 pgmUnlock(pState->pVM);1194 PGM_UNLOCK(pState->pVM); 1195 1195 pState->pHlp->pfnPrintf(pState->pHlp, "%s", szPage); 1196 1196 } … … 1211 1211 if (RT_SUCCESS(rc)) 1212 1212 { 1213 pgmLock(pState->pVM);1213 PGM_LOCK_VOID(pState->pVM); 1214 1214 PCPGMPAGE pPage = pgmPhysGetPage(pState->pVM, GCPhys); 1215 1215 if (pPage) … … 1217 1217 else 1218 1218 strcpy(szPage, "not found"); 1219 pgmUnlock(pState->pVM);1219 PGM_UNLOCK(pState->pVM); 1220 1220 pState->pHlp->pfnPrintf(pState->pHlp, " -> %RGp %s", GCPhys, szPage); 1221 1221 } … … 1920 1920 { 1921 1921 char szPage[80]; 1922 pgmLock(pState->pVM);1922 PGM_LOCK_VOID(pState->pVM); 1923 1923 PCPGMPAGE pPage = pgmPhysGetPage(pState->pVM, GCPhys); 1924 1924 if (pPage) … … 1926 1926 else 1927 1927 strcpy(szPage, " not found"); 1928 pgmUnlock(pState->pVM);1928 PGM_UNLOCK(pState->pVM); 1929 1929 pState->pHlp->pfnPrintf(pState->pHlp, "%s", szPage); 1930 1930 NOREF(cbPage); -
trunk/src/VBox/VMM/VMMR3/PGMHandler.cpp
r86473 r90439 102 102 pType->pszDesc = pszDesc; 103 103 104 pgmLock(pVM);104 PGM_LOCK_VOID(pVM); 105 105 RTListOff32Append(&pVM->pgm.s.CTX_SUFF(pTrees)->HeadPhysHandlerTypes, &pType->ListNode); 106 pgmUnlock(pVM);106 PGM_UNLOCK(pVM); 107 107 108 108 *phType = MMHyperHeapPtrToOffset(pVM, pType); … … 223 223 * (the right -> left on the setting pass is just bird speculating on cache hits) 224 224 */ 225 pgmLock(pVM);225 PGM_LOCK_VOID(pVM); 226 226 RTAvlroGCPhysDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, true, pgmR3HandlerPhysicalOneClear, pVM); 227 227 RTAvlroGCPhysDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, false, pgmR3HandlerPhysicalOneSet, pVM); 228 pgmUnlock(pVM);228 PGM_UNLOCK(pVM); 229 229 } 230 230 -
trunk/src/VBox/VMM/VMMR3/PGMMap.cpp
r82968 r90439 954 954 unsigned i = pMap->cPTs; 955 955 PVMCPU pVCpu = VMMGetCpu(pVM); 956 pgmLock(pVM); /* to avoid assertions */956 PGM_LOCK_VOID(pVM); /* to avoid assertions */ 957 957 958 958 pgmMapClearShadowPDEs(pVM, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3), pMap, iOldPDE, false /*fDeactivateCR3*/); … … 979 979 } 980 980 981 pgmUnlock(pVM);981 PGM_UNLOCK(pVM); 982 982 } 983 983 … … 996 996 PVMCPU pVCpu = VMMGetCpu(pVM); 997 997 # endif 998 pgmLock(pVM); /* to avoid assertions */998 PGM_LOCK_VOID(pVM); /* to avoid assertions */ 999 999 1000 1000 Assert(!pgmMapAreMappingsEnabled(pVM) || PGMGetGuestMode(pVCpu) <= PGMMODE_PAE_NX); … … 1034 1034 } 1035 1035 1036 pgmUnlock(pVM);1036 PGM_UNLOCK(pVM); 1037 1037 } 1038 1038 -
trunk/src/VBox/VMM/VMMR3/PGMPhys.cpp
r86473 r90439 118 118 LogFlow(("PGMR3PhysReadExternal: %RGp %d\n", GCPhys, cbRead)); 119 119 120 pgmLock(pVM);120 PGM_LOCK_VOID(pVM); 121 121 122 122 /* … … 145 145 || PGM_PAGE_IS_SPECIAL_ALIAS_MMIO(pPage)) 146 146 { 147 pgmUnlock(pVM);147 PGM_UNLOCK(pVM); 148 148 149 149 return VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)pgmR3PhysReadExternalEMT, 5, … … 176 176 if (cb >= cbRead) 177 177 { 178 pgmUnlock(pVM);178 PGM_UNLOCK(pVM); 179 179 return VINF_SUCCESS; 180 180 } … … 210 210 } /* Ram range walk */ 211 211 212 pgmUnlock(pVM);212 PGM_UNLOCK(pVM); 213 213 214 214 return VINF_SUCCESS; … … 254 254 LogFlow(("PGMR3PhysWriteExternal: %RGp %d\n", GCPhys, cbWrite)); 255 255 256 pgmLock(pVM);256 PGM_LOCK_VOID(pVM); 257 257 258 258 /* … … 290 290 else 291 291 { 292 pgmUnlock(pVM);292 PGM_UNLOCK(pVM); 293 293 294 294 return VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)pgmR3PhysWriteExternalEMT, 5, … … 319 319 if (cb >= cbWrite) 320 320 { 321 pgmUnlock(pVM);321 PGM_UNLOCK(pVM); 322 322 return VINF_SUCCESS; 323 323 } … … 349 349 } /* Ram range walk */ 350 350 351 pgmUnlock(pVM);351 PGM_UNLOCK(pVM); 352 352 return VINF_SUCCESS; 353 353 } … … 369 369 * an access handler after it succeeds. 370 370 */ 371 int rc = pgmLock(pVM);371 int rc = PGM_LOCK(pVM); 372 372 AssertRCReturn(rc, rc); 373 373 … … 400 400 } 401 401 402 pgmUnlock(pVM);402 PGM_UNLOCK(pVM); 403 403 return rc; 404 404 } … … 439 439 Assert(VM_IS_EMT(pVM) || !PGMIsLockOwner(pVM)); 440 440 441 int rc = pgmLock(pVM);441 int rc = PGM_LOCK(pVM); 442 442 AssertRCReturn(rc, rc); 443 443 … … 476 476 else 477 477 { 478 pgmUnlock(pVM);478 PGM_UNLOCK(pVM); 479 479 480 480 return VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)pgmR3PhysGCPhys2CCPtrDelegated, 4, … … 511 511 } 512 512 513 pgmUnlock(pVM);513 PGM_UNLOCK(pVM); 514 514 return rc; 515 515 } … … 540 540 VMMR3DECL(int) PGMR3PhysGCPhys2CCPtrReadOnlyExternal(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock) 541 541 { 542 int rc = pgmLock(pVM);542 int rc = PGM_LOCK(pVM); 543 543 AssertRCReturn(rc, rc); 544 544 … … 589 589 } 590 590 591 pgmUnlock(pVM);591 PGM_UNLOCK(pVM); 592 592 return rc; 593 593 } … … 636 636 Assert(VM_IS_EMT(pVM) || !PGMIsLockOwner(pVM)); 637 637 638 int rc = pgmLock(pVM);638 int rc = PGM_LOCK(pVM); 639 639 AssertRCReturn(rc, rc); 640 640 … … 651 651 else 652 652 { 653 pgmUnlock(pVM);653 PGM_UNLOCK(pVM); 654 654 ASMNopPause(); 655 pgmLock(pVM);655 PGM_LOCK_VOID(pVM); 656 656 cNextYield = 128; 657 657 } … … 708 708 { 709 709 /* We could do this delegation in bulk, but considered too much work vs gain. */ 710 pgmUnlock(pVM);710 PGM_UNLOCK(pVM); 711 711 rc = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)pgmR3PhysGCPhys2CCPtrDelegated, 4, 712 712 pVM, &paGCPhysPages[iPage], &papvPages[iPage], &paLocks[iPage]); 713 pgmLock(pVM);713 PGM_LOCK_VOID(pVM); 714 714 if (RT_FAILURE(rc)) 715 715 break; … … 744 744 } 745 745 746 pgmUnlock(pVM);746 PGM_UNLOCK(pVM); 747 747 748 748 /* … … 794 794 Assert(VM_IS_EMT(pVM) || !PGMIsLockOwner(pVM)); 795 795 796 int rc = pgmLock(pVM);796 int rc = PGM_LOCK(pVM); 797 797 AssertRCReturn(rc, rc); 798 798 … … 809 809 else 810 810 { 811 pgmUnlock(pVM);811 PGM_UNLOCK(pVM); 812 812 ASMNopPause(); 813 pgmLock(pVM);813 PGM_LOCK_VOID(pVM); 814 814 cNextYield = 256; 815 815 } … … 865 865 } 866 866 867 pgmUnlock(pVM);867 PGM_UNLOCK(pVM); 868 868 869 869 /* … … 1069 1069 Assert((pNew->fFlags & PGM_RAM_RANGE_FLAGS_FLOATING) || pNew->pSelfR0 == MMHyperCCToR0(pVM, pNew)); 1070 1070 1071 pgmLock(pVM);1071 PGM_LOCK_VOID(pVM); 1072 1072 1073 1073 PPGMRAMRANGE pRam = pPrev ? pPrev->pNextR3 : pVM->pgm.s.pRamRangesXR3; … … 1088 1088 1089 1089 pgmR3PhysRebuildRamRangeSearchTrees(pVM); 1090 pgmUnlock(pVM);1090 PGM_UNLOCK(pVM); 1091 1091 } 1092 1092 … … 1104 1104 Assert((pRam->fFlags & PGM_RAM_RANGE_FLAGS_FLOATING) || pRam->pSelfR0 == MMHyperCCToR0(pVM, pRam)); 1105 1105 1106 pgmLock(pVM);1106 PGM_LOCK_VOID(pVM); 1107 1107 1108 1108 PPGMRAMRANGE pNext = pRam->pNextR3; … … 1121 1121 1122 1122 pgmR3PhysRebuildRamRangeSearchTrees(pVM); 1123 pgmUnlock(pVM);1123 PGM_UNLOCK(pVM); 1124 1124 } 1125 1125 … … 1133 1133 static void pgmR3PhysUnlinkRamRange(PVM pVM, PPGMRAMRANGE pRam) 1134 1134 { 1135 pgmLock(pVM);1135 PGM_LOCK_VOID(pVM); 1136 1136 1137 1137 /* find prev. */ … … 1146 1146 1147 1147 pgmR3PhysUnlinkRamRange2(pVM, pRam, pPrev); 1148 pgmUnlock(pVM);1148 PGM_UNLOCK(pVM); 1149 1149 } 1150 1150 … … 1216 1216 1217 1217 Log(("pgmR3PhysChangeMemBalloonRendezvous: %s %x pages\n", (fInflate) ? "inflate" : "deflate", cPages)); 1218 pgmLock(pVM);1218 PGM_LOCK_VOID(pVM); 1219 1219 1220 1220 if (fInflate) … … 1227 1227 if (RT_FAILURE(rc)) 1228 1228 { 1229 pgmUnlock(pVM);1229 PGM_UNLOCK(pVM); 1230 1230 AssertLogRelRC(rc); 1231 1231 return rc; … … 1251 1251 if (RT_FAILURE(rc)) 1252 1252 { 1253 pgmUnlock(pVM);1253 PGM_UNLOCK(pVM); 1254 1254 AssertLogRelRC(rc); 1255 1255 return rc; … … 1264 1264 if (RT_FAILURE(rc)) 1265 1265 { 1266 pgmUnlock(pVM);1266 PGM_UNLOCK(pVM); 1267 1267 AssertLogRelRC(rc); 1268 1268 return rc; … … 1303 1303 } 1304 1304 1305 pgmUnlock(pVM);1305 PGM_UNLOCK(pVM); 1306 1306 1307 1307 /* Flush the recompiler's TLB as well. */ … … 1407 1407 NOREF(pvUser); NOREF(pVCpu); 1408 1408 1409 pgmLock(pVM);1409 PGM_LOCK_VOID(pVM); 1410 1410 #ifdef PGMPOOL_WITH_OPTIMIZED_DIRTY_PT 1411 1411 pgmPoolResetDirtyPages(pVM); … … 1457 1457 CPUMSetChangedFlags(pVM->apCpusR3[idCpu], CPUM_CHANGED_GLOBAL_TLB_FLUSH); 1458 1458 1459 pgmUnlock(pVM);1459 PGM_UNLOCK(pVM); 1460 1460 return rc; 1461 1461 } … … 1487 1487 VM_ASSERT_VALID_EXT_RETURN(pVM, UINT32_MAX); 1488 1488 1489 pgmLock(pVM);1489 PGM_LOCK_VOID(pVM); 1490 1490 uint32_t cRamRanges = 0; 1491 1491 for (PPGMRAMRANGE pCur = pVM->pgm.s.CTX_SUFF(pRamRangesX); pCur; pCur = pCur->CTX_SUFF(pNext)) 1492 1492 cRamRanges++; 1493 pgmUnlock(pVM);1493 PGM_UNLOCK(pVM); 1494 1494 return cRamRanges; 1495 1495 } … … 1514 1514 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE); 1515 1515 1516 pgmLock(pVM);1516 PGM_LOCK_VOID(pVM); 1517 1517 uint32_t iCurRange = 0; 1518 1518 for (PPGMRAMRANGE pCur = pVM->pgm.s.CTX_SUFF(pRamRangesX); pCur; pCur = pCur->CTX_SUFF(pNext), iCurRange++) … … 1528 1528 *pfIsMmio = !!(pCur->fFlags & PGM_RAM_RANGE_FLAGS_AD_HOC_MMIO); 1529 1529 1530 pgmUnlock(pVM);1530 PGM_UNLOCK(pVM); 1531 1531 return VINF_SUCCESS; 1532 1532 } 1533 pgmUnlock(pVM);1533 PGM_UNLOCK(pVM); 1534 1534 return VERR_OUT_OF_RANGE; 1535 1535 } … … 1697 1697 * Update myself, then relink all the ranges and flush the RC TLB. 1698 1698 */ 1699 pgmLock(pVM);1699 PGM_LOCK_VOID(pVM); 1700 1700 1701 1701 pRam->pSelfRC = (RTRCPTR)(GCPtrNew + PAGE_SIZE); … … 1705 1705 pVM->pgm.s.apRamRangesTlbRC[i] = NIL_RTRCPTR; 1706 1706 1707 pgmUnlock(pVM);1707 PGM_UNLOCK(pVM); 1708 1708 return true; 1709 1709 } … … 1818 1818 VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT); 1819 1819 1820 pgmLock(pVM);1820 PGM_LOCK_VOID(pVM); 1821 1821 1822 1822 /* … … 1847 1847 if (RT_FAILURE(rc)) 1848 1848 { 1849 pgmUnlock(pVM);1849 PGM_UNLOCK(pVM); 1850 1850 return rc; 1851 1851 } … … 1909 1909 */ 1910 1910 rc = NEMR3NotifyPhysRamRegister(pVM, GCPhys, cb); 1911 pgmUnlock(pVM);1911 PGM_UNLOCK(pVM); 1912 1912 return rc; 1913 1913 } … … 1935 1935 uint64_t cPages = 0; 1936 1936 uint64_t NanoTS = RTTimeNanoTS(); 1937 pgmLock(pVM);1937 PGM_LOCK_VOID(pVM); 1938 1938 for (PPGMRAMRANGE pRam = pVM->pgm.s.pRamRangesXR3; pRam; pRam = pRam->pNextR3) 1939 1939 { … … 1953 1953 { 1954 1954 LogRel(("PGM: RAM Pre-allocation failed at %RGp (in %s) with rc=%Rrc\n", GCPhys, pRam->pszDesc, rc)); 1955 pgmUnlock(pVM);1955 PGM_UNLOCK(pVM); 1956 1956 return rc; 1957 1957 } … … 1974 1974 } 1975 1975 } 1976 pgmUnlock(pVM);1976 PGM_UNLOCK(pVM); 1977 1977 NanoTS = RTTimeNanoTS() - NanoTS; 1978 1978 … … 1991 1991 { 1992 1992 #ifdef VBOX_STRICT 1993 pgmLock(pVM);1993 PGM_LOCK_VOID(pVM); 1994 1994 1995 1995 if (pVM->pgm.s.cSharedPages > 0) … … 2036 2036 } 2037 2037 2038 pgmUnlock(pVM);2038 PGM_UNLOCK(pVM); 2039 2039 #endif /* VBOX_STRICT */ 2040 2040 NOREF(pVM); … … 2341 2341 Assert(((PPGMPHYSHANDLERTYPEINT)MMHyperHeapOffsetToPtr(pVM, hType))->enmKind == PGMPHYSHANDLERKIND_MMIO); 2342 2342 2343 int rc = pgmLock(pVM);2343 int rc = PGM_LOCK(pVM); 2344 2344 AssertRCReturn(rc, rc); 2345 2345 … … 2362 2362 GCPhys, GCPhysLast, pszDesc, 2363 2363 pRam->GCPhys, pRam->GCPhysLast, pRam->pszDesc), 2364 pgmUnlock(pVM),2364 PGM_UNLOCK(pVM), 2365 2365 VERR_PGM_RAM_CONFLICT); 2366 2366 … … 2374 2374 ("%RGp-%RGp (MMIO/%s): %RGp is not a RAM or MMIO page - type=%d desc=%s\n", 2375 2375 GCPhys, GCPhysLast, pszDesc, pRam->GCPhys, PGM_PAGE_GET_TYPE(pPage), pRam->pszDesc), 2376 pgmUnlock(pVM),2376 PGM_UNLOCK(pVM), 2377 2377 VERR_PGM_RAM_CONFLICT); 2378 2378 pPage++; … … 2399 2399 */ 2400 2400 rc = pgmR3PhysFreePageRange(pVM, pRam, GCPhys, GCPhysLast, PGMPAGETYPE_MMIO); 2401 AssertRCReturnStmt(rc, pgmUnlock(pVM), rc);2401 AssertRCReturnStmt(rc, PGM_UNLOCK(pVM), rc); 2402 2402 2403 2403 /* Force a PGM pool flush as guest ram references have been changed. */ … … 2423 2423 const size_t cbRamRange = RT_UOFFSETOF_DYN(PGMRAMRANGE, aPages[cPages]); 2424 2424 rc = MMHyperAlloc(pVM, RT_UOFFSETOF_DYN(PGMRAMRANGE, aPages[cPages]), 16, MM_TAG_PGM_PHYS, (void **)&pNew); 2425 AssertLogRelMsgRCReturnStmt(rc, ("cbRamRange=%zu\n", cbRamRange), pgmUnlock(pVM), rc);2425 AssertLogRelMsgRCReturnStmt(rc, ("cbRamRange=%zu\n", cbRamRange), PGM_UNLOCK(pVM), rc); 2426 2426 2427 2427 /* Initialize the range. */ … … 2465 2465 pgmPhysInvalidatePageMapTLB(pVM); 2466 2466 2467 pgmUnlock(pVM);2467 PGM_UNLOCK(pVM); 2468 2468 return rc; 2469 2469 } … … 2485 2485 VM_ASSERT_EMT(pVM); 2486 2486 2487 int rc = pgmLock(pVM);2487 int rc = PGM_LOCK(pVM); 2488 2488 AssertRCReturn(rc, rc); 2489 2489 … … 2587 2587 pgmPhysInvalidatePageMapTLB(pVM); 2588 2588 pgmPhysInvalidRamRangeTlbs(pVM); 2589 pgmUnlock(pVM);2589 PGM_UNLOCK(pVM); 2590 2590 return rc; 2591 2591 } … … 2668 2668 * Update myself, then relink all the ranges and flush the RC TLB. 2669 2669 */ 2670 pgmLock(pVM);2670 PGM_LOCK_VOID(pVM); 2671 2671 2672 2672 pMmio->RamRange.pSelfRC = (RTRCPTR)(GCPtrNew + PAGE_SIZE + RT_UOFFSETOF(PGMREGMMIO2RANGE, RamRange)); … … 2676 2676 pVM->pgm.s.apRamRangesTlbRC[i] = NIL_RTRCPTR; 2677 2677 2678 pgmUnlock(pVM);2678 PGM_UNLOCK(pVM); 2679 2679 return true; 2680 2680 } … … 2905 2905 } 2906 2906 2907 pgmLock(pVM);2907 PGM_LOCK_VOID(pVM); 2908 2908 2909 2909 /* Link in the chain of ranges at the head of the list. */ … … 2932 2932 2933 2933 pgmPhysInvalidatePageMapTLB(pVM); 2934 pgmUnlock(pVM);2934 PGM_UNLOCK(pVM); 2935 2935 } 2936 2936 … … 3015 3015 */ 3016 3016 unsigned cChunks = pgmR3PhysMmio2CalcChunkCount(pVM, cb, NULL, NULL); 3017 pgmLock(pVM);3017 PGM_LOCK_VOID(pVM); 3018 3018 uint8_t idMmio2 = pVM->pgm.s.cMmio2Regions + 1; 3019 3019 unsigned cNewMmio2Regions = pVM->pgm.s.cMmio2Regions + cChunks; 3020 3020 if (cNewMmio2Regions > PGM_MMIO2_MAX_RANGES) 3021 3021 { 3022 pgmUnlock(pVM);3022 PGM_UNLOCK(pVM); 3023 3023 AssertLogRelFailedReturn(VERR_PGM_TOO_MANY_MMIO2_RANGES); 3024 3024 } 3025 3025 pVM->pgm.s.cMmio2Regions = cNewMmio2Regions; 3026 pgmUnlock(pVM);3026 PGM_UNLOCK(pVM); 3027 3027 3028 3028 /* … … 3134 3134 * get properly deregistered, though it's original purpose was the wildcard iRegion. 3135 3135 */ 3136 pgmLock(pVM);3136 PGM_LOCK_VOID(pVM); 3137 3137 int rc = VINF_SUCCESS; 3138 3138 unsigned cFound = 0; … … 3248 3248 } 3249 3249 pgmPhysInvalidatePageMapTLB(pVM); 3250 pgmUnlock(pVM);3250 PGM_UNLOCK(pVM); 3251 3251 return !cFound && hMmio2 != NIL_PGMMMIO2HANDLE ? VERR_NOT_FOUND : rc; 3252 3252 } … … 3310 3310 * ram ranges). 3311 3311 */ 3312 pgmLock(pVM);3313 3314 AssertReturnStmt(!(pFirstMmio->fFlags & PGMREGMMIO2RANGE_F_MAPPED), pgmUnlock(pVM), VERR_WRONG_ORDER);3312 PGM_LOCK_VOID(pVM); 3313 3314 AssertReturnStmt(!(pFirstMmio->fFlags & PGMREGMMIO2RANGE_F_MAPPED), PGM_UNLOCK(pVM), VERR_WRONG_ORDER); 3315 3315 3316 3316 bool fRamExists = false; … … 3328 3328 GCPhys, GCPhysLast, pFirstMmio->RamRange.pszDesc, 3329 3329 pRam->GCPhys, pRam->GCPhysLast, pRam->pszDesc), 3330 pgmUnlock(pVM),3330 PGM_UNLOCK(pVM), 3331 3331 VERR_PGM_RAM_CONFLICT); 3332 3332 … … 3339 3339 ("%RGp isn't a RAM page (%d) - mapping %RGp-%RGp (MMIO2/%s).\n", 3340 3340 GCPhys, PGM_PAGE_GET_TYPE(pPage), GCPhys, GCPhysLast, pFirstMmio->RamRange.pszDesc), 3341 pgmUnlock(pVM),3341 PGM_UNLOCK(pVM), 3342 3342 VERR_PGM_RAM_CONFLICT); 3343 3343 pPage++; … … 3348 3348 ("%RGp-%RGp (MMIOEx/%s, flags %#X) consists of multiple chunks whereas the RAM somehow doesn't!\n", 3349 3349 GCPhys, GCPhysLast, pFirstMmio->RamRange.pszDesc, pFirstMmio->fFlags), 3350 pgmUnlock(pVM),3350 PGM_UNLOCK(pVM), 3351 3351 VERR_PGM_PHYS_MMIO_EX_IPE); 3352 3352 … … 3390 3390 3391 3391 int rc = pgmR3PhysFreePageRange(pVM, pRam, GCPhys, GCPhysLast, PGMPAGETYPE_MMIO); 3392 AssertRCReturnStmt(rc, pgmUnlock(pVM), rc);3392 AssertRCReturnStmt(rc, PGM_UNLOCK(pVM), rc); 3393 3393 3394 3394 if (pFirstMmio->fFlags & PGMREGMMIO2RANGE_F_MMIO2) … … 3512 3512 } 3513 3513 3514 pgmUnlock(pVM);3514 PGM_UNLOCK(pVM); 3515 3515 return rc; 3516 3516 } … … 3539 3539 int rc = NEMR3NotifyPhysMmioExMap(pVM, GCPhys, cbRange, fNemNotify, pFirstMmio->pvR3); 3540 3540 3541 pgmUnlock(pVM);3541 PGM_UNLOCK(pVM); 3542 3542 3543 3543 return rc; … … 3570 3570 Assert(pFirstMmio->fFlags & PGMREGMMIO2RANGE_F_FIRST_CHUNK); 3571 3571 3572 int rc = pgmLock(pVM);3572 int rc = PGM_LOCK(pVM); 3573 3573 AssertRCReturn(rc, rc); 3574 3574 … … 3577 3577 for (;;) 3578 3578 { 3579 AssertReturnStmt(pLastMmio->fFlags & PGMREGMMIO2RANGE_F_MAPPED, pgmUnlock(pVM), VERR_WRONG_ORDER);3580 AssertReturnStmt(pLastMmio->RamRange.GCPhys == GCPhys + cbRange || GCPhys == NIL_RTGCPHYS, pgmUnlock(pVM), VERR_INVALID_PARAMETER);3579 AssertReturnStmt(pLastMmio->fFlags & PGMREGMMIO2RANGE_F_MAPPED, PGM_UNLOCK(pVM), VERR_WRONG_ORDER); 3580 AssertReturnStmt(pLastMmio->RamRange.GCPhys == GCPhys + cbRange || GCPhys == NIL_RTGCPHYS, PGM_UNLOCK(pVM), VERR_INVALID_PARAMETER); 3581 3581 Assert(pLastMmio->pDevInsR3 == pFirstMmio->pDevInsR3); 3582 3582 Assert(pLastMmio->iSubDev == pFirstMmio->iSubDev); … … 3592 3592 3593 3593 uint16_t const fOldFlags = pFirstMmio->fFlags; 3594 AssertReturnStmt(fOldFlags & PGMREGMMIO2RANGE_F_MAPPED, pgmUnlock(pVM), VERR_WRONG_ORDER);3594 AssertReturnStmt(fOldFlags & PGMREGMMIO2RANGE_F_MAPPED, PGM_UNLOCK(pVM), VERR_WRONG_ORDER); 3595 3595 3596 3596 /* … … 3603 3603 PPGMREGMMIO2RANGE pCurMmio = pFirstMmio; 3604 3604 rc = pgmHandlerPhysicalExDeregister(pVM, pFirstMmio->pPhysHandlerR3, RT_BOOL(fOldFlags & PGMREGMMIO2RANGE_F_OVERLAPPING)); 3605 AssertRCReturnStmt(rc, pgmUnlock(pVM), rc);3605 AssertRCReturnStmt(rc, PGM_UNLOCK(pVM), rc); 3606 3606 while (!(pCurMmio->fFlags & PGMREGMMIO2RANGE_F_LAST_CHUNK)) 3607 3607 { 3608 3608 pCurMmio = pCurMmio->pNextR3; 3609 3609 rc = pgmHandlerPhysicalExDeregister(pVM, pCurMmio->pPhysHandlerR3, RT_BOOL(fOldFlags & PGMREGMMIO2RANGE_F_OVERLAPPING)); 3610 AssertRCReturnStmt(rc, pgmUnlock(pVM), VERR_PGM_PHYS_MMIO_EX_IPE);3610 AssertRCReturnStmt(rc, PGM_UNLOCK(pVM), VERR_PGM_PHYS_MMIO_EX_IPE); 3611 3611 } 3612 3612 } … … 3686 3686 rc = NEMR3NotifyPhysMmioExUnmap(pVM, GCPhysRangeNotify, cbRange, fNemFlags); 3687 3687 3688 pgmUnlock(pVM);3688 PGM_UNLOCK(pVM); 3689 3689 return rc; 3690 3690 } … … 3723 3723 VERR_VM_INVALID_VM_STATE); 3724 3724 3725 int rc = pgmLock(pVM);3725 int rc = PGM_LOCK(pVM); 3726 3726 AssertRCReturn(rc, rc); 3727 3727 … … 3762 3762 rc = VERR_NOT_FOUND; 3763 3763 3764 pgmUnlock(pVM);3764 PGM_UNLOCK(pVM); 3765 3765 return rc; 3766 3766 } … … 3786 3786 * Just do this the simple way. No need for locking as this is only taken at 3787 3787 */ 3788 pgmLock(pVM);3788 PGM_LOCK_VOID(pVM); 3789 3789 PPGMREGMMIO2RANGE pFirstMmio = pgmR3PhysMmio2Find(pVM, pDevIns, UINT32_MAX, UINT32_MAX, hMmio2); 3790 pgmUnlock(pVM);3790 PGM_UNLOCK(pVM); 3791 3791 AssertReturn(pFirstMmio, VERR_INVALID_HANDLE); 3792 3792 AssertReturn(pFirstMmio->fFlags & PGMREGMMIO2RANGE_F_MMIO2, VERR_INVALID_HANDLE); … … 3822 3822 AssertReturn(iRegion <= UINT8_MAX, VERR_INVALID_PARAMETER); 3823 3823 3824 pgmLock(pVM);3824 PGM_LOCK_VOID(pVM); 3825 3825 PPGMREGMMIO2RANGE pCurMmio = pgmR3PhysMmio2Find(pVM, pDevIns, iSubDev, iRegion, NIL_PGMMMIO2HANDLE); 3826 3826 AssertReturn(pCurMmio, VERR_NOT_FOUND); … … 3837 3837 PCPGMPAGE pPage = &pCurMmio->RamRange.aPages[off >> PAGE_SHIFT]; 3838 3838 *pHCPhys = PGM_PAGE_GET_HCPHYS(pPage); 3839 pgmUnlock(pVM);3839 PGM_UNLOCK(pVM); 3840 3840 return VINF_SUCCESS; 3841 3841 } … … 3892 3892 AssertReturn(pVM->enmVMState == VMSTATE_LOADING, VERR_INVALID_STATE); 3893 3893 3894 int rc = pgmLock(pVM);3894 int rc = PGM_LOCK(pVM); 3895 3895 AssertRCReturn(rc, rc); 3896 3896 3897 3897 PPGMREGMMIO2RANGE pFirstRegMmio = pgmR3PhysMmio2Find(pVM, pDevIns, UINT32_MAX, UINT32_MAX, hMmio2); 3898 AssertReturnStmt(pFirstRegMmio, pgmUnlock(pVM), VERR_NOT_FOUND);3898 AssertReturnStmt(pFirstRegMmio, PGM_UNLOCK(pVM), VERR_NOT_FOUND); 3899 3899 AssertReturnStmt(pgmR3PhysMmio2Find(pVM, pDevIns, pFirstRegMmio->iSubDev, iNewRegion, NIL_PGMMMIO2HANDLE) == NULL, 3900 pgmUnlock(pVM), VERR_RESOURCE_IN_USE);3900 PGM_UNLOCK(pVM), VERR_RESOURCE_IN_USE); 3901 3901 3902 3902 /* … … 3905 3905 pFirstRegMmio->iRegion = (uint8_t)iNewRegion; 3906 3906 3907 pgmUnlock(pVM);3907 PGM_UNLOCK(pVM); 3908 3908 return VINF_SUCCESS; 3909 3909 } … … 4272 4272 Log(("PGMR3PhysRomRegister: pDevIns=%p GCPhys=%RGp(-%RGp) cb=%RGp pvBinary=%p cbBinary=%#x fFlags=%#x pszDesc=%s\n", 4273 4273 pDevIns, GCPhys, GCPhys + cb, cb, pvBinary, cbBinary, fFlags, pszDesc)); 4274 pgmLock(pVM);4274 PGM_LOCK_VOID(pVM); 4275 4275 int rc = pgmR3PhysRomRegisterLocked(pVM, pDevIns, GCPhys, cb, pvBinary, cbBinary, fFlags, pszDesc); 4276 pgmUnlock(pVM);4276 PGM_UNLOCK(pVM); 4277 4277 return rc; 4278 4278 } … … 4456 4456 * Process the request. 4457 4457 */ 4458 pgmLock(pVM);4458 PGM_LOCK_VOID(pVM); 4459 4459 int rc = VINF_SUCCESS; 4460 4460 bool fFlushTLB = false; … … 4517 4517 if (RT_FAILURE(rc2)) 4518 4518 { 4519 pgmUnlock(pVM);4519 PGM_UNLOCK(pVM); 4520 4520 AssertRC(rc); 4521 4521 return rc2; … … 4527 4527 } 4528 4528 } 4529 pgmUnlock(pVM);4529 PGM_UNLOCK(pVM); 4530 4530 if (fFlushTLB) 4531 4531 PGM_INVL_ALL_VCPU_TLBS(pVM); … … 4704 4704 { 4705 4705 int rc = VINF_SUCCESS; 4706 pgmLock(pVM);4706 PGM_LOCK_VOID(pVM); 4707 4707 NOREF(pVCpu); NOREF(pvUser); 4708 4708 … … 4777 4777 } 4778 4778 } 4779 pgmUnlock(pVM);4779 PGM_UNLOCK(pVM); 4780 4780 return rc; 4781 4781 } … … 4933 4933 int rc; 4934 4934 4935 pgmLock(pVM);4935 PGM_LOCK_VOID(pVM); 4936 4936 rc = pgmR3PhysChunkMap(pVM, idChunk, &pChunk); 4937 pgmUnlock(pVM);4937 PGM_UNLOCK(pVM); 4938 4938 return rc; 4939 4939 } … … 4947 4947 VMMR3DECL(void) PGMR3PhysChunkInvalidateTLB(PVM pVM) 4948 4948 { 4949 pgmLock(pVM);4949 PGM_LOCK_VOID(pVM); 4950 4950 for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.ChunkR3Map.Tlb.aEntries); i++) 4951 4951 { … … 4955 4955 /* The page map TLB references chunks, so invalidate that one too. */ 4956 4956 pgmPhysInvalidatePageMapTLB(pVM); 4957 pgmUnlock(pVM);4957 PGM_UNLOCK(pVM); 4958 4958 } 4959 4959 … … 4975 4975 uint64_t u64TimeStamp1, u64TimeStamp2; 4976 4976 4977 pgmLock(pVM);4977 PGM_LOCK_VOID(pVM); 4978 4978 4979 4979 STAM_PROFILE_START(&pVM->pgm.s.CTX_SUFF(pStats)->StatAllocLargePage, a); … … 5072 5072 } 5073 5073 5074 pgmUnlock(pVM);5074 PGM_UNLOCK(pVM); 5075 5075 return rc; 5076 5076 #else … … 5102 5102 VMMR3DECL(int) PGMR3PhysAllocateHandyPages(PVM pVM) 5103 5103 { 5104 pgmLock(pVM);5104 PGM_LOCK_VOID(pVM); 5105 5105 5106 5106 /* … … 5251 5251 } 5252 5252 5253 pgmUnlock(pVM);5253 PGM_UNLOCK(pVM); 5254 5254 return rc; 5255 5255 } … … 5406 5406 VMMR3DECL(int) PGMR3PhysTlbGCPhys2Ptr(PVM pVM, RTGCPHYS GCPhys, bool fWritable, void **ppv) 5407 5407 { 5408 pgmLock(pVM);5408 PGM_LOCK_VOID(pVM); 5409 5409 PGM_A20_ASSERT_MASKED(VMMGetCpu(pVM), GCPhys); 5410 5410 … … 5482 5482 rc = VERR_PGM_PHYS_TLB_UNASSIGNED; 5483 5483 5484 pgmUnlock(pVM);5484 PGM_UNLOCK(pVM); 5485 5485 return rc; 5486 5486 } -
trunk/src/VBox/VMM/VMMR3/PGMPool.cpp
r86497 r90439 514 514 NOREF(pVCpu); 515 515 516 pgmLock(pVM);516 PGM_LOCK_VOID(pVM); 517 517 Log(("pgmR3PoolClearAllRendezvous: cUsedPages=%d fpvFlushRemTlb=%RTbool\n", pPool->cUsedPages, !!fpvFlushRemTlb)); 518 518 … … 729 729 VM_FF_CLEAR(pVM, VM_FF_PGM_POOL_FLUSH_PENDING); 730 730 pPool->cPresent = 0; 731 pgmUnlock(pVM);731 PGM_UNLOCK(pVM); 732 732 733 733 PGM_INVL_ALL_VCPU_TLBS(pVM); -
trunk/src/VBox/VMM/VMMR3/PGMSavedState.cpp
r86473 r90439 237 237 * Initialize the live save tracking in the ROM page descriptors. 238 238 */ 239 pgmLock(pVM);239 PGM_LOCK_VOID(pVM); 240 240 for (PPGMROMRANGE pRom = pVM->pgm.s.pRomRangesR3; pRom; pRom = pRom->pNextR3) 241 241 { … … 271 271 pVM->pgm.s.LiveSave.Rom.cDirtyPages += cPages; 272 272 } 273 pgmUnlock(pVM);273 PGM_UNLOCK(pVM); 274 274 275 275 return VINF_SUCCESS; … … 286 286 static int pgmR3SaveRomRanges(PVM pVM, PSSMHANDLE pSSM) 287 287 { 288 pgmLock(pVM);288 PGM_LOCK_VOID(pVM); 289 289 uint8_t id = 1; 290 290 for (PPGMROMRANGE pRom = pVM->pgm.s.pRomRangesR3; pRom; pRom = pRom->pNextR3, id++) … … 301 301 break; 302 302 } 303 pgmUnlock(pVM);303 PGM_UNLOCK(pVM); 304 304 return SSMR3PutU8(pSSM, UINT8_MAX); 305 305 } … … 402 402 * The shadow ROMs. 403 403 */ 404 pgmLock(pVM);404 PGM_LOCK_VOID(pVM); 405 405 for (PPGMROMRANGE pRom = pVM->pgm.s.pRomRangesR3; pRom; pRom = pRom->pNextR3) 406 406 { … … 427 427 } 428 428 } 429 pgmUnlock(pVM);429 PGM_UNLOCK(pVM); 430 430 } 431 431 … … 444 444 static int pgmR3SaveRomVirginPages(PVM pVM, PSSMHANDLE pSSM, bool fLiveSave) 445 445 { 446 pgmLock(pVM);446 PGM_LOCK_VOID(pVM); 447 447 for (PPGMROMRANGE pRom = pVM->pgm.s.pRomRangesR3; pRom; pRom = pRom->pNextR3) 448 448 { … … 473 473 else 474 474 ASMMemZeroPage(abPage); 475 pgmUnlock(pVM);475 PGM_UNLOCK(pVM); 476 476 AssertLogRelMsgRCReturn(rc, ("rc=%Rrc GCPhys=%RGp\n", rc, GCPhys), rc); 477 477 … … 491 491 492 492 /* Update state. */ 493 pgmLock(pVM);493 PGM_LOCK_VOID(pVM); 494 494 pRom->aPages[iPage].LiveSave.u8Prot = (uint8_t)enmProt; 495 495 if (fLiveSave) … … 501 501 } 502 502 } 503 pgmUnlock(pVM);503 PGM_UNLOCK(pVM); 504 504 return VINF_SUCCESS; 505 505 } … … 525 525 * ASSUMES that all the ROM ranges are mapped. 526 526 */ 527 pgmLock(pVM);527 PGM_LOCK_VOID(pVM); 528 528 for (PPGMROMRANGE pRom = pVM->pgm.s.pRomRangesR3; pRom; pRom = pRom->pNextR3) 529 529 { … … 565 565 pVM->pgm.s.LiveSave.cSavedPages++; 566 566 } 567 pgmUnlock(pVM);567 PGM_UNLOCK(pVM); 568 568 AssertLogRelMsgRCReturn(rc, ("rc=%Rrc GCPhys=%RGp\n", rc, GCPhys), rc); 569 569 … … 582 582 return rc; 583 583 584 pgmLock(pVM);584 PGM_LOCK_VOID(pVM); 585 585 iPrevPage = iPage; 586 586 } … … 593 593 PGMROMPROT enmProt = pRomPage->enmProt; 594 594 pRomPage->LiveSave.u8Prot = (uint8_t)enmProt; 595 pgmUnlock(pVM);595 PGM_UNLOCK(pVM); 596 596 597 597 if (iPage - 1U == iPrevPage && iPage > 0) … … 607 607 return rc; 608 608 609 pgmLock(pVM);609 PGM_LOCK_VOID(pVM); 610 610 iPrevPage = iPage; 611 611 } … … 613 613 } 614 614 } 615 pgmUnlock(pVM);615 PGM_UNLOCK(pVM); 616 616 return VINF_SUCCESS; 617 617 } … … 641 641 * ASSUME nothing changes here. 642 642 */ 643 pgmLock(pVM);643 PGM_LOCK_VOID(pVM); 644 644 for (PPGMREGMMIO2RANGE pRegMmio = pVM->pgm.s.pRegMmioRangesR3; pRegMmio; pRegMmio = pRegMmio->pNextR3) 645 645 { … … 647 647 { 648 648 uint32_t const cPages = pRegMmio->RamRange.cb >> PAGE_SHIFT; 649 pgmUnlock(pVM);649 PGM_UNLOCK(pVM); 650 650 651 651 PPGMLIVESAVEMMIO2PAGE paLSPages = (PPGMLIVESAVEMMIO2PAGE)MMR3HeapAllocZ(pVM, MM_TAG_PGM, sizeof(PGMLIVESAVEMMIO2PAGE) * cPages); … … 662 662 } 663 663 664 pgmLock(pVM);664 PGM_LOCK_VOID(pVM); 665 665 pRegMmio->paLSPages = paLSPages; 666 666 pVM->pgm.s.LiveSave.Mmio2.cDirtyPages += cPages; 667 667 } 668 668 } 669 pgmUnlock(pVM);669 PGM_UNLOCK(pVM); 670 670 return VINF_SUCCESS; 671 671 } … … 681 681 static int pgmR3SaveMmio2Ranges(PVM pVM, PSSMHANDLE pSSM) 682 682 { 683 pgmLock(pVM);683 PGM_LOCK_VOID(pVM); 684 684 uint8_t id = 1; 685 685 for (PPGMREGMMIO2RANGE pRegMmio = pVM->pgm.s.pRegMmioRangesR3; pRegMmio; pRegMmio = pRegMmio->pNextR3) … … 699 699 } 700 700 } 701 pgmUnlock(pVM);701 PGM_UNLOCK(pVM); 702 702 return SSMR3PutU8(pSSM, UINT8_MAX); 703 703 } … … 883 883 return; 884 884 885 pgmLock(pVM);/* paranoia */885 PGM_LOCK_VOID(pVM); /* paranoia */ 886 886 for (PPGMREGMMIO2RANGE pRegMmio = pVM->pgm.s.pRegMmioRangesR3; pRegMmio; pRegMmio = pRegMmio->pNextR3) 887 887 if (pRegMmio->fFlags & PGMREGMMIO2RANGE_F_MMIO2) … … 889 889 PPGMLIVESAVEMMIO2PAGE paLSPages = pRegMmio->paLSPages; 890 890 uint32_t cPages = pRegMmio->RamRange.cb >> PAGE_SHIFT; 891 pgmUnlock(pVM);891 PGM_UNLOCK(pVM); 892 892 893 893 for (uint32_t iPage = 0; iPage < cPages; iPage++) … … 897 897 } 898 898 899 pgmLock(pVM);900 } 901 pgmUnlock(pVM);899 PGM_LOCK_VOID(pVM); 900 } 901 PGM_UNLOCK(pVM); 902 902 903 903 } … … 924 924 * The mop up round. 925 925 */ 926 pgmLock(pVM);926 PGM_LOCK_VOID(pVM); 927 927 for (PPGMREGMMIO2RANGE pRegMmio = pVM->pgm.s.pRegMmioRangesR3; 928 928 pRegMmio && RT_SUCCESS(rc); … … 972 972 } 973 973 } 974 pgmUnlock(pVM);974 PGM_UNLOCK(pVM); 975 975 } 976 976 /* … … 982 982 || (uPass & 3) == 2) 983 983 { 984 pgmLock(pVM);984 PGM_LOCK_VOID(pVM); 985 985 for (PPGMREGMMIO2RANGE pRegMmio = pVM->pgm.s.pRegMmioRangesR3; 986 986 pRegMmio && RT_SUCCESS(rc); … … 992 992 uint32_t cPages = pRegMmio->RamRange.cb >> PAGE_SHIFT; 993 993 uint32_t iPageLast = cPages; 994 pgmUnlock(pVM);994 PGM_UNLOCK(pVM); 995 995 996 996 for (uint32_t iPage = 0; iPage < cPages; iPage++, pbPage += PAGE_SIZE) … … 1037 1037 } 1038 1038 1039 pgmLock(pVM);1040 } 1041 pgmUnlock(pVM);1039 PGM_LOCK_VOID(pVM); 1040 } 1041 PGM_UNLOCK(pVM); 1042 1042 } 1043 1043 … … 1057 1057 * We do the freeing outside the lock in case the VM is running. 1058 1058 */ 1059 pgmLock(pVM);1059 PGM_LOCK_VOID(pVM); 1060 1060 for (PPGMREGMMIO2RANGE pRegMmio = pVM->pgm.s.pRegMmioRangesR3; pRegMmio; pRegMmio = pRegMmio->pNextR3) 1061 1061 if (pRegMmio->fFlags & PGMREGMMIO2RANGE_F_MMIO2) … … 1065 1065 { 1066 1066 pRegMmio->paLSPages = NULL; 1067 pgmUnlock(pVM);1067 PGM_UNLOCK(pVM); 1068 1068 MMR3HeapFree(pvMmio2ToFree); 1069 pgmLock(pVM);1070 } 1071 } 1072 pgmUnlock(pVM);1069 PGM_LOCK_VOID(pVM); 1070 } 1071 } 1072 PGM_UNLOCK(pVM); 1073 1073 } 1074 1074 … … 1094 1094 */ 1095 1095 PPGMRAMRANGE pCur; 1096 pgmLock(pVM);1096 PGM_LOCK_VOID(pVM); 1097 1097 do 1098 1098 { … … 1104 1104 uint32_t const idRamRangesGen = pVM->pgm.s.idRamRangesGen; 1105 1105 uint32_t const cPages = pCur->cb >> PAGE_SHIFT; 1106 pgmUnlock(pVM);1106 PGM_UNLOCK(pVM); 1107 1107 PPGMLIVESAVERAMPAGE paLSPages = (PPGMLIVESAVERAMPAGE)MMR3HeapAllocZ(pVM, MM_TAG_PGM, cPages * sizeof(PGMLIVESAVERAMPAGE)); 1108 1108 if (!paLSPages) 1109 1109 return VERR_NO_MEMORY; 1110 pgmLock(pVM);1110 PGM_LOCK_VOID(pVM); 1111 1111 if (pVM->pgm.s.idRamRangesGen != idRamRangesGen) 1112 1112 { 1113 pgmUnlock(pVM);1113 PGM_UNLOCK(pVM); 1114 1114 MMR3HeapFree(paLSPages); 1115 pgmLock(pVM);1115 PGM_LOCK_VOID(pVM); 1116 1116 break; /* try again */ 1117 1117 } … … 1208 1208 } 1209 1209 } while (pCur); 1210 pgmUnlock(pVM);1210 PGM_UNLOCK(pVM); 1211 1211 1212 1212 return VINF_SUCCESS; … … 1359 1359 RTGCPHYS GCPhysCur = 0; 1360 1360 PPGMRAMRANGE pCur; 1361 pgmLock(pVM);1361 PGM_LOCK_VOID(pVM); 1362 1362 do 1363 1363 { … … 1549 1549 } /* for each range */ 1550 1550 } while (pCur); 1551 pgmUnlock(pVM);1551 PGM_UNLOCK(pVM); 1552 1552 } 1553 1553 … … 1573 1573 PPGMRAMRANGE pCur; 1574 1574 1575 pgmLock(pVM);1575 PGM_LOCK_VOID(pVM); 1576 1576 do 1577 1577 { … … 1668 1668 pgmPhysReleaseInternalPageMappingLock(pVM, &PgMpLck); 1669 1669 } 1670 pgmUnlock(pVM);1670 PGM_UNLOCK(pVM); 1671 1671 AssertLogRelMsgRCReturn(rc, ("rc=%Rrc GCPhys=%RGp\n", rc, GCPhys), rc); 1672 1672 … … 1703 1703 pgmR3StateVerifyCrc32ForRamPage(pVM, pCur, paLSPages, iPage, "save#2"); 1704 1704 #endif 1705 pgmUnlock(pVM);1705 PGM_UNLOCK(pVM); 1706 1706 1707 1707 uint8_t u8RecType = fBallooned ? PGM_STATE_REC_RAM_BALLOONED : PGM_STATE_REC_RAM_ZERO; … … 1717 1717 return rc; 1718 1718 1719 pgmLock(pVM);1719 PGM_LOCK_VOID(pVM); 1720 1720 if (!fSkipped) 1721 1721 GCPhysLast = GCPhys; … … 1744 1744 } while (pCur); 1745 1745 1746 pgmUnlock(pVM);1746 PGM_UNLOCK(pVM); 1747 1747 1748 1748 return VINF_SUCCESS; … … 1768 1768 PPGMRAMRANGE pCur; 1769 1769 uint32_t cMonitoredPages = 0; 1770 pgmLock(pVM);1770 PGM_LOCK_VOID(pVM); 1771 1771 do 1772 1772 { … … 1778 1778 { 1779 1779 uint32_t idRamRangesGen = pVM->pgm.s.idRamRangesGen; 1780 pgmUnlock(pVM);1780 PGM_UNLOCK(pVM); 1781 1781 MMR3HeapFree(pvToFree); 1782 1782 pvToFree = NULL; 1783 pgmLock(pVM);1783 PGM_LOCK_VOID(pVM); 1784 1784 if (idRamRangesGen != pVM->pgm.s.idRamRangesGen) 1785 1785 break; /* start over again. */ … … 1810 1810 pVM->pgm.s.cMonitoredPages -= cMonitoredPages; 1811 1811 1812 pgmUnlock(pVM);1812 PGM_UNLOCK(pVM); 1813 1813 1814 1814 MMR3HeapFree(pvToFree); … … 1887 1887 1888 1888 /* update history. */ 1889 pgmLock(pVM);1889 PGM_LOCK_VOID(pVM); 1890 1890 uint32_t const cWrittenToPages = pVM->pgm.s.cWrittenToPages; 1891 pgmUnlock(pVM);1891 PGM_UNLOCK(pVM); 1892 1892 uint32_t const cDirtyNow = pVM->pgm.s.LiveSave.Rom.cDirtyPages 1893 1893 + pVM->pgm.s.LiveSave.Mmio2.cDirtyPages … … 1991 1991 * Indicate that we will be using the write monitoring. 1992 1992 */ 1993 pgmLock(pVM);1993 PGM_LOCK_VOID(pVM); 1994 1994 /** @todo find a way of mediating this when more users are added. */ 1995 1995 if (pVM->pgm.s.fPhysWriteMonitoringEngaged) 1996 1996 { 1997 pgmUnlock(pVM);1997 PGM_UNLOCK(pVM); 1998 1998 AssertLogRelFailedReturn(VERR_PGM_WRITE_MONITOR_ENGAGED); 1999 1999 } 2000 2000 pVM->pgm.s.fPhysWriteMonitoringEngaged = true; 2001 pgmUnlock(pVM);2001 PGM_UNLOCK(pVM); 2002 2002 2003 2003 /* … … 2044 2044 * Lock PGM and set the no-more-writes indicator. 2045 2045 */ 2046 pgmLock(pVM);2046 PGM_LOCK_VOID(pVM); 2047 2047 pVM->pgm.s.fNoMorePhysWrites = true; 2048 2048 … … 2094 2094 } 2095 2095 2096 pgmUnlock(pVM);2096 PGM_UNLOCK(pVM); 2097 2097 return rc; 2098 2098 } … … 2117 2117 * Clear the live save indicator and disengage write monitoring. 2118 2118 */ 2119 pgmLock(pVM);2119 PGM_LOCK_VOID(pVM); 2120 2120 pVM->pgm.s.LiveSave.fActive = false; 2121 2121 /** @todo this is blindly assuming that we're the only user of write 2122 2122 * monitoring. Fix this when more users are added. */ 2123 2123 pVM->pgm.s.fPhysWriteMonitoringEngaged = false; 2124 pgmUnlock(pVM);2124 PGM_UNLOCK(pVM); 2125 2125 2126 2126 NOREF(pSSM); … … 3148 3148 if (uPass != SSM_PASS_FINAL) 3149 3149 { 3150 pgmLock(pVM);3150 PGM_LOCK_VOID(pVM); 3151 3151 if (uPass != 0) 3152 3152 rc = pgmR3LoadMemory(pVM, pSSM, uVersion, uPass); … … 3165 3165 rc = pgmR3LoadMemory(pVM, pSSM, uVersion, uPass); 3166 3166 } 3167 pgmUnlock(pVM);3167 PGM_UNLOCK(pVM); 3168 3168 } 3169 3169 else 3170 3170 { 3171 pgmLock(pVM);3171 PGM_LOCK_VOID(pVM); 3172 3172 rc = pgmR3LoadFinalLocked(pVM, pSSM, uVersion); 3173 3173 pVM->pgm.s.LiveSave.fActive = false; 3174 pgmUnlock(pVM);3174 PGM_UNLOCK(pVM); 3175 3175 if (RT_SUCCESS(rc)) 3176 3176 { -
trunk/src/VBox/VMM/VMMR3/PGMSharedPage.cpp
r86473 r90439 232 232 LogFlow(("pgmR3SharedModuleRegRendezvous: start (%d)\n", pVM->pgm.s.cSharedPages)); 233 233 234 pgmLock(pVM);234 PGM_LOCK_VOID(pVM); 235 235 pgmR3PhysAssertSharedPageChecksums(pVM); 236 236 rc = GMMR3CheckSharedModules(pVM); 237 237 pgmR3PhysAssertSharedPageChecksums(pVM); 238 pgmUnlock(pVM);238 PGM_UNLOCK(pVM); 239 239 AssertLogRelRC(rc); 240 240 … … 291 291 uint64_t fFlags; 292 292 293 pgmLock(pVM);293 PGM_LOCK_VOID(pVM); 294 294 295 295 int rc = PGMGstGetPage(VMMGetCpu(pVM), GCPtrPage, &fFlags, &GCPhys); … … 322 322 } 323 323 324 pgmUnlock(pVM);324 PGM_UNLOCK(pVM); 325 325 return rc; 326 326 } … … 345 345 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE); 346 346 347 pgmLock(pVM);347 PGM_LOCK_VOID(pVM); 348 348 349 349 for (PPGMRAMRANGE pRam = pVM->pgm.s.pRamRangesXR3; pRam; pRam = pRam->pNextR3) … … 404 404 } 405 405 } 406 pgmUnlock(pVM);406 PGM_UNLOCK(pVM); 407 407 408 408 pCmdHlp->pfnPrintf(pCmdHlp, NULL, "\nNumber of zero pages %08x (%d MB)\n", cZero, cZero / 256); … … 425 425 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE); 426 426 427 pgmLock(pVM);427 PGM_LOCK_VOID(pVM); 428 428 for (unsigned i = 0; i < RT_ELEMENTS(g_apSharedModules); i++) 429 429 { … … 435 435 } 436 436 } 437 pgmUnlock(pVM);437 PGM_UNLOCK(pVM); 438 438 439 439 return VINF_SUCCESS; -
trunk/src/VBox/VMM/include/PGMInternal.h
r90346 r90439 3897 3897 RT_C_DECLS_BEGIN 3898 3898 3899 #if defined(VBOX_STRICT) && defined(IN_RING3) 3900 int pgmLockDebug(PVMCC pVM, RT_SRC_POS_DECL); 3901 # define pgmLock(a_pVM) pgmLockDebug(a_pVM, RT_SRC_POS) 3899 #if defined(VBOX_STRICT) 3900 int pgmLockDebug(PVMCC pVM, bool fVoid, RT_SRC_POS_DECL); 3901 # define PGM_LOCK_VOID(a_pVM) pgmLockDebug((a_pVM), true, RT_SRC_POS) 3902 # define PGM_LOCK(a_pVM) pgmLockDebug((a_pVM), false, RT_SRC_POS) 3902 3903 #else 3903 int pgmLock(PVMCC pVM); 3904 int pgmLock(PVMCC pVM, bool fVoid); 3905 # define PGM_LOCK_VOID(a_pVM) pgmLock((a_pVM), true) 3906 # define PGM_LOCK(a_pVM) pgmLock((a_pVM), false) 3904 3907 #endif 3905 3908 void pgmUnlock(PVMCC pVM); 3909 # define PGM_UNLOCK(a_pVM) pgmUnlock((a_pVM)) 3906 3910 /** 3907 3911 * Asserts that the caller owns the PDM lock.
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