Changeset 90447 in vbox
- Timestamp:
- Jul 31, 2021 12:44:13 AM (4 years ago)
- svn:sync-xref-src-repo-rev:
- 146051
- Location:
- trunk/src/VBox
- Files:
-
- 24 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Audio/DevHda.cpp
r90331 r90447 83 83 #define DEVHDA_LOCK(a_pDevIns, a_pThis) \ 84 84 do { \ 85 int rcLock = PDMDevHlpCritSectEnter((a_pDevIns), &(a_pThis)->CritSect, VERR_IGNORED); \86 AssertRC(rcLock); \85 int const rcLock = PDMDevHlpCritSectEnter((a_pDevIns), &(a_pThis)->CritSect, VERR_IGNORED); \ 86 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV((a_pDevIns), &(a_pThis)->CritSect, rcLock); \ 87 87 } while (0) 88 88 … … 92 92 #define DEVHDA_LOCK_RETURN(a_pDevIns, a_pThis, a_rcBusy) \ 93 93 do { \ 94 int rcLock = PDMDevHlpCritSectEnter((a_pDevIns), &(a_pThis)->CritSect, a_rcBusy); \94 int const rcLock = PDMDevHlpCritSectEnter((a_pDevIns), &(a_pThis)->CritSect, a_rcBusy); \ 95 95 if (rcLock == VINF_SUCCESS) \ 96 96 { /* likely */ } \ … … 107 107 # define DEVHDA_LOCK_RETURN_VOID(a_pDevIns, a_pThis) \ 108 108 do { \ 109 int rcLock = PDMDevHlpCritSectEnter((a_pDevIns), &(a_pThis)->CritSect, VERR_IGNORED); \109 int const rcLock = PDMDevHlpCritSectEnter((a_pDevIns), &(a_pThis)->CritSect, VERR_IGNORED); \ 110 110 if (rcLock == VINF_SUCCESS) \ 111 111 { /* likely */ } \ 112 112 else \ 113 113 { \ 114 AssertRC(rcLock); \114 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV((a_pDevIns), &(a_pThis)->CritSect, rcLock); \ 115 115 return; \ 116 116 } \ … … 4081 4081 RT_ZERO(StreamDummyShared); RT_ZERO(StreamDummyR3)); 4082 4082 4083 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); /* timer code requires this */ 4083 rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); /* timer code requires this */ 4084 AssertRCReturn(rc, rc); 4084 4085 rc = hdaR3StreamSetUp(pDevIns, pThis, pStreamShared, pStreamR3, idStream); 4085 4086 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); … … 4753 4754 4754 4755 if (PDMDevHlpCritSectIsInitialized(pDevIns, &pThis->CritSect)) 4755 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED);4756 (void)PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 4756 4757 4757 4758 PHDADRIVER pDrv; -
trunk/src/VBox/Devices/Audio/DevIchAc97.cpp
r90247 r90447 640 640 #define DEVAC97_LOCK(a_pDevIns, a_pThis) \ 641 641 do { \ 642 int rcLock = PDMDevHlpCritSectEnter((a_pDevIns), &(a_pThis)->CritSect, VERR_IGNORED); \643 AssertRC(rcLock); \642 int const rcLock = PDMDevHlpCritSectEnter((a_pDevIns), &(a_pThis)->CritSect, VERR_IGNORED); \ 643 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV((a_pDevIns), &(a_pThis)->CritSect, rcLock); \ 644 644 } while (0) 645 645 … … 651 651 int rcLock = PDMDevHlpCritSectEnter((a_pDevIns), &(a_pThis)->CritSect, a_rcBusy); \ 652 652 if (rcLock == VINF_SUCCESS) \ 653 break; \ 654 AssertRC(rcLock); \ 655 return rcLock; \ 653 { /* likely */ } \ 654 else \ 655 { \ 656 AssertRC(rcLock); \ 657 return rcLock; \ 658 } \ 656 659 } while (0) 657 660 -
trunk/src/VBox/Devices/EFI/DevEFI.cpp
r85950 r90447 1138 1138 RT_NOREF(pszArgs); 1139 1139 PDEVEFIR3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PDEVEFIR3); 1140 PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 1140 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 1141 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock); \ 1141 1142 1142 1143 pHlp->pfnPrintf(pHlp, "NVRAM variables: %u\n", pThisCC->NVRAM.cVariables); -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp
r90323 r90447 1251 1251 RT_NOREF(pDevIns); 1252 1252 break; 1253 #else 1253 #else /* IN_RING3 */ 1254 1254 # if defined(VMSVGA_USE_EMT_HALT_CODE) 1255 1255 /* The guest is basically doing a HLT via the device here, but with … … 1265 1265 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); /* hack around lock order issue. */ 1266 1266 rc = VMR3WaitForDeviceReady(pVM, idCpu); 1267 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1267 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1268 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rcLock); 1268 1269 } 1269 1270 ASMAtomicDecU32(&pSVGAState->cBusyDelayedEmts); … … 1301 1302 # endif 1302 1303 *pu32 = pThis->svga.fBusy != 0; 1303 #endif 1304 #endif /* IN_RING3 */ 1304 1305 } 1305 1306 else … … 2962 2963 static void vmsvgaR3CmdBufRaiseIRQ(PPDMDEVINS pDevIns, PVGASTATE pThis, uint32_t u32IrqStatus) 2963 2964 { 2964 int rc= PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED);2965 AssertRC(rc);2965 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 2966 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rcLock); 2966 2967 2967 2968 if (pThis->svga.u32IrqMask & u32IrqStatus) … … 5047 5048 || (pThis->svga.u32IrqMask & SVGA_IRQFLAG_FIFO_PROGRESS)) 5048 5049 { 5049 int rc2= PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED);5050 AssertRC(rc2);5050 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 5051 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rcLock); 5051 5052 5052 5053 /* FIFO progress might trigger an interrupt. */ -
trunk/src/VBox/Devices/Graphics/DevVGA.cpp
r90200 r90447 3147 3147 if (u32 == HGSMIOFFSET_VOID) 3148 3148 { 3149 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSectIRQ, VERR_SEM_BUSY); 3149 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSectIRQ, VERR_SEM_BUSY); 3150 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSectIRQ, rcLock); 3150 3151 3151 3152 if (pThis->fu32PendingGuestFlags == 0) … … 4759 4760 4760 4761 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 4761 AssertRC (rc);4762 AssertRCReturn(rc, rc); 4762 4763 4763 4764 # ifdef VBOX_WITH_VMSVGA … … 4844 4845 4845 4846 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 4846 AssertRC (rc);4847 AssertRCReturn(rc, rc); 4847 4848 4848 4849 rc = vboxR3UpdateDisplayAllInternal(pDevIns, pThis, pThisCC, fFailOnResize); … … 5032 5033 5033 5034 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 5034 AssertRC (rc);5035 AssertRCReturn(rc, rc); 5035 5036 5036 5037 /* … … 5129 5130 5130 5131 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 5131 AssertRC(rc);5132 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rc); 5132 5133 5133 5134 /* Check if there is something to do at all. */ … … 5340 5341 5341 5342 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 5342 AssertRC (rc);5343 AssertRCReturn(rc, rc); 5343 5344 5344 5345 /* This method only works if the VGA device is in a VBE mode or not paused VBVA mode. … … 5430 5431 LogFlow(("vgaR3PortSetRenderVRAM: fRender = %d\n", fRender)); 5431 5432 5432 int rc= PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY);5433 AssertRC(rc);5433 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 5434 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rcLock); 5434 5435 5435 5436 pThis->fRenderVRAM = fRender; … … 6071 6072 { 6072 6073 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); /* hack around lock order issue. */ 6074 6073 6075 pThisCC->pDrv->pfnReset(pThisCC->pDrv); 6074 6076 pThisCC->pDrv->pfnVBVAMousePointerShape(pThisCC->pDrv, false, false, 0, 0, 0, 0, NULL); 6075 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 6077 6078 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 6079 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rcLock); 6076 6080 } 6077 6081 -
trunk/src/VBox/Devices/Graphics/DevVGA_VBVA.cpp
r85121 r90447 904 904 return; 905 905 906 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 906 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 907 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rcLock); 907 908 908 909 VBOX_VHWA_PENDINGCMD *pIter, *pNext; … … 926 927 return; 927 928 928 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 929 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 930 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rcLock); 929 931 930 932 VBOX_VHWA_PENDINGCMD *pIter, *pNext; … … 951 953 pCommand->Flags |= VBOXVHWACMD_FLAG_HG_ASYNCH; 952 954 pPend->pCommand = pCommand; 953 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 955 956 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 957 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rcLock); 958 954 959 if (ASMAtomicUoReadU32(&pThis->pendingVhwaCommands.cPending) < VBOX_VHWA_MAX_PENDING_COMMANDS) 955 960 { … … 1108 1113 return true; 1109 1114 1110 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 1115 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 1116 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rcLock); 1111 1117 1112 1118 VBOX_VHWA_PENDINGCMD *pIter, *pNext; … … 2110 2116 void VBVARaiseIrq(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t fFlags) 2111 2117 { 2112 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSectIRQ, VERR_SEM_BUSY); 2118 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSectIRQ, VERR_SEM_BUSY); 2119 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSectIRQ, rcLock); 2113 2120 2114 2121 const uint32_t fu32CurrentGuestFlags = HGSMIGetHostGuestFlags(pThisCC->pHGSMI); … … 2137 2144 void VBVAOnResume(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC) 2138 2145 { 2139 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSectIRQ, VERR_SEM_BUSY); 2146 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSectIRQ, VERR_SEM_BUSY); 2147 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSectIRQ, rcLock); 2140 2148 2141 2149 if (HGSMIGetHostGuestFlags(pThisCC->pHGSMI) & HGSMIHOSTFLAGS_IRQ) … … 2810 2818 PVGASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PVGASTATE); 2811 2819 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 2812 AssertRC (rc);2820 AssertRCReturn(rc, rc); 2813 2821 2814 2822 rc = vbvaSendModeHintWorker(pDevIns, pThis, pThisCC, cx, cy, cBPP, iDisplay, dx, dy, fEnabled, fNotifyGuest); -
trunk/src/VBox/Devices/Input/DevPS2K.cpp
r90303 r90447 1046 1046 1047 1047 /* Grab the lock to avoid races with event delivery or EMTs. */ 1048 int rc= PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_SEM_BUSY);1049 AssertReleaseRC(rc);1048 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_SEM_BUSY); 1049 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock); 1050 1050 1051 1051 /* If data is available, poke the KBC. Once the data … … 1222 1222 PPDMDEVINS pDevIns = pThisCC->pDevIns; 1223 1223 PPS2K pThis = &PDMDEVINS_2_DATA(pDevIns, PKBDSTATE)->Kbd; 1224 int rc;1225 1224 1226 1225 LogRelFlowFunc(("key code %08X\n", idUsage)); 1227 1226 1228 rc= PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_SEM_BUSY);1229 AssertReleaseRC(rc);1227 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_SEM_BUSY); 1228 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock); 1230 1229 1231 1230 /* The 'BAT fail' scancode is reused as a signal to release keys. No actual -
trunk/src/VBox/Devices/Input/DevPS2M.cpp
r90198 r90447 873 873 PPDMDEVINS pDevIns = pThisCC->pDevIns; 874 874 PPS2M pThis = &PDMDEVINS_2_DATA(pDevIns, PKBDSTATE)->Aux; 875 int rc= PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_SEM_BUSY);876 AssertReleaseRC(rc);875 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_SEM_BUSY); 876 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock); 877 877 878 878 LogRelFlowFunc(("dX=%d dY=%d dZ=%d dW=%d buttons=%02X\n", dx, dy, dz, dw, fButtons)); -
trunk/src/VBox/Devices/Network/DevE1000.cpp
r90332 r90447 1657 1657 #endif /* IN_RING3 */ 1658 1658 1659 #define e1kCsEnter(ps, rc) PDMDevHlpCritSectEnter(pDevIns, &ps->cs, rc) 1660 #define e1kCsLeave(ps) PDMDevHlpCritSectLeave(pDevIns, &ps->cs) 1661 1662 #define e1kCsRxEnter(ps, rc) PDMDevHlpCritSectEnter(pDevIns, &ps->csRx, rc) 1663 #define e1kCsRxLeave(ps) PDMDevHlpCritSectLeave(pDevIns, &ps->csRx) 1664 #define e1kCsRxIsOwner(ps) PDMDevHlpCritSectIsOwner(pDevIns, &ps->csRx) 1659 1660 #define e1kCsEnter(ps, rcBusy) PDMDevHlpCritSectEnter(pDevIns, &(ps)->cs, (rcBusy)) 1661 #define e1kCsEnterReturn(ps, rcBusy) do { \ 1662 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &(ps)->cs, (rcBusy)); \ 1663 if (rcLock == VINF_SUCCESS) { /* likely */ } \ 1664 else return rcLock; \ 1665 } while (0) 1666 #define e1kR3CsEnterAsserted(ps) do { \ 1667 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &(ps)->cs, VERR_SEM_BUSY); \ 1668 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &(ps)->cs, rcLock); \ 1669 } while (0) 1670 #define e1kCsLeave(ps) PDMDevHlpCritSectLeave(pDevIns, &(ps)->cs) 1671 1672 1673 #define e1kCsRxEnter(ps, rcBusy) PDMDevHlpCritSectEnter(pDevIns, &(ps)->csRx, (rcBusy)) 1674 #define e1kCsRxEnterReturn(ps) do { \ 1675 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &(ps)->csRx, VERR_SEM_BUSY); \ 1676 AssertRCReturn(rcLock, rcLock); \ 1677 } while (0) 1678 #define e1kR3CsRxEnterAsserted(ps) do { \ 1679 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &(ps)->csRx, VERR_SEM_BUSY); \ 1680 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &(ps)->csRx, rcLock); \ 1681 } while (0) 1682 #define e1kCsRxLeave(ps) PDMDevHlpCritSectLeave(pDevIns, &(ps)->csRx) 1683 #define e1kCsRxIsOwner(ps) PDMDevHlpCritSectIsOwner(pDevIns, &(ps)->csRx) 1684 1665 1685 1666 1686 #ifndef E1K_WITH_TX_CS 1667 # define e1kCsTxEnter(ps, rc) VINF_SUCCESS 1687 # define e1kCsTxEnter(ps, rcBusy) VINF_SUCCESS 1688 # define e1kR3CsTxEnterAsserted(ps) do { } while (0) 1668 1689 # define e1kCsTxLeave(ps) do { } while (0) 1669 1690 #else /* E1K_WITH_TX_CS */ 1670 # define e1kCsTxEnter(ps, rc) PDMDevHlpCritSectEnter(pDevIns, &ps->csTx, rc) 1671 # define e1kCsTxLeave(ps) PDMDevHlpCritSectLeave(pDevIns, &ps->csTx) 1672 # define e1kCsTxIsOwner(ps) PDMDevHlpCritSectIsOwner(pDevIns, &ps->csTx) 1691 # define e1kCsTxEnter(ps, rcBusy) PDMDevHlpCritSectEnter(pDevIns, &(ps)->csTx, (rcBusy)) 1692 # define e1kR3CsTxEnterAsserted(ps) do { \ 1693 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &(ps)->csTx, VERR_SEM_BUSY); \ 1694 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &(ps)->csTx, rcLock); \ 1695 } while (0) 1696 # define e1kCsTxLeave(ps) PDMDevHlpCritSectLeave(pDevIns, &(ps)->csTx) 1697 # define e1kCsTxIsOwner(ps) PDMDevHlpCritSectIsOwner(pDevIns, &(ps)->csTx) 1673 1698 #endif /* E1K_WITH_TX_CS */ 1674 1699 … … 1799 1824 memset(pThis->auRegs, 0, sizeof(pThis->auRegs)); 1800 1825 memset(pThis->aRecAddr.au32, 0, sizeof(pThis->aRecAddr.au32)); 1801 # ifdef E1K_INIT_RA01826 # ifdef E1K_INIT_RA0 1802 1827 memcpy(pThis->aRecAddr.au32, pThis->macConfigured.au8, 1803 1828 sizeof(pThis->macConfigured.au8)); 1804 1829 pThis->aRecAddr.array[0].ctl |= RA_CTL_AV; 1805 # endif /* E1K_INIT_RA0 */1830 # endif /* E1K_INIT_RA0 */ 1806 1831 STATUS = 0x0081; /* SPEED=10b (1000 Mb/s), FD=1b (Full Duplex) */ 1807 1832 EECD = 0x0100; /* EE_PRES=1b (EEPROM present) */ … … 1819 1844 pThisCC->pDrvR3->pfnSetPromiscuousMode(pThisCC->pDrvR3, false); 1820 1845 1821 #ifdef E1K_WITH_TXD_CACHE 1822 int rc = e1kCsTxEnter(pThis, VERR_SEM_BUSY); 1823 if (RT_LIKELY(rc == VINF_SUCCESS)) 1824 { 1825 pThis->nTxDFetched = 0; 1826 pThis->iTxDCurrent = 0; 1827 pThis->fGSO = false; 1828 pThis->cbTxAlloc = 0; 1829 e1kCsTxLeave(pThis); 1830 } 1831 #endif /* E1K_WITH_TXD_CACHE */ 1832 #ifdef E1K_WITH_RXD_CACHE 1833 if (RT_LIKELY(e1kCsRxEnter(pThis, VERR_SEM_BUSY) == VINF_SUCCESS)) 1834 { 1835 pThis->iRxDCurrent = pThis->nRxDFetched = 0; 1836 e1kCsRxLeave(pThis); 1837 } 1838 #endif /* E1K_WITH_RXD_CACHE */ 1839 #ifdef E1K_LSC_ON_RESET 1846 # ifdef E1K_WITH_TXD_CACHE 1847 e1kR3CsTxEnterAsserted(pThis); 1848 pThis->nTxDFetched = 0; 1849 pThis->iTxDCurrent = 0; 1850 pThis->fGSO = false; 1851 pThis->cbTxAlloc = 0; 1852 e1kCsTxLeave(pThis); 1853 # endif /* E1K_WITH_TXD_CACHE */ 1854 # ifdef E1K_WITH_RXD_CACHE 1855 e1kR3CsRxEnterAsserted(pThis); 1856 pThis->iRxDCurrent = pThis->nRxDFetched = 0; 1857 e1kCsRxLeave(pThis); 1858 # endif /* E1K_WITH_RXD_CACHE */ 1859 # ifdef E1K_LSC_ON_RESET 1840 1860 E1kLog(("%s Will trigger LSC in %d seconds...\n", 1841 1861 pThis->szPrf, pThis->cMsLinkUpDelay / 1000)); 1842 1862 e1kArmTimer(pDevIns, pThis, pThis->hLUTimer, pThis->cMsLinkUpDelay * 1000); 1843 # endif /* E1K_LSC_ON_RESET */1863 # endif /* E1K_LSC_ON_RESET */ 1844 1864 } 1845 1865 … … 2184 2204 static int e1kRaiseInterrupt(PPDMDEVINS pDevIns, PE1KSTATE pThis, int rcBusy, uint32_t u32IntCause) 2185 2205 { 2206 /* Do NOT use e1kCsEnterReturn here as most callers doesn't check the 2207 status code. They'll pass a negative rcBusy. */ 2186 2208 int rc = e1kCsEnter(pThis, rcBusy); 2187 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 2209 if (RT_LIKELY(rc == VINF_SUCCESS)) 2210 { /* likely */ } 2211 else 2212 { 2213 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->cs, rc); 2188 2214 return rc; 2215 } 2189 2216 2190 2217 E1K_INC_ISTAT_CNT(pThis->uStatIntTry); … … 2265 2292 { 2266 2293 Assert(e1kCsRxIsOwner(pThis)); 2267 //e1k CsEnter(pThis, RT_SRC_POS);2294 //e1kR3CsEnterAsserted(pThis); 2268 2295 if (++pRxdc->rdh * sizeof(E1KRXDESC) >= pRxdc->rdlen) 2269 2296 pRxdc->rdh = 0; … … 2535 2562 * 2536 2563 * @returns VBox status code. 2537 * @param pDevIns The device instance.2538 * @param pThis The device state structure.2564 * @param pDevIns The device instance. 2565 * @param pThis The device state structure. 2539 2566 * @param pvBuf The available data. 2540 2567 * @param cb Number of bytes available in the buffer. … … 2550 2577 # endif /* E1K_WITH_RXD_CACHE */ 2551 2578 2552 int rc = e1kCsRxEnter(pThis, VERR_SEM_BUSY); 2553 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 2554 return rc; 2579 e1kCsRxEnterReturn(pThis); 2555 2580 # ifdef E1K_WITH_RXD_CACHE 2556 2581 if (RT_UNLIKELY(!e1kUpdateRxDContext(pDevIns, pThis, &rxdc, "e1kHandleRxPacket"))) … … 2686 2711 e1kCsRxLeave(pThis); 2687 2712 e1kStoreRxFragment(pDevIns, pThis, pDesc, ptr, u16RxBufferSize); 2688 rc = e1kCsRxEnter(pThis, VERR_SEM_BUSY); 2689 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 2690 return rc; 2713 e1kCsRxEnterReturn(pThis); 2691 2714 # ifdef E1K_WITH_RXD_CACHE 2692 2715 if (RT_UNLIKELY(!e1kUpdateRxDContext(pDevIns, pThis, &rxdc, "e1kHandleRxPacket"))) … … 2706 2729 e1kStoreRxFragment(pDevIns, pThis, pDesc, ptr, cb); 2707 2730 # ifdef E1K_WITH_RXD_CACHE 2708 rc = e1kCsRxEnter(pThis, VERR_SEM_BUSY); 2709 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 2710 return rc; 2731 e1kCsRxEnterReturn(pThis); 2711 2732 if (RT_UNLIKELY(!e1kUpdateRxDContext(pDevIns, pThis, &rxdc, "e1kHandleRxPacket"))) 2712 2733 { … … 3212 3233 static int e1kRegReadICR(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value) 3213 3234 { 3214 int rc = e1kCsEnter(pThis, VINF_IOM_R3_MMIO_READ); 3215 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 3216 return rc; 3235 e1kCsEnterReturn(pThis, VINF_IOM_R3_MMIO_READ); 3217 3236 3218 3237 uint32_t value = 0; 3219 rc = e1kRegReadDefault(pDevIns, pThis, offset, index, &value);3238 int rc = e1kRegReadDefault(pDevIns, pThis, offset, index, &value); 3220 3239 if (RT_SUCCESS(rc)) 3221 3240 { … … 3349 3368 RT_NOREF_PV(offset); RT_NOREF_PV(index); 3350 3369 3351 int rc = e1kCsEnter(pThis, VINF_IOM_R3_MMIO_WRITE); 3352 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 3353 return rc; 3370 e1kCsEnterReturn(pThis, VINF_IOM_R3_MMIO_WRITE); 3354 3371 if (pThis->fIntRaised) 3355 3372 { … … 3674 3691 /* 3675 3692 * This can happen if we set the link status to down when the Link up timer was 3676 * already armed (shortly after e1k LoadDone() or when the cable was disconnected3693 * already armed (shortly after e1kR3LoadDone() or when the cable was disconnected 3677 3694 * and connect+disconnect the cable very quick. Moreover, 82543GC triggers LSC 3678 3695 * on reset even if the cable is unplugged (see @bugref{8942}). … … 4242 4259 rc = pDrv->pfnSendBuf(pDrv, pSg, fOnWorkerThread); 4243 4260 STAM_PROFILE_STOP(&pThis->CTX_SUFF_Z(StatTransmitSend), a); 4244 //e1k CsEnter(pThis, RT_SRC_POS);4261 //e1kR3CsEnterAsserted(pThis); 4245 4262 } 4246 4263 } … … 6212 6229 * Mask out irrelevant bits. 6213 6230 */ 6214 //rc = e1kCsEnter(pThis, VERR_SEM_BUSY, RT_SRC_POS); 6215 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 6216 return rc; 6231 //e1kCsEnterReturn(pThis, VERR_SEM_BUSY); 6217 6232 //pThis->fDelayInts = false; 6218 6233 //pThis->iStatIntLost += pThis->iStatIntLostOne; … … 6273 6288 * Mask out irrelevant bits. 6274 6289 */ 6275 //rc = e1kCsEnter(pThis, VERR_SEM_BUSY, RT_SRC_POS); 6276 //if (RT_UNLIKELY(rc != VINF_SUCCESS)) 6277 // return rc; 6290 //e1kCsEnterReturn(pThis, VERR_SEM_BUSY); 6278 6291 //pThis->fDelayInts = false; 6279 6292 //pThis->iStatIntLost += pThis->iStatIntLostOne; … … 6323 6336 Log6(("%s At %08X write %08X to %s (%s)\n", 6324 6337 pThis->szPrf, offReg, u32Value, g_aE1kRegMap[index].abbrev, g_aE1kRegMap[index].name)); 6325 //rc = e1kCsEnter(pThis, VERR_SEM_BUSY, RT_SRC_POS); 6326 //if (RT_UNLIKELY(rc != VINF_SUCCESS)) 6327 // return rc; 6338 //e1kCsEnterReturn(pThis, VERR_SEM_BUSY); 6328 6339 //pThis->fDelayInts = false; 6329 6340 //pThis->iStatIntLost += pThis->iStatIntLostOne; … … 6543 6554 * This must be called before the pfnRecieve() method is called. 6544 6555 * 6545 * @returns Number of bytes the device can receive. 6556 * @returns VBox status code. 6557 * @retval VERR_NET_NO_BUFFER_SPACE if we cannot receive. 6546 6558 * @param pDevIns The device instance. 6547 6559 * @param pThis The instance data. 6548 6560 * @thread EMT 6549 6561 */ 6550 static int e1k CanReceive(PPDMDEVINS pDevIns, PE1KSTATE pThis)6551 { 6552 # ifndef E1K_WITH_RXD_CACHE6562 static int e1kR3CanReceive(PPDMDEVINS pDevIns, PE1KSTATE pThis) 6563 { 6564 # ifndef E1K_WITH_RXD_CACHE 6553 6565 size_t cb; 6554 6566 6555 if (RT_UNLIKELY(e1kCsRxEnter(pThis, VERR_SEM_BUSY) != VINF_SUCCESS)) 6556 return VERR_NET_NO_BUFFER_SPACE; 6567 e1kCsRxEnterReturn(pThis); 6557 6568 6558 6569 if (RT_UNLIKELY(RDLEN == sizeof(E1KRXDESC))) … … 6568 6579 cb = (RDT - RDH) * pThis->u16RxBSize; 6569 6580 else if (RDH > RDT) 6570 cb = (RDLEN /sizeof(E1KRXDESC) - RDH + RDT) * pThis->u16RxBSize;6581 cb = (RDLEN / sizeof(E1KRXDESC) - RDH + RDT) * pThis->u16RxBSize; 6571 6582 else 6572 6583 { … … 6574 6585 E1kLogRel(("E1000: OUT of RX descriptors!\n")); 6575 6586 } 6576 E1kLog2(("%s e1k CanReceive: at exit RDH=%d RDT=%d RDLEN=%d u16RxBSize=%d cb=%lu\n",6587 E1kLog2(("%s e1kR3CanReceive: at exit RDH=%d RDT=%d RDLEN=%d u16RxBSize=%d cb=%lu\n", 6577 6588 pThis->szPrf, RDH, RDT, RDLEN, pThis->u16RxBSize, cb)); 6578 6589 6579 6590 e1kCsRxLeave(pThis); 6580 6591 return cb > 0 ? VINF_SUCCESS : VERR_NET_NO_BUFFER_SPACE; 6581 #else /* E1K_WITH_RXD_CACHE */ 6592 # else /* E1K_WITH_RXD_CACHE */ 6593 6594 e1kCsRxEnterReturn(pThis); 6595 6596 E1KRXDC rxdc; 6597 if (RT_UNLIKELY(!e1kUpdateRxDContext(pDevIns, pThis, &rxdc, "e1kR3CanReceive"))) 6598 { 6599 e1kCsRxLeave(pThis); 6600 E1kLog(("%s e1kR3CanReceive: failed to update Rx context, returning VERR_NET_NO_BUFFER_SPACE\n", pThis->szPrf)); 6601 return VERR_NET_NO_BUFFER_SPACE; 6602 } 6603 6582 6604 int rc = VINF_SUCCESS; 6583 6584 if (RT_UNLIKELY(e1kCsRxEnter(pThis, VERR_SEM_BUSY) != VINF_SUCCESS))6585 return VERR_NET_NO_BUFFER_SPACE;6586 E1KRXDC rxdc;6587 if (RT_UNLIKELY(!e1kUpdateRxDContext(pDevIns, pThis, &rxdc, "e1kCanReceive")))6588 {6589 e1kCsRxLeave(pThis);6590 E1kLog(("%s e1kCanReceive: failed to update Rx context, returning VERR_NET_NO_BUFFER_SPACE\n", pThis->szPrf));6591 return VERR_NET_NO_BUFFER_SPACE;6592 }6593 6594 6605 if (RT_UNLIKELY(rxdc.rdlen == sizeof(E1KRXDESC))) 6595 6606 { … … 6604 6615 rc = VERR_NET_NO_BUFFER_SPACE; 6605 6616 } 6606 E1kLog2(("%s e1kCanReceive: at exit in_cache=%d RDH=%d RDT=%d RDLEN=%d" 6607 " u16RxBSize=%d rc=%Rrc\n", pThis->szPrf, 6617 E1kLog2(("%s e1kR3CanReceive: at exit in_cache=%d RDH=%d RDT=%d RDLEN=%d u16RxBSize=%d rc=%Rrc\n", pThis->szPrf, 6608 6618 e1kRxDInCache(pThis), rxdc.rdh, rxdc.rdt, rxdc.rdlen, pThis->u16RxBSize, rc)); 6609 6619 6610 6620 e1kCsRxLeave(pThis); 6611 6621 return rc; 6612 # endif /* E1K_WITH_RXD_CACHE */6622 # endif /* E1K_WITH_RXD_CACHE */ 6613 6623 } 6614 6624 … … 6622 6632 PPDMDEVINS pDevIns = pThisCC->pDevInsR3; 6623 6633 6624 int rc = e1kCanReceive(pDevIns, pThis); 6625 6634 int rc = e1kR3CanReceive(pDevIns, pThis); 6626 6635 if (RT_SUCCESS(rc)) 6627 6636 return VINF_SUCCESS; 6637 6628 6638 if (RT_UNLIKELY(cMillies == 0)) 6629 6639 return VERR_NET_NO_BUFFER_SPACE; … … 6636 6646 || enmVMState == VMSTATE_RUNNING_LS)) 6637 6647 { 6638 int rc2 = e1k CanReceive(pDevIns, pThis);6648 int rc2 = e1kR3CanReceive(pDevIns, pThis); 6639 6649 if (RT_SUCCESS(rc2)) 6640 6650 { … … 6864 6874 STAM_PROFILE_ADV_START(&pThis->StatReceive, a); 6865 6875 6866 //if (!e1kCsEnter(pThis, RT_SRC_POS)) 6867 // return VERR_PERMISSION_DENIED; 6876 //e1kR3CsEnterAsserted(pThis); 6868 6877 6869 6878 e1kPacketDump(pDevIns, pThis, (const uint8_t*)pvBuf, cb, "<-- Incoming"); 6870 6879 6871 6880 /* Update stats */ 6872 if (RT_LIKELY(e1kCsEnter(pThis, VERR_SEM_BUSY) == VINF_SUCCESS)) 6873 { 6874 E1K_INC_CNT32(TPR); 6875 E1K_ADD_CNT64(TORL, TORH, cb < 64? 64 : cb); 6876 e1kCsLeave(pThis); 6877 } 6881 e1kR3CsEnterAsserted(pThis); 6882 E1K_INC_CNT32(TPR); 6883 E1K_ADD_CNT64(TORL, TORH, cb < 64? 64 : cb); 6884 e1kCsLeave(pThis); 6885 6878 6886 STAM_PROFILE_ADV_START(&pThis->StatReceiveFilter, a); 6879 6887 E1KRXDST status; … … 7001 7009 * @param pSSM The handle to the saved state. 7002 7010 */ 7003 static void e1k SaveConfig(PCPDMDEVHLPR3 pHlp, PE1KSTATE pThis, PSSMHANDLE pSSM)7011 static void e1kR3SaveConfig(PCPDMDEVHLPR3 pHlp, PE1KSTATE pThis, PSSMHANDLE pSSM) 7004 7012 { 7005 7013 pHlp->pfnSSMPutMem(pSSM, &pThis->macConfigured, sizeof(pThis->macConfigured)); … … 7010 7018 * @callback_method_impl{FNSSMDEVLIVEEXEC,Save basic configuration.} 7011 7019 */ 7012 static DECLCALLBACK(int) e1k LiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)7020 static DECLCALLBACK(int) e1kR3LiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass) 7013 7021 { 7014 7022 RT_NOREF(uPass); 7015 e1k SaveConfig(pDevIns->pHlpR3, PDMDEVINS_2_DATA(pDevIns, PE1KSTATE), pSSM);7023 e1kR3SaveConfig(pDevIns->pHlpR3, PDMDEVINS_2_DATA(pDevIns, PE1KSTATE), pSSM); 7016 7024 return VINF_SSM_DONT_CALL_AGAIN; 7017 7025 } … … 7020 7028 * @callback_method_impl{FNSSMDEVSAVEPREP,Synchronize.} 7021 7029 */ 7022 static DECLCALLBACK(int) e1k SavePrep(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)7030 static DECLCALLBACK(int) e1kR3SavePrep(PPDMDEVINS pDevIns, PSSMHANDLE pSSM) 7023 7031 { 7024 7032 RT_NOREF(pSSM); 7025 7033 PE1KSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PE1KSTATE); 7026 7034 7027 int rc = e1kCsEnter(pThis, VERR_SEM_BUSY); 7028 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 7029 return rc; 7035 e1kCsEnterReturn(pThis, VERR_SEM_BUSY); 7030 7036 e1kCsLeave(pThis); 7031 7037 return VINF_SUCCESS; … … 7060 7066 * @callback_method_impl{FNSSMDEVSAVEEXEC} 7061 7067 */ 7062 static DECLCALLBACK(int) e1k SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)7068 static DECLCALLBACK(int) e1kR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM) 7063 7069 { 7064 7070 PE1KSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PE1KSTATE); … … 7066 7072 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3; 7067 7073 7068 e1k SaveConfig(pHlp, pThis, pSSM);7074 e1kR3SaveConfig(pHlp, pThis, pSSM); 7069 7075 pThisCC->eeprom.save(pHlp, pSSM); 7070 7076 e1kDumpState(pThis); … … 7130 7136 * @callback_method_impl{FNSSMDEVLOADPREP,Synchronize.} 7131 7137 */ 7132 static DECLCALLBACK(int) e1k LoadPrep(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)7138 static DECLCALLBACK(int) e1kR3LoadPrep(PPDMDEVINS pDevIns, PSSMHANDLE pSSM) 7133 7139 { 7134 7140 RT_NOREF(pSSM); 7135 7141 PE1KSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PE1KSTATE); 7136 7142 7137 int rc = e1kCsEnter(pThis, VERR_SEM_BUSY); 7138 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 7139 return rc; 7143 e1kCsEnterReturn(pThis, VERR_SEM_BUSY); 7140 7144 e1kCsLeave(pThis); 7141 7145 return VINF_SUCCESS; … … 7145 7149 * @callback_method_impl{FNSSMDEVLOADEXEC} 7146 7150 */ 7147 static DECLCALLBACK(int) e1k LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)7151 static DECLCALLBACK(int) e1kR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass) 7148 7152 { 7149 7153 PE1KSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PE1KSTATE); … … 7257 7261 * @callback_method_impl{FNSSMDEVLOADDONE, Link status adjustments after loading.} 7258 7262 */ 7259 static DECLCALLBACK(int) e1k LoadDone(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)7263 static DECLCALLBACK(int) e1kR3LoadDone(PPDMDEVINS pDevIns, PSSMHANDLE pSSM) 7260 7264 { 7261 7265 PE1KSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PE1KSTATE); … … 7288 7292 * @callback_method_impl{FNRTSTRFORMATTYPE} 7289 7293 */ 7290 static DECLCALLBACK(size_t) e1k FmtRxDesc(PFNRTSTROUTPUT pfnOutput,7291 void *pvArgOutput,7292 const char *pszType,7293 void const *pvValue,7294 int cchWidth,7295 int cchPrecision,7296 unsigned fFlags,7297 void *pvUser)7294 static DECLCALLBACK(size_t) e1kR3FmtRxDesc(PFNRTSTROUTPUT pfnOutput, 7295 void *pvArgOutput, 7296 const char *pszType, 7297 void const *pvValue, 7298 int cchWidth, 7299 int cchPrecision, 7300 unsigned fFlags, 7301 void *pvUser) 7298 7302 { 7299 7303 RT_NOREF(cchWidth, cchPrecision, fFlags, pvUser); … … 7327 7331 * @callback_method_impl{FNRTSTRFORMATTYPE} 7328 7332 */ 7329 static DECLCALLBACK(size_t) e1k FmtTxDesc(PFNRTSTROUTPUT pfnOutput,7330 void *pvArgOutput,7331 const char *pszType,7332 void const *pvValue,7333 int cchWidth,7334 int cchPrecision,7335 unsigned fFlags,7336 void *pvUser)7333 static DECLCALLBACK(size_t) e1kR3FmtTxDesc(PFNRTSTROUTPUT pfnOutput, 7334 void *pvArgOutput, 7335 const char *pszType, 7336 void const *pvValue, 7337 int cchWidth, 7338 int cchPrecision, 7339 unsigned fFlags, 7340 void *pvUser) 7337 7341 { 7338 7342 RT_NOREF(cchWidth, cchPrecision, fFlags, pvUser); … … 7412 7416 7413 7417 /** Initializes debug helpers (logging format types). */ 7414 static int e1k InitDebugHelpers(void)7418 static int e1kR3InitDebugHelpers(void) 7415 7419 { 7416 7420 int rc = VINF_SUCCESS; … … 7419 7423 { 7420 7424 s_fHelpersRegistered = true; 7421 rc = RTStrFormatTypeRegister("e1krxd", e1k FmtRxDesc, NULL);7425 rc = RTStrFormatTypeRegister("e1krxd", e1kR3FmtRxDesc, NULL); 7422 7426 AssertRCReturn(rc, rc); 7423 rc = RTStrFormatTypeRegister("e1ktxd", e1k FmtTxDesc, NULL);7427 rc = RTStrFormatTypeRegister("e1ktxd", e1kR3FmtTxDesc, NULL); 7424 7428 AssertRCReturn(rc, rc); 7425 7429 } … … 7434 7438 * @param pszArgs The arguments. 7435 7439 */ 7436 static DECLCALLBACK(void) e1k Info(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)7440 static DECLCALLBACK(void) e1kR3Info(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) 7437 7441 { 7438 7442 RT_NOREF(pszArgs); … … 7461 7465 pDevIns->fRCEnabled ? " RC" : "", pDevIns->fR0Enabled ? " R0" : ""); 7462 7466 7463 e1k CsEnter(pThis, VERR_INTERNAL_ERROR); /* Not sure why but PCNet does it */7467 e1kR3CsEnterAsserted(pThis); /* Not sure why but PCNet does it */ 7464 7468 7465 7469 for (i = 0; i < E1K_NUM_OF_32BIT_REGS; ++i) … … 7614 7618 AssertLogRelReturnVoid(iLUN == 0); 7615 7619 7616 PDMDevHlpCritSectEnter(pDevIns, &pThis->cs, VERR_SEM_BUSY); 7617 7618 /** @todo r=pritesh still need to check if i missed 7619 * to clean something in this function 7620 */ 7620 e1kR3CsEnterAsserted(pThis); 7621 7621 7622 7622 /* … … 7654 7654 AssertLogRelReturn(iLUN == 0, VERR_PDM_NO_SUCH_LUN); 7655 7655 7656 PDMDevHlpCritSectEnter(pDevIns, &pThis->cs, VERR_SEM_BUSY);7656 e1kR3CsEnterAsserted(pThis); 7657 7657 7658 7658 /* … … 8031 8031 /* Saved state registration. */ 8032 8032 rc = PDMDevHlpSSMRegisterEx(pDevIns, E1K_SAVEDSTATE_VERSION, sizeof(E1KSTATE), NULL, 8033 NULL, e1k LiveExec, NULL,8034 e1k SavePrep, e1kSaveExec, NULL,8035 e1k LoadPrep, e1kLoadExec, e1kLoadDone);8033 NULL, e1kR3LiveExec, NULL, 8034 e1kR3SavePrep, e1kR3SaveExec, NULL, 8035 e1kR3LoadPrep, e1kR3LoadExec, e1kR3LoadDone); 8036 8036 AssertRCReturn(rc, rc); 8037 8037 … … 8136 8136 char szTmp[20]; 8137 8137 RTStrPrintf(szTmp, sizeof(szTmp), "e1k%d", iInstance); 8138 PDMDevHlpDBGFInfoRegister(pDevIns, szTmp, "E1000 info.", e1k Info);8138 PDMDevHlpDBGFInfoRegister(pDevIns, szTmp, "E1000 info.", e1kR3Info); 8139 8139 8140 8140 /* Status driver */ … … 8169 8169 AssertRCReturn(rc, rc); 8170 8170 8171 rc = e1k InitDebugHelpers();8171 rc = e1kR3InitDebugHelpers(); 8172 8172 AssertRCReturn(rc, rc); 8173 8173 -
trunk/src/VBox/Devices/Network/DevPCNet.cpp
r88498 r90447 1338 1338 ) 1339 1339 { 1340 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 1341 AssertReleaseRC(rc); 1340 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 1341 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rcLock); 1342 1342 1343 /* Check if we can do something now */ 1343 1344 pcnetPollRxTx(pDevIns, pThis, pThisCC); 1344 1345 pcnetUpdateIrq(pDevIns, pThis); 1346 1345 1347 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 1346 1348 } … … 2038 2040 pcnetPhysWrite(pDevIns, pThis, rbadr, src, cbBuf); 2039 2041 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 2040 AssertReleaseRC(rc);2042 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rc); 2041 2043 2042 2044 /* RX disabled in the meantime? If so, abort RX. */ … … 2085 2087 pcnetPhysWrite(pDevIns, pThis, rbadr2, src, cbBuf); 2086 2088 rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 2087 AssertReleaseRC(rc);2089 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rc); 2088 2090 2089 2091 /* RX disabled in the meantime? If so, abort RX. */ … … 4048 4050 4049 4051 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 4050 AssertReleaseRC(rc);4052 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rc); 4051 4053 4052 4054 rc = VERR_GENERAL_FAILURE; … … 4168 4170 4169 4171 4170 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_INTERNAL_ERROR); /* Take it here so we know why we're hanging... */ 4172 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_INTERNAL_ERROR); /* Take it here so we know why we're hanging... */ 4173 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rcLock); 4171 4174 4172 4175 pHlp->pfnPrintf(pHlp, … … 4471 4474 4472 4475 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 4473 AssertRC (rc);4476 AssertRCReturn(rc, rc); 4474 4477 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 4475 4476 4478 return VINF_SUCCESS; 4477 4479 } … … 4524 4526 4525 4527 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 4526 AssertRC (rc);4528 AssertRCReturn(rc, rc); 4527 4529 4528 4530 uint32_t uVer = pHlp->pfnSSMHandleVersion(pSSM); … … 4682 4684 { 4683 4685 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 4684 AssertReleaseRC(rc);4686 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rc); 4685 4687 4686 4688 rc = VERR_NET_NO_BUFFER_SPACE; … … 4738 4740 * is true -- even if (transmit) polling is disabled (CSR_DPOLL). */ 4739 4741 rc2 = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 4740 AssertReleaseRC(rc2);4742 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rc2); 4741 4743 #ifndef PCNET_NO_POLLING 4742 4744 pcnetPollTimerStart(pDevIns, pThis); … … 4763 4765 STAM_PROFILE_ADV_START(&pThis->StatReceive, a); 4764 4766 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 4765 AssertReleaseRC(rc);4767 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rc); 4766 4768 4767 4769 /* … … 4968 4970 AssertLogRelReturnVoid(iLUN == 0); 4969 4971 4970 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 4972 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 4973 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rcLock); 4971 4974 4972 4975 /** @todo r=pritesh still need to check if i missed … … 5001 5004 AssertLogRelReturn(iLUN == 0, VERR_PDM_NO_SUCH_LUN); 5002 5005 5003 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 5006 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 5007 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rcLock); 5004 5008 5005 5009 /* -
trunk/src/VBox/Devices/Network/DevVirtioNet.cpp
r90156 r90447 328 328 return !!(pThis->VPCI.uGuestFeatures & VNET_F_MRG_RXBUF); 329 329 } 330 331 #define VNET_R3_CS_ENTER_RETURN_VOID(a_pDevIns, a_pThis) VPCI_R3_CS_ENTER_RETURN_VOID(a_pDevIns, &(a_pThis)->VPCI) 330 332 331 333 DECLINLINE(int) vnetR3CsEnter(PPDMDEVINS pDevIns, PVNETSTATE pThis, int rcBusy) … … 648 650 RT_NOREF(hTimer, pvUser); 649 651 650 int rc = vnetR3CsEnter(pDevIns, pThis, VERR_SEM_BUSY); 651 AssertRCReturnVoid(rc); 652 VNET_R3_CS_ENTER_RETURN_VOID(pDevIns, pThis); 652 653 653 654 pThis->config.uStatus |= VNET_S_LINK_UP; … … 1509 1510 Log3(("%s vnetR3QueueTransmit: Got kicked with notification disabled, re-enable notification and flush TX queue\n", INSTANCE(pThis))); 1510 1511 vnetR3TransmitPendingPackets(pDevIns, pThis, pThisCC, pQueue, false /*fOnWorkerThread*/); 1511 if (RT_FAILURE(vnetR3CsEnter(pDevIns, pThis, VERR_SEM_BUSY))) 1512 LogRel(("vnetR3QueueTransmit: Failed to enter critical section!/n")); 1513 else 1514 { 1515 vringSetNotification(pDevIns, &pThisCC->pTxQueue->VRing, true); 1516 vnetR3CsLeave(pDevIns, pThis); 1517 } 1512 1513 VNET_R3_CS_ENTER_RETURN_VOID(pDevIns, pThis); 1514 1515 vringSetNotification(pDevIns, &pThisCC->pTxQueue->VRing, true); 1516 1517 vnetR3CsLeave(pDevIns, pThis); 1518 1518 } 1519 1519 else 1520 1520 { 1521 if (RT_FAILURE(vnetR3CsEnter(pDevIns, pThis, VERR_SEM_BUSY))) 1522 LogRel(("vnetR3QueueTransmit: Failed to enter critical section!/n")); 1523 else 1524 { 1525 vringSetNotification(pDevIns, &pThisCC->pTxQueue->VRing, false); 1526 PDMDevHlpTimerSetMicro(pDevIns, pThis->hTxTimer, VNET_TX_DELAY); 1527 pThis->u64NanoTS = RTTimeNanoTS(); 1528 vnetR3CsLeave(pDevIns, pThis); 1529 } 1521 VNET_R3_CS_ENTER_RETURN_VOID(pDevIns, pThis); 1522 1523 vringSetNotification(pDevIns, &pThisCC->pTxQueue->VRing, false); 1524 PDMDevHlpTimerSetMicro(pDevIns, pThis->hTxTimer, VNET_TX_DELAY); 1525 pThis->u64NanoTS = RTTimeNanoTS(); 1526 1527 vnetR3CsLeave(pDevIns, pThis); 1530 1528 } 1531 1529 } … … 1552 1550 // Log3(("%s vnetR3TxTimer: Expired\n", INSTANCE(pThis))); 1553 1551 vnetR3TransmitPendingPackets(pDevIns, pThis, pThisCC, pThisCC->pTxQueue, false /*fOnWorkerThread*/); 1554 int rc = vnetR3CsEnter(pDevIns, pThis, VERR_SEM_BUSY) 1555 AssertLogRelRCReturnVoid(rc);1552 1553 VNET_R3_CS_ENTER_RETURN_VOID(pDevIns, pThis); 1556 1554 vringSetNotification(pDevIns, &pThisCC->pTxQueue->VRing, true); 1557 1555 vnetR3CsLeave(pDevIns, pThis); … … 2043 2041 AssertLogRelReturnVoid(iLUN == 0); 2044 2042 2045 int rc = vnetR3CsEnter(pDevIns, pThis, VERR_SEM_BUSY); 2046 if (RT_FAILURE(rc)) 2047 { 2048 LogRel(("vnetR3Detach failed to enter critical section!\n")); 2049 return; 2050 } 2043 VNET_R3_CS_ENTER_RETURN_VOID(pDevIns, pThis); 2051 2044 2052 2045 vnetR3DestroyTxThreadAndEvent(pDevIns, pThis, pThisCC); … … 2075 2068 2076 2069 int rc = vnetR3CsEnter(pDevIns, pThis, VERR_SEM_BUSY); 2077 if (RT_FAILURE(rc)) 2078 { 2079 LogRel(("vnetR3Attach failed to enter critical section!\n")); 2080 return rc; 2081 } 2070 AssertRCReturn(rc, rc); 2082 2071 2083 2072 /* -
trunk/src/VBox/Devices/PC/DevACPI.cpp
r88484 r90447 65 65 do { \ 66 66 int rcLock = PDMDevHlpCritSectEnter((a_pDevIns), &(a_pThis)->CritSect, VERR_IGNORED); \ 67 AssertRC(rcLock); \67 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV((a_pDevIns), &(a_pThis)->CritSect, rcLock); \ 68 68 } while (0) 69 69 #endif -
trunk/src/VBox/Devices/PC/DevDMA.cpp
r87127 r90447 638 638 for (unsigned idxCh = 0; idxCh < RT_ELEMENTS(pThis->DMAC[idxCtl].ChState); idxCh++) 639 639 if (pThis->DMAC[idxCtl].ChState[idxCh].pDevInsHandler) 640 PDMDevHlpCritSectEnter(pDevIns, pThis->DMAC[idxCtl].ChState[idxCh].pDevInsHandler->pCritSectRoR3, VERR_IGNORED); 641 PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 640 { 641 int const rc = PDMDevHlpCritSectEnter(pDevIns, pThis->DMAC[idxCtl].ChState[idxCh].pDevInsHandler->pCritSectRoR3, 642 VERR_IGNORED); 643 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pThis->DMAC[idxCtl].ChState[idxCh].pDevInsHandler->pCritSectRoR3, rc); 644 } 645 int const rc = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 646 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rc); 642 647 643 648 /* Run all controllers and channels. */ … … 680 685 LogFlow(("dmaR3Register: pThis=%p uChannel=%u pfnTransferHandler=%p pvUser=%p\n", pThis, uChannel, pfnTransferHandler, pvUser)); 681 686 682 PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 687 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 688 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock); 689 683 690 ch->pDevInsHandler = pDevInsHandler; 684 691 ch->pfnXferHandler = pfnTransferHandler; 685 692 ch->pvUser = pvUser; 693 686 694 PDMDevHlpCritSectLeave(pDevIns, pDevIns->pCritSectRoR3); 687 695 } … … 735 743 LogFlow(("dmaR3ReadMemory: pThis=%p uChannel=%u pvBuffer=%p off=%u cbBlock=%u\n", pThis, uChannel, pvBuffer, off, cbBlock)); 736 744 737 PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 745 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 746 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock); 738 747 739 748 /* Build the address for this transfer. */ … … 776 785 } 777 786 778 PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 787 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 788 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock); 779 789 780 790 /* Build the address for this transfer. */ … … 813 823 LogFlow(("dmaR3SetDREQ: pThis=%p uChannel=%u uLevel=%u\n", pThis, uChannel, uLevel)); 814 824 815 PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 825 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 826 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock); 827 816 828 chidx = uChannel & 3; 817 829 if (uLevel) … … 819 831 else 820 832 dc->u8Status &= ~(1 << (chidx + 4)); 833 821 834 PDMDevHlpCritSectLeave(pDevIns, pDevIns->pCritSectRoR3); 822 835 } … … 831 844 LogFlow(("dmaR3GetChannelMode: pThis=%p uChannel=%u\n", pThis, uChannel)); 832 845 833 PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 846 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 847 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock); 848 834 849 uint8_t u8Mode = pThis->DMAC[DMACH2C(uChannel)].ChState[uChannel & 3].u8Mode; 850 835 851 PDMDevHlpCritSectLeave(pDevIns, pDevIns->pCritSectRoR3); 836 852 return u8Mode; -
trunk/src/VBox/Devices/PC/DevHPET.cpp
r90304 r90447 179 179 #define DEVHPET_LOCK_RETURN(a_pDevIns, a_pThis, a_rcBusy) \ 180 180 do { \ 181 int rcLock = PDMDevHlpCritSectEnter((a_pDevIns), &(a_pThis)->CritSect, (a_rcBusy)); \181 int const rcLock = PDMDevHlpCritSectEnter((a_pDevIns), &(a_pThis)->CritSect, (a_rcBusy)); \ 182 182 if (RT_LIKELY(rcLock == VINF_SUCCESS)) \ 183 183 { /* likely */ } \ … … 1581 1581 * Set the timer frequency hints. 1582 1582 */ 1583 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1583 rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1584 AssertRCReturn(rc, rc); 1585 1584 1586 for (uint32_t iTimer = 0; iTimer < cTimers; iTimer++) 1585 1587 { … … 1588 1590 hpetTimerSetFrequencyHint(pDevIns, pThis, pHpetTimer, pHpetTimer->u64Config, pHpetTimer->u64Period); 1589 1591 } 1592 1590 1593 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 1591 1594 return VINF_SUCCESS; -
trunk/src/VBox/Devices/PC/DevPit-i8254.cpp
r87773 r90447 107 107 #define DEVPIT_LOCK_RETURN(a_pDevIns, a_pThis, a_rcBusy) \ 108 108 do { \ 109 int rcLock = PDMDevHlpCritSectEnter((a_pDevIns), &(a_pThis)->CritSect, (a_rcBusy)); \110 if (rcLock != VINF_SUCCESS)\111 109 int const rcLock = PDMDevHlpCritSectEnter((a_pDevIns), &(a_pThis)->CritSect, (a_rcBusy)); \ 110 if (rcLock == VINF_SUCCESS) { /* likely */ } \ 111 else return rcLock; \ 112 112 } while (0) 113 113 … … 981 981 PPITSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPITSTATE); 982 982 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3; 983 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 983 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 984 AssertRCReturn(rc, rc); 984 985 985 986 /* The config. */ … … 1085 1086 if (pChan->hTimer != NIL_TMTIMERHANDLE) 1086 1087 { 1087 PDMDevHlpTimerLoad(pDevIns, pChan->hTimer, pSSM); 1088 rc = PDMDevHlpTimerLoad(pDevIns, pChan->hTimer, pSSM); 1089 AssertRCReturn(rc, rc); 1088 1090 LogRel(("PIT: mode=%d count=%#x (%u) - %d.%02d Hz (ch=%d) (restore)\n", 1089 1091 pChan->mode, pChan->count, pChan->count, PIT_FREQ / pChan->count, (PIT_FREQ * 100 / pChan->count) % 100, i)); 1090 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1092 rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1093 AssertRCReturn(rc, rc); 1091 1094 PDMDevHlpTimerSetFrequencyHint(pDevIns, pChan->hTimer, PIT_FREQ / pChan->count); 1092 1095 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); … … 1103 1106 # endif 1104 1107 if (uVersion > PIT_SAVED_STATE_VERSION_VBOX_31) 1105 pHlp->pfnSSMGetBool(pSSM, &pThis->fDisabledByHpet);1108 rc = pHlp->pfnSSMGetBool(pSSM, &pThis->fDisabledByHpet); 1106 1109 1107 1110 return VINF_SUCCESS; … … 1183 1186 PPDMDEVINS pDevIns = pThisCC->pDevIns; 1184 1187 PPITSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPITSTATE); 1185 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1188 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1189 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rcLock); 1186 1190 1187 1191 pThis->fDisabledByHpet = fActivated; -
trunk/src/VBox/Devices/PC/DevRTC.cpp
r90445 r90447 1034 1034 { 1035 1035 PRTCSTATECC pThisCC = RT_FROM_MEMBER(pInterface, RTCSTATER3, IHpetLegacyNotify); 1036 PPDMDEVINS pDevIns = pThisCC->pDevInsR3; 1037 PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 1036 PPDMDEVINS pDevIns = pThisCC->pDevInsR3; 1037 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 1038 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock); 1038 1039 1039 1040 pThisCC->pShared->fDisabledByHpet = fActivated; -
trunk/src/VBox/Devices/Serial/UartCore.cpp
r90445 r90447 1598 1598 AssertMsg((uint32_t)cbAvail == cbAvail, ("Too much data available\n")); 1599 1599 1600 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1600 int rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1601 AssertRCReturn(rcLock, rcLock); 1602 1601 1603 uint32_t cbAvailOld = ASMAtomicAddU32(&pThis->cbAvailRdr, (uint32_t)cbAvail); 1602 1604 LogFlow((" cbAvailRdr=%u -> cbAvailRdr=%u\n", cbAvailOld, cbAvail + cbAvailOld)); … … 1615 1617 } 1616 1618 } 1619 1617 1620 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 1618 1619 1621 return VINF_SUCCESS; 1620 1622 } … … 1632 1634 1633 1635 /* Set the transmitter empty bit because everything was sent. */ 1634 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1636 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1637 AssertRCReturn(rcLock, rcLock); 1638 1635 1639 UART_REG_SET(pThis->uRegLsr, UART_REG_LSR_TEMT); 1636 1640 uartIrqUpdate(pDevIns, pThis, pThisCC); 1641 1637 1642 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 1638 1643 return VINF_SUCCESS; … … 1652 1657 AssertReturn(cbRead > 0, VERR_INVALID_PARAMETER); 1653 1658 1654 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1659 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1660 AssertRCReturn(rcLock, rcLock); 1661 1655 1662 uartR3TxQueueCopyFrom(pDevIns, pThis, pThisCC, pvBuf, cbRead, pcbRead); 1663 1656 1664 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 1657 1658 1665 LogFlowFunc(("-> VINF_SUCCESS{*pcbRead=%zu}\n", *pcbRead)); 1659 1666 return VINF_SUCCESS; … … 1670 1677 PUARTCORE pThis = pThisCC->pShared; 1671 1678 PPDMDEVINS pDevIns = pThisCC->pDevIns; 1672 1673 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1679 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1680 AssertRCReturn(rcLock, rcLock); 1681 1674 1682 uartR3StsLinesUpdate(pDevIns, pThis, pThisCC, fNewStatusLines); 1683 1675 1684 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 1676 1685 return VINF_SUCCESS; … … 1687 1696 PUARTCORE pThis = pThisCC->pShared; 1688 1697 PPDMDEVINS pDevIns = pThisCC->pDevIns; 1689 1690 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1698 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1699 AssertRCReturn(rcLock, rcLock); 1700 1691 1701 UART_REG_SET(pThis->uRegLsr, UART_REG_LSR_BI); 1692 1702 uartIrqUpdate(pDevIns, pThis, pThisCC); 1703 1693 1704 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 1694 1705 return VINF_SUCCESS; … … 1949 1960 return VERR_PDM_MISSING_INTERFACE; 1950 1961 } 1951 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1952 uartR3XferReset(pDevIns, pThis, pThisCC); 1953 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 1962 rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1963 if (RT_SUCCESS(rc)) 1964 { 1965 uartR3XferReset(pDevIns, pThis, pThisCC); 1966 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 1967 } 1954 1968 } 1955 1969 else if (rc == VERR_PDM_NO_ATTACHED_DRIVER) … … 1957 1971 pThisCC->pDrvBase = NULL; 1958 1972 pThisCC->pDrvSerial = NULL; 1959 rc = VINF_SUCCESS; 1960 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1961 uartR3XferReset(pDevIns, pThis, pThisCC); 1962 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 1973 rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 1974 if (RT_SUCCESS(rc)) 1975 { 1976 uartR3XferReset(pDevIns, pThis, pThisCC); 1977 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 1978 } 1963 1979 LogRel(("Serial#%d: no unit\n", pDevIns->iInstance)); 1964 1980 } … … 1983 1999 pThisCC->pDrvBase = NULL; 1984 2000 pThisCC->pDrvSerial = NULL; 1985 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 2001 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 2002 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rcLock); 2003 1986 2004 uartR3XferReset(pDevIns, pThis, pThisCC); 2005 1987 2006 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 1988 2007 } -
trunk/src/VBox/Devices/Storage/DevATA.cpp
r90445 r90447 7104 7104 { 7105 7105 /* Make it signal PDM & itself when its done */ 7106 PDMDevHlpCritSectEnter(pDevIns, &pThis->aCts[i].AsyncIORequestLock, VERR_IGNORED); 7106 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->aCts[i].AsyncIORequestLock, VERR_IGNORED); 7107 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->aCts[i].AsyncIORequestLock, rcLock); 7108 7107 7109 ASMAtomicWriteBool(&pThisCC->aCts[i].fSignalIdle, true); 7110 7108 7111 PDMDevHlpCritSectLeave(pDevIns, &pThis->aCts[i].AsyncIORequestLock); 7109 7112 … … 7557 7560 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++) 7558 7561 { 7559 PDMDevHlpCritSectEnter(pDevIns, &pThis->aCts[i].lock, VERR_INTERNAL_ERROR); 7562 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->aCts[i].lock, VERR_INTERNAL_ERROR); 7563 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->aCts[i].lock, rcLock); 7564 7560 7565 for (uint32_t j = 0; j < RT_ELEMENTS(pThis->aCts[i].aIfs); j++) 7561 7566 ataR3ResetDevice(pDevIns, &pThis->aCts[i], &pThis->aCts[i].aIfs[j]); 7567 7562 7568 PDMDevHlpCritSectLeave(pDevIns, &pThis->aCts[i].lock); 7563 7569 } … … 7580 7586 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++) 7581 7587 { 7582 PDMDevHlpCritSectEnter(pDevIns, &pThis->aCts[i].lock, VERR_INTERNAL_ERROR); 7588 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->aCts[i].lock, VERR_INTERNAL_ERROR); 7589 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->aCts[i].lock, rcLock); 7583 7590 7584 7591 pThis->aCts[i].iSelectedIf = 0; … … 7627 7634 { 7628 7635 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->aCts[i].AsyncIORequestLock, VERR_IGNORED); 7629 AssertRC(rc);7636 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->aCts[i].AsyncIORequestLock, rc); 7630 7637 7631 7638 ASMAtomicWriteBool(&pThisCC->aCts[i].fSignalIdle, true); -
trunk/src/VBox/Devices/USB/DevOHCI.cpp
r90332 r90447 1035 1035 memset(pAvailable, 0, sizeof(*pAvailable)); 1036 1036 1037 PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 1037 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 1038 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock); 1039 1040 1038 1041 for (unsigned iPort = 0; iPort < OHCI_NDP_CFG(pThis); iPort++) 1039 1042 if (!pThis->RootHub.aPorts[iPort].pDev) … … 1042 1045 ASMBitSet(pAvailable, iPort + 1); 1043 1046 } 1047 1044 1048 PDMDevHlpCritSectLeave(pDevIns, pDevIns->pCritSectRoR3); 1045 1046 1049 return cPorts; 1047 1050 } … … 1075 1078 VUSBSPEED enmSpeed; 1076 1079 LogFlow(("ohciR3RhAttach: pDev=%p uPort=%u\n", pDev, uPort)); 1077 PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 1080 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 1081 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock); 1078 1082 1079 1083 /* … … 1118 1122 RT_NOREF(pDev); 1119 1123 LogFlow(("ohciR3RhDetach: pDev=%p uPort=%u\n", pDev, uPort)); 1120 PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 1124 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 1125 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock); 1121 1126 1122 1127 /* … … 1177 1182 PPDMDEVINS pDevIns = pThisCC->pDevInsR3; 1178 1183 POHCI pThis = PDMDEVINS_2_DATA(pDevIns, POHCI); 1179 PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 1184 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 1185 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock); 1180 1186 1181 1187 Log(("ohci: root hub reset%s\n", fResetOnLinux ? " (reset on linux)" : "")); … … 5609 5615 * Detach all proxied devices. 5610 5616 */ 5611 PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 5617 int rc = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 5618 AssertRCReturn(rc, rc); 5619 5612 5620 /** @todo this won't work well when continuing after saving! */ 5613 5621 for (unsigned i = 0; i < RT_ELEMENTS(pThis->RootHub.aPorts); i++) … … 5628 5636 } 5629 5637 } 5638 5630 5639 PDMDevHlpCritSectLeave(pDevIns, pDevIns->pCritSectRoR3); 5631 5640 -
trunk/src/VBox/Devices/VMMDev/VMMDev.cpp
r90332 r90447 383 383 ) 384 384 { 385 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 385 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 386 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rcLock); 387 386 388 vmmdevNotifyGuestWorker(pDevIns, pThis, pThisCC, fAddEvents); 389 387 390 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 388 391 } … … 409 412 void VMMDevCtlSetGuestFilterMask(PPDMDEVINS pDevIns, PVMMDEV pThis, PVMMDEVCC pThisCC, uint32_t fOrMask, uint32_t fNotMask) 410 413 { 411 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 414 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 415 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rcLock); 412 416 413 417 const bool fHadEvents = (pThis->fHostEventFlags & pThis->fGuestFilterMask) != 0; … … 3068 3072 */ 3069 3073 uint32_t fPostOptimize = 0; 3070 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3074 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3075 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rcLock); 3076 3071 3077 rcRet = vmmdevReqDispatcher(pDevIns, pThis, pThisCC, pRequestHeader, u32, tsArrival, &fPostOptimize, &pLock); 3078 3072 3079 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 3073 3080 … … 3542 3549 PPDMDEVINS pDevIns = pThisCC->pDevIns; 3543 3550 PVMMDEV pThis = PDMDEVINS_2_DATA(pDevIns, PVMMDEV); 3544 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3551 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3552 AssertRCReturn(rcLock, rcLock); 3545 3553 3546 3554 if ( pThis->xMouseAbs != xAbs … … 3579 3587 PPDMDEVINS pDevIns = pThisCC->pDevIns; 3580 3588 PVMMDEV pThis = PDMDEVINS_2_DATA(pDevIns, PVMMDEV); 3581 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3589 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3590 AssertRCReturn(rcLock, rcLock); 3582 3591 3583 3592 uint32_t fOldCaps = pThis->fMouseCapabilities; … … 3638 3647 int rc = VINF_SUCCESS; 3639 3648 bool fNotifyGuest = false; 3640 3641 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED);3649 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3650 AssertRCReturn(rcLock, rcLock); 3642 3651 3643 3652 uint32_t i; … … 3705 3714 PPDMDEVINS pDevIns = pThisCC->pDevIns; 3706 3715 PVMMDEV pThis = PDMDEVINS_2_DATA(pDevIns, PVMMDEV); 3707 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3716 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3717 AssertRCReturn(rcLock, rcLock); 3708 3718 3709 3719 /* Verify that the new resolution is different and that guest does not yet know about it. */ … … 3733 3743 PPDMDEVINS pDevIns = pThisCC->pDevIns; 3734 3744 PVMMDEV pThis = PDMDEVINS_2_DATA(pDevIns, PVMMDEV); 3735 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3745 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3746 AssertRCReturn(rcLock, rcLock); 3736 3747 3737 3748 /* Verify that the new resolution is different and that guest does not yet know about it. */ … … 3758 3769 PPDMDEVINS pDevIns = pThisCC->pDevIns; 3759 3770 PVMMDEV pThis = PDMDEVINS_2_DATA(pDevIns, PVMMDEV); 3760 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3771 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3772 AssertRCReturn(rcLock, rcLock); 3761 3773 3762 3774 bool fSame = (pThis->fVRDPEnabled == fVRDPEnabled); … … 3784 3796 PPDMDEVINS pDevIns = pThisCC->pDevIns; 3785 3797 PVMMDEV pThis = PDMDEVINS_2_DATA(pDevIns, PVMMDEV); 3786 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3798 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3799 AssertRCReturn(rcLock, rcLock); 3787 3800 3788 3801 /* Verify that the new resolution is different and that guest does not yet know about it. */ … … 3825 3838 AssertPtrReturn(pCredentials, VERR_NOT_SUPPORTED); 3826 3839 3827 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3840 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3841 AssertRCReturn(rcLock, rcLock); 3828 3842 3829 3843 /* … … 3885 3899 PPDMDEVINS pDevIns = pThisCC->pDevIns; 3886 3900 PVMMDEV pThis = PDMDEVINS_2_DATA(pDevIns, PVMMDEV); 3887 int rc = VINF_SUCCESS;3888 3901 3889 3902 Log(("vmmdevIPort_CpuHotUnplug: idCpuCore=%u idCpuPackage=%u\n", idCpuCore, idCpuPackage)); 3890 3903 3891 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3904 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3905 AssertRCReturn(rc, rc); 3892 3906 3893 3907 if (pThis->fCpuHotPlugEventsEnabled) … … 3913 3927 PPDMDEVINS pDevIns = pThisCC->pDevIns; 3914 3928 PVMMDEV pThis = PDMDEVINS_2_DATA(pDevIns, PVMMDEV); 3915 int rc = VINF_SUCCESS;3916 3929 3917 3930 Log(("vmmdevCpuPlug: idCpuCore=%u idCpuPackage=%u\n", idCpuCore, idCpuPackage)); 3918 3931 3919 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3932 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3933 AssertRCReturn(rc, rc); 3920 3934 3921 3935 if (pThis->fCpuHotPlugEventsEnabled) … … 3961 3975 PVMMDEVCC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PVMMDEVCC); 3962 3976 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3; 3963 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3977 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 3978 AssertRCReturn(rc, rc); 3964 3979 3965 3980 vmmdevLiveExec(pDevIns, pSSM, SSM_PASS_FINAL); … … 4244 4259 PVMMDEV pThis = PDMDEVINS_2_DATA(pDevIns, PVMMDEV); 4245 4260 PVMMDEVCC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PVMMDEVCC); 4246 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 4261 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 4262 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rcLock); 4247 4263 4248 4264 /* -
trunk/src/VBox/Devices/VMMDev/VMMDevHGCM.cpp
r90266 r90447 473 473 AssertStmt(idx < RT_ELEMENTS(pThisCC->aHgcmAcc), idx %= RT_ELEMENTS(pThisCC->aHgcmAcc)); 474 474 475 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 475 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 476 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rcLock); 476 477 477 478 Log5Func(("aHgcmAcc[%zu] %#RX64 += %#x (%p)\n", idx, pThisCC->aHgcmAcc[idx].cbHeapBudget, pCmd->cbHeapCost, pCmd)); -
trunk/src/VBox/Devices/VirtIO/Virtio.cpp
r82968 r90447 931 931 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatIOWriteR0, STAMTYPE_PROFILE, "IO/WriteR0", STAMUNIT_TICKS_PER_CALL, "Profiling IO writes in R0"); 932 932 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatIOWriteRC, STAMTYPE_PROFILE, "IO/WriteRC", STAMUNIT_TICKS_PER_CALL, "Profiling IO writes in RC"); 933 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatCsR3, STAMTYPE_PROFILE, "Cs/CsR3", STAMUNIT_TICKS_PER_CALL, "Profiling CS wait in R3");934 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatCsR0, STAMTYPE_PROFILE, "Cs/CsR0", STAMUNIT_TICKS_PER_CALL, "Profiling CS wait in R0");935 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatCsRC, STAMTYPE_PROFILE, "Cs/CsRC", STAMUNIT_TICKS_PER_CALL, "Profiling CS wait in RC");936 933 # endif /* VBOX_WITH_STATISTICS */ 937 934 -
trunk/src/VBox/Devices/VirtIO/Virtio.h
r85121 r90447 218 218 STAMPROFILEADV StatIOWriteR0; 219 219 STAMPROFILEADV StatIOWriteRC; 220 STAMPROFILE StatCsR3;221 STAMPROFILE StatCsR0;222 STAMPROFILE StatCsRC;223 220 #endif 224 221 } VPCISTATE; … … 298 295 299 296 #define VPCI_CS 297 298 #ifdef VPCI_CS 299 # define VPCI_R3_CS_ENTER_RETURN_VOID(a_pDevIns, a_pThis) do { \ 300 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &(a_pThis)->cs, VERR_IGNORED); \ 301 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &(a_pThis)->cs, rcLock); \ 302 } while (0) 303 #else 304 # define VPCI_R3_CS_ENTER_RETURN_VOID(a_pDevIns, a_pThis) do { } while (0) 305 #endif 306 300 307 DECLINLINE(int) vpciCsEnter(PPDMDEVINS pDevIns, PVPCISTATE pThis, int rcBusy) 301 308 { 302 309 #ifdef VPCI_CS 303 STAM_PROFILE_START(&pThis->CTX_SUFF(StatCs), a); 304 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->cs, rcBusy); 305 STAM_PROFILE_STOP(&pThis->CTX_SUFF(StatCs), a); 306 return rc; 310 return PDMDevHlpCritSectEnter(pDevIns, &pThis->cs, rcBusy); 307 311 #else 308 312 RT_NOREF(pDevIns, pThis, rcBusy); -
trunk/src/VBox/ExtPacks/BusMouseSample/DevBusMouse.cpp
r87773 r90447 574 574 PBMSSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PBMSSTATE); 575 575 int rc = PDMDevHlpCritSectEnter(pDevIns, pDevIns->CTX_SUFF(pCritSectRo), VERR_SEM_BUSY); 576 AssertReleaseRC(rc);576 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->CTX_SUFF(pCritSectRo), rc); 577 577 578 578 bmsR3MouseEvent(pThis, dx, dy, dz, dw, fButtons);
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