Changeset 90640 in vbox

Timestamp:

Aug 11, 2021 11:40:23 PM (4 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

146252

Message:

iprt/asm.h,tstRTInlineAsm: Added ASMAtomicCmpWriteU128 and ASMAtomicCmpWriteU128U for AMD64 systems. bugref:6695

Location:

trunk

Files:

• include/iprt/asm.h (modified) (2 diffs)
• src/VBox/Runtime/testcase/tstRTInlineAsm.cpp (modified) (3 diffs)

trunk/include/iprt/asm.h

@@ -77 +77 @@
 #  pragma intrinsic(__stosq)
 #  pragma intrinsic(_byteswap_uint64)
+#  pragma intrinsic(_InterlockedCompareExchange128)
 #  pragma intrinsic(_InterlockedExchange64)
 #  pragma intrinsic(_InterlockedExchangeAdd64)
@@ -1427 +1428 @@
 }
 
+#if defined(RT_ARCH_AMD64) || defined(DOXYGEN_RUNNING)
+
+/**
+ * Atomically compare and write an unsigned 128-bit value, ordered.
+ *
+ * @returns true if write was done.
+ * @returns false if write wasn't done.
+ *
+ * @param   pu128       Pointer to the 128-bit variable to update.
+ * @param   u128New     The 128-bit value to assign to *pu128.
+ * @param   u128Old     The value to compare with.
+ *
+ * @remarks AMD64: Not present in the earliest CPUs, so check CPUID.
+ */
+# if (RT_INLINE_ASM_EXTERNAL_TMP_ARM && !RT_INLINE_ASM_USES_INTRIN)
+DECLASM(bool) ASMAtomicCmpWriteU128(volatile uint128_t *pu128, const uint128_t u128New, const uint128_t u128Old) RT_NOTHROW_PROTO;
+# else
+DECLINLINE(bool) ASMAtomicCmpWriteU128(volatile uint128_t *pu128, const uint128_t u128New, const uint128_t u128Old) RT_NOTHROW_DEF
+{
+#  if RT_INLINE_ASM_USES_INTRIN
+    __int64 ai64Cmp[2];
+    ai64Cmp[0] = (__int64)u128Old.Lo;
+    ai64Cmp[1] = (__int64)u128Old.Hi;
+    return _InterlockedCompareExchange128((__int64 volatile *)pu128, u128New.Hi, u128New.Lo, ai64Cmp) != 0;
+
+#  elif defined(RT_ARCH_AMD64)
+#   if RT_INLINE_ASM_GNU_STYLE
+    uint64_t u64Ret;
+    uint64_t u64Spill;
+    __asm__ __volatile__("lock; cmpxchg16b %2\n\t"
+                         "setz  %%al\n\t"
+                         "movzbl %%al, %%eax\n\t"
+                         : "=a" (u64Ret)
+                         , "=d" (u64Spill)
+                         , "+m" (*pu128)
+                         : "A" (u128Old)
+                         , "b" ((uint64_t)u128New)
+                         , "c" ((uint64_t)(u128New >> 64))
+                         : "cc");
+
+    return (bool)u64Ret;
+#   else
+#    error "Port me"
+#   endif
+#  else
+#   error "Port me"
+#  endif
+}
+# endif
+
+/** @def RTASM_HAVE_CMP_WRITE_U128
+ * Indicates that we've got ASMAtomicCmpWriteU128() available.  */
+# define RTASM_HAVE_CMP_WRITE_U128 1
+
+/**
+ * RTUINT128U wrapper for ASMAtomicCmpWriteU128.
+ */
+DECLINLINE(bool) ASMAtomicCmpWriteU128U(volatile RTUINT128U *pu128, const RTUINT128U u128New,
+                                        const RTUINT128U u128Old) RT_NOTHROW_DEF
+{
+    return ASMAtomicCmpWriteU128(&pu128->u, u128New.u, u128Old.u);
+}
+
+#endif /* RT_ARCH_AMD64 */
+
 
 /**

trunk/src/VBox/Runtime/testcase/tstRTInlineAsm.cpp

@@ -100 +100 @@
         CHECKVAL(*a_pVar, a_ExpectVarVal, a_FmtVar); \
         CHECKVAL(a_uVar2, a_ExpectVarVal2, a_FmtVar); \
+    } while (0)
+
+#define CHECKVAL128(a_pu128Val, a_u64HiExpect, a_u64LoExpect) \
+    do \
+    { \
+        if ((a_pu128Val)->s.Hi != (a_u64HiExpect) || (a_pu128Val)->s.Lo != (a_u64LoExpect)) \
+            RTTestFailed(g_hTest, "%s, %d: " #a_pu128Val ": expected %#RX64'%016RX64 got %#RX64'%016RX64\n", \
+                         __FUNCTION__, __LINE__, (a_u64HiExpect), (a_u64LoExpect), (a_pu128Val)->s.Hi, (a_pu128Val)->s.Lo); \
+    } while (0)
+#define CHECKVAL128_C(a_pu128Val, a_u64HiExpect, a_u64LoExpect) \
+    do \
+    { \
+        if ((a_pu128Val)->s.Hi != UINT64_C(a_u64HiExpect) || (a_pu128Val)->s.Lo != UINT64_C(a_u64LoExpect)) \
+            RTTestFailed(g_hTest, "%s, %d: " #a_pu128Val ": expected %#RX64'%016RX64 got %#RX64'%016RX64\n", \
+                         __FUNCTION__, __LINE__, UINT64_C(a_u64HiExpect), UINT64_C(a_u64LoExpect), \
+                         (a_pu128Val)->s.Hi, (a_pu128Val)->s.Lo); \
+    } while (0)
+#define CHECK_OP_AND_VAL_128(a_TypeRet, a_FmtRet, a_pu128Val, a_Operation, a_ExpectRetVal, a_u64HiExpect, a_u64LoExpect) \
+    do { \
+        CHECKOP(a_Operation, a_ExpectRetVal, a_FmtRet, a_TypeRet); \
+        CHECKVAL128(a_pu128Val, a_u64HiExpect, a_u64LoExpect); \
+    } while (0)
+#define CHECK_OP_AND_VAL_128_C(a_TypeRet, a_FmtRet, a_pu128Val, a_Operation, a_ExpectRetVal, a_u64HiExpect, a_u64LoExpect) \
+    do { \
+        CHECKOP(a_Operation, a_ExpectRetVal, a_FmtRet, a_TypeRet); \
+        CHECKVAL128_C(a_pu128Val, a_u64HiExpect, a_u64LoExpect); \
     } while (0)
 
@@ -1482 +1508 @@
 
 
+#ifdef RTASM_HAVE_CMP_WRITE_U128
+DECLINLINE(void) tstASMAtomicCmpWriteU128Worker(RTUINT128U volatile *pu128)
+{
+    pu128->s.Lo = UINT64_C(0xffffffffffffff);
+    pu128->s.Hi = UINT64_C(0xffffffffffffff);
+
+    RTUINT128U u128A, u128B;
+    CHECK_OP_AND_VAL_128_C(bool, "%d", pu128, ASMAtomicCmpWriteU128U(pu128,
+                                                                     u128A = RTUINT128_INIT_C(0, 0),
+                                                                     u128B = RTUINT128_INIT_C(0, 0)),
+                           false, 0xffffffffffffff, 0xffffffffffffff);
+    CHECK_OP_AND_VAL_128_C(bool, "%d", pu128, ASMAtomicCmpWriteU128U(pu128,
+                                                                     u128A = RTUINT128_INIT_C(0, 0),
+                                                                     u128B = RTUINT128_INIT_C(0xffffffffffffff, 0xffffffffffffff)),
+                           true, 0, 0);
+
+    CHECK_OP_AND_VAL_128_C(bool, "%d", pu128, ASMAtomicCmpWriteU128U(pu128,
+                                                                     u128A = RTUINT128_INIT_C(0x80040008008efd, 0x40080004004def),
+                                                                     u128B = RTUINT128_INIT_C(0, 1)),
+                           false, 0, 0);
+    CHECK_OP_AND_VAL_128_C(bool, "%d", pu128, ASMAtomicCmpWriteU128U(pu128,
+                                                                     u128A = RTUINT128_INIT_C(0x80040008008efd, 0x40080004004def),
+                                                                     u128B = RTUINT128_INIT_C(1, 0)),
+                           false, 0, 0);
+    CHECK_OP_AND_VAL_128_C(bool, "%d", pu128, ASMAtomicCmpWriteU128U(pu128,
+                                                                     u128A = RTUINT128_INIT_C(0x80040008008efd, 0x40080004004def),
+                                                                     u128B = RTUINT128_INIT_C(0, 0)),
+                           true, 0x80040008008efd, 0x40080004004def);
+
+    CHECK_OP_AND_VAL_128_C(bool, "%d", pu128, ASMAtomicCmpWriteU128U(pu128,
+                                                                     u128A = RTUINT128_INIT_C(0xfff40ff8f08ef3, 0x4ee8ee04cc4de4),
+                                                                     u128B = RTUINT128_INIT_C(0x80040008008efd, 0)),
+                           false, 0x80040008008efd, 0x40080004004def);
+    CHECK_OP_AND_VAL_128_C(bool, "%d", pu128, ASMAtomicCmpWriteU128U(pu128,
+                                                                     u128A = RTUINT128_INIT_C(0xfff40ff8f08ef3, 0x4ee8ee04cc4de4),
+                                                                     u128B = RTUINT128_INIT_C(0, 0x40080004004def)),
+                           false, 0x80040008008efd, 0x40080004004def);
+    CHECK_OP_AND_VAL_128_C(bool, "%d", pu128, ASMAtomicCmpWriteU128U(pu128,
+                                                                     u128A = RTUINT128_INIT_C(0xfff40ff8f08ef3, 0x4ee8ee04cc4de4),
+                                                                     u128B = RTUINT128_INIT_C(0x80040008008efd, 0x40080004004def)),
+                           true, 0xfff40ff8f08ef3, 0x4ee8ee04cc4de4);
+}
+#endif /* RTASM_HAVE_CMP_WRITE_U128 */
+
+
 static void tstASMAtomicCmpXchg(void)
 {
@@ -1487 +1558 @@
     DO_SIMPLE_TEST(ASMAtomicCmpXchgU32, uint32_t);
     DO_SIMPLE_TEST(ASMAtomicCmpXchgU64, uint64_t);
+#ifdef RTASM_HAVE_CMP_WRITE_U128
+# ifdef RT_ARCH_AMD64
+    if (ASMCpuId_ECX(1) & X86_CPUID_FEATURE_ECX_CX16)
+# endif
+    {
+        RTTestISub("ASMAtomicCmpWriteU128U");
+        DO_SIMPLE_TEST_NO_SUB_NO_STACK(tstASMAtomicCmpWriteU128Worker, RTUINT128U);
+    }
+#endif
 }