Changeset 90654 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Aug 12, 2021 10:48:51 AM (4 years ago)
- svn:sync-xref-src-repo-rev:
- 146266
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/PDMAllCritSectRw.cpp
r90650 r90654 67 67 /** Max number of write or write/read recursions. */ 68 68 #define PDM_CRITSECTRW_MAX_RECURSIONS _1M 69 70 /** Skips some of the overly paranoid atomic reads and updates. 71 * Makes some assumptions about cache coherence, though not brave enough not to 72 * always end with an atomic update. */ 73 #define PDMCRITSECTRW_WITH_LESS_ATOMIC_STUFF 74 75 /** For reading RTCRITSECTRWSTATE::s::u64State. */ 76 #ifdef PDMCRITSECTRW_WITH_LESS_ATOMIC_STUFF 77 # define PDMCRITSECTRW_READ_STATE(a_pu64State) ASMAtomicUoReadU64(a_pu64State) 78 #else 79 # define PDMCRITSECTRW_READ_STATE(a_pu64State) ASMAtomicReadU64(a_pu64State) 80 #endif 81 69 82 70 83 /* Undefine the automatic VBOX_STRICT API mappings. */ … … 242 255 * Get cracking... 243 256 */ 244 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State);257 uint64_t u64State = PDMCRITSECTRW_READ_STATE(&pThis->s.Core.u.s.u64State); 245 258 uint64_t u64OldState = u64State; 246 259 … … 378 391 for (;;) 379 392 { 380 u64OldState = u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State);393 u64OldState = u64State = PDMCRITSECTRW_READ_STATE(&pThis->s.Core.u.s.u64State); 381 394 c = (u64State & RTCSRW_CNT_RD_MASK) >> RTCSRW_CNT_RD_SHIFT; 382 395 AssertReturn(c > 0, pdmCritSectRwCorrupted(pThis, "Invalid read count on bailout")); … … 394 407 395 408 Assert(pThis->s.Core.fNeedReset); 396 u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State);409 u64State = PDMCRITSECTRW_READ_STATE(&pThis->s.Core.u.s.u64State); 397 410 if ((u64State & RTCSRW_DIR_MASK) == (RTCSRW_DIR_READ << RTCSRW_DIR_SHIFT)) 398 411 break; … … 423 436 break; 424 437 } 425 u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State);438 u64State = PDMCRITSECTRW_READ_STATE(&pThis->s.Core.u.s.u64State); 426 439 } 427 440 … … 460 473 461 474 ASMNopPause(); 462 u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State);475 u64State = PDMCRITSECTRW_READ_STATE(&pThis->s.Core.u.s.u64State); 463 476 u64OldState = u64State; 464 477 } … … 466 479 /* got it! */ 467 480 STAM_REL_COUNTER_INC(&pThis->s.CTX_MID_Z(Stat,EnterShared)); 468 Assert(( ASMAtomicReadU64(&pThis->s.Core.u.s.u64State) & RTCSRW_DIR_MASK) == (RTCSRW_DIR_READ << RTCSRW_DIR_SHIFT));481 Assert((PDMCRITSECTRW_READ_STATE(&pThis->s.Core.u.s.u64State) & RTCSRW_DIR_MASK) == (RTCSRW_DIR_READ << RTCSRW_DIR_SHIFT)); 469 482 return VINF_SUCCESS; 470 483 … … 639 652 * Check the direction and take action accordingly. 640 653 */ 641 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State);654 uint64_t u64State = PDMCRITSECTRW_READ_STATE(&pThis->s.Core.u.s.u64State); 642 655 uint64_t u64OldState = u64State; 643 656 if ((u64State & RTCSRW_DIR_MASK) == (RTCSRW_DIR_READ << RTCSRW_DIR_SHIFT)) … … 715 728 716 729 ASMNopPause(); 717 u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State);730 u64State = PDMCRITSECTRW_READ_STATE(&pThis->s.Core.u.s.u64State); 718 731 u64OldState = u64State; 719 732 } … … 793 806 for (;;) 794 807 { 795 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State);808 uint64_t u64State = PDMCRITSECTRW_READ_STATE(&pThis->s.Core.u.s.u64State); 796 809 uint64_t const u64OldState = u64State; 797 810 uint64_t c = (u64State & RTCSRW_CNT_WR_MASK) >> RTCSRW_CNT_WR_SHIFT; … … 817 830 { 818 831 RT_NOREF(hThreadSelf, fNoVal, pSrcPos); 819 Assert((ASMAtomicReadU64(&pThis->s.Core.u.s.u64State) & RTCSRW_DIR_MASK) == (RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT)); 820 821 #if 1 /** @todo consider generating less noise... */ 832 Assert((PDMCRITSECTRW_READ_STATE(&pThis->s.Core.u.s.u64State) & RTCSRW_DIR_MASK) == (RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT)); 833 834 #ifdef PDMCRITSECTRW_WITH_LESS_ATOMIC_STUFF 835 pThis->s.Core.cWriteRecursions = 1; 836 #else 822 837 ASMAtomicWriteU32(&pThis->s.Core.cWriteRecursions, 1); 823 #else824 pThis->s.Core.cWriteRecursions = 1;825 838 #endif 826 839 Assert(pThis->s.Core.cWriterReads == 0); … … 982 995 * Try take exclusive write ownership. 983 996 */ 984 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State);997 uint64_t u64State = PDMCRITSECTRW_READ_STATE(&pThis->s.Core.u.s.u64State); 985 998 if ((u64State & RTCSRW_DIR_MASK) == (RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT)) 986 999 { … … 1036 1049 if (hNativeSelf == hNativeWriter) 1037 1050 { 1038 Assert(( ASMAtomicReadU64(&pThis->s.Core.u.s.u64State) & RTCSRW_DIR_MASK) == (RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT));1051 Assert((PDMCRITSECTRW_READ_STATE(&pThis->s.Core.u.s.u64State) & RTCSRW_DIR_MASK) == (RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT)); 1039 1052 #if defined(PDMCRITSECTRW_STRICT) && defined(IN_RING3) 1040 1053 if (!fNoVal) … … 1046 1059 #endif 1047 1060 STAM_REL_COUNTER_INC(&pThis->s.CTX_MID_Z(Stat,EnterExcl)); 1061 #ifdef PDMCRITSECTRW_WITH_LESS_ATOMIC_STUFF 1062 uint32_t const cDepth = ++pThis->s.Core.cWriteRecursions; 1063 #else 1048 1064 uint32_t const cDepth = ASMAtomicIncU32(&pThis->s.Core.cWriteRecursions); 1065 #endif 1049 1066 AssertReturnStmt(cDepth > 1 && cDepth <= PDM_CRITSECTRW_MAX_RECURSIONS, 1050 1067 ASMAtomicDecU32(&pThis->s.Core.cWriteRecursions), … … 1056 1073 * Get cracking. 1057 1074 */ 1058 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State);1075 uint64_t u64State = PDMCRITSECTRW_READ_STATE(&pThis->s.Core.u.s.u64State); 1059 1076 uint64_t u64OldState = u64State; 1060 1077 … … 1109 1126 1110 1127 ASMNopPause(); 1111 u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State);1128 u64State = PDMCRITSECTRW_READ_STATE(&pThis->s.Core.u.s.u64State); 1112 1129 u64OldState = u64State; 1113 1130 } … … 1396 1413 { 1397 1414 RTCRITSECTRWSTATE OldState; 1398 OldState.s.u64State = ASMAtomicUoReadU64(&pThis->s.Core.u.s.u64State);1415 OldState.s.u64State = PDMCRITSECTRW_READ_STATE(&pThis->s.Core.u.s.u64State); 1399 1416 if (OldState.s.u64State == ((UINT64_C(1) << RTCSRW_CNT_WR_SHIFT) | (RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT))) 1400 1417 { … … 1406 1423 NewState.s.hNativeWriter = NIL_RTNATIVETHREAD; 1407 1424 1425 # ifdef PDMCRITSECTRW_WITH_LESS_ATOMIC_STUFF 1408 1426 pThis->s.Core.cWriteRecursions = 0; 1427 # else 1428 ASMAtomicWriteU32(&pThis->s.Core.cWriteRecursions, 0); 1429 # endif 1409 1430 STAM_PROFILE_ADV_STOP(&pThis->s.StatWriteLocked, swl); 1410 1431 … … 1427 1448 # endif 1428 1449 { 1450 # ifdef PDMCRITSECTRW_WITH_LESS_ATOMIC_STUFF 1451 pThis->s.Core.cWriteRecursions = 0; 1452 # else 1429 1453 ASMAtomicWriteU32(&pThis->s.Core.cWriteRecursions, 0); 1454 # endif 1430 1455 STAM_PROFILE_ADV_STOP(&pThis->s.StatWriteLocked, swl); 1431 1456 ASMAtomicWriteHandle(&pThis->s.Core.u.s.hNativeWriter, NIL_RTNATIVETHREAD); … … 1433 1458 for (;;) 1434 1459 { 1435 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State);1460 uint64_t u64State = PDMCRITSECTRW_READ_STATE(&pThis->s.Core.u.s.u64State); 1436 1461 uint64_t u64OldState = u64State; 1437 1462 … … 1520 1545 } 1521 1546 #endif 1547 #ifdef PDMCRITSECTRW_WITH_LESS_ATOMIC_STUFF 1548 uint32_t const cDepth = --pThis->s.Core.cWriteRecursions; 1549 #else 1522 1550 uint32_t const cDepth = ASMAtomicDecU32(&pThis->s.Core.cWriteRecursions); 1551 #endif 1523 1552 AssertReturn(cDepth != 0 && cDepth < UINT32_MAX, pdmCritSectRwCorrupted(pThis, "Invalid write recursion value on leave")); 1524 1553 } … … 1618 1647 * Inspect the state. 1619 1648 */ 1620 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State);1649 uint64_t u64State = PDMCRITSECTRW_READ_STATE(&pThis->s.Core.u.s.u64State); 1621 1650 if ((u64State & RTCSRW_DIR_MASK) == (RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT)) 1622 1651 { … … 1722 1751 * Return the requested data. 1723 1752 */ 1724 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State);1753 uint64_t u64State = PDMCRITSECTRW_READ_STATE(&pThis->s.Core.u.s.u64State); 1725 1754 if ((u64State & RTCSRW_DIR_MASK) != (RTCSRW_DIR_READ << RTCSRW_DIR_SHIFT)) 1726 1755 return 0;
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