Changeset 91014 in vbox
- Timestamp:
- Aug 31, 2021 1:03:39 AM (3 years ago)
- Location:
- trunk
- Files:
-
- 12 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/Config.kmk
r91008 r91014 455 455 if1of ($(KBUILD_TARGET), win) 456 456 VBOX_WITH_NATIVE_NEM = 1 457 endif458 # Enables mapping guest RAM into host kernel space.459 if1of ($(KBUILD_TARGET), darwin linux solaris win)460 VBOX_WITH_RAM_IN_KERNEL := 1461 457 endif 462 458 # Enables the new breakpoint handling code, see @bugref{8650} -
trunk/src/VBox/VMM/Config.kmk
r86653 r91014 69 69 endif 70 70 endif 71 ifdef VBOX_WITH_RAM_IN_KERNEL 72 VMM_COMMON_DEFS += VBOX_WITH_RAM_IN_KERNEL 73 if1of ($(KBUILD_TARGET), linux solaris) # Hosts that implements SUPR0HCPhysToVirt. 74 VMM_COMMON_DEFS += VBOX_WITH_LINEAR_HOST_PHYS_MEM 75 endif 71 if1of ($(KBUILD_TARGET), linux solaris) # Hosts that implements SUPR0HCPhysToVirt. 72 VMM_COMMON_DEFS += VBOX_WITH_LINEAR_HOST_PHYS_MEM 76 73 endif 77 74 -
trunk/src/VBox/VMM/VMMAll/PGMAll.cpp
r90997 r91014 2206 2206 if (RT_SUCCESS(rc)) 2207 2207 { 2208 # ifdef VBOX_WITH_RAM_IN_KERNEL2209 2208 rc = pgmPhysGCPhys2CCPtrInternalDepr(pVM, pPage, GCPhysCR3, (void **)ppPd); 2210 2209 if (RT_SUCCESS(rc)) 2211 2210 { 2212 # 2211 # ifdef IN_RING3 2213 2212 pVCpu->pgm.s.pGst32BitPdR0 = NIL_RTR0PTR; 2214 2213 pVCpu->pgm.s.pGst32BitPdR3 = *ppPd; 2215 # 2214 # else 2216 2215 pVCpu->pgm.s.pGst32BitPdR3 = NIL_RTR0PTR; 2217 2216 pVCpu->pgm.s.pGst32BitPdR0 = *ppPd; 2218 # 2217 # endif 2219 2218 PGM_UNLOCK(pVM); 2220 2219 return VINF_SUCCESS; 2221 2220 } 2222 # else2223 RTHCPTR HCPtrGuestCR3;2224 rc = pgmPhysGCPhys2CCPtrInternalDepr(pVM, pPage, GCPhysCR3, (void **)&HCPtrGuestCR3);2225 if (RT_SUCCESS(rc))2226 {2227 pVCpu->pgm.s.pGst32BitPdR3 = (R3PTRTYPE(PX86PD))HCPtrGuestCR3;2228 # ifndef VBOX_WITH_2X_4GB_ADDR_SPACE2229 pVCpu->pgm.s.pGst32BitPdR0 = (R0PTRTYPE(PX86PD))HCPtrGuestCR3;2230 # endif2231 *ppPd = (PX86PD)HCPtrGuestCR3;2232 2233 PGM_UNLOCK(pVM);2234 return VINF_SUCCESS;2235 }2236 # endif2237 2221 AssertRC(rc); 2238 2222 } … … 2263 2247 if (RT_SUCCESS(rc)) 2264 2248 { 2265 # ifdef VBOX_WITH_RAM_IN_KERNEL2266 2249 rc = pgmPhysGCPhys2CCPtrInternalDepr(pVM, pPage, GCPhysCR3, (void **)ppPdpt); 2267 2250 if (RT_SUCCESS(rc)) 2268 2251 { 2269 # 2252 # ifdef IN_RING3 2270 2253 pVCpu->pgm.s.pGstPaePdptR0 = NIL_RTR0PTR; 2271 2254 pVCpu->pgm.s.pGstPaePdptR3 = *ppPdpt; 2272 # 2255 # else 2273 2256 pVCpu->pgm.s.pGstPaePdptR3 = NIL_RTR3PTR; 2274 2257 pVCpu->pgm.s.pGstPaePdptR0 = *ppPdpt; 2275 # 2258 # endif 2276 2259 PGM_UNLOCK(pVM); 2277 2260 return VINF_SUCCESS; 2278 2261 } 2279 # else2280 RTHCPTR HCPtrGuestCR3;2281 rc = pgmPhysGCPhys2CCPtrInternalDepr(pVM, pPage, GCPhysCR3, (void **)&HCPtrGuestCR3);2282 if (RT_SUCCESS(rc))2283 {2284 pVCpu->pgm.s.pGstPaePdptR3 = (R3PTRTYPE(PX86PDPT))HCPtrGuestCR3;2285 # ifndef VBOX_WITH_2X_4GB_ADDR_SPACE2286 pVCpu->pgm.s.pGstPaePdptR0 = (R0PTRTYPE(PX86PDPT))HCPtrGuestCR3;2287 # endif2288 *ppPdpt = (PX86PDPT)HCPtrGuestCR3;2289 2290 PGM_UNLOCK(pVM);2291 return VINF_SUCCESS;2292 }2293 # endif2294 2262 AssertRC(rc); 2295 2263 } … … 2326 2294 if (RT_SUCCESS(rc)) 2327 2295 { 2328 # ifdef VBOX_WITH_RAM_IN_KERNEL2329 2296 rc = pgmPhysGCPhys2CCPtrInternalDepr(pVM, pPage, GCPhys, (void **)ppPd); 2330 2297 AssertRC(rc); 2331 2298 if (RT_SUCCESS(rc)) 2332 2299 { 2333 # 2300 # ifdef IN_RING3 2334 2301 pVCpu->pgm.s.apGstPaePDsR0[iPdpt] = NIL_RTR0PTR; 2335 2302 pVCpu->pgm.s.apGstPaePDsR3[iPdpt] = *ppPd; 2336 # 2303 # else 2337 2304 pVCpu->pgm.s.apGstPaePDsR3[iPdpt] = NIL_RTR3PTR; 2338 2305 pVCpu->pgm.s.apGstPaePDsR0[iPdpt] = *ppPd; 2339 # 2306 # endif 2340 2307 if (fChanged) 2341 2308 pVCpu->pgm.s.aGCPhysGstPaePDs[iPdpt] = GCPhys; … … 2343 2310 return VINF_SUCCESS; 2344 2311 } 2345 # else2346 RTHCPTR HCPtr = NIL_RTHCPTR;2347 rc = pgmPhysGCPhys2CCPtrInternalDepr(pVM, pPage, GCPhys, &HCPtr);2348 AssertRC(rc);2349 if (RT_SUCCESS(rc))2350 {2351 pVCpu->pgm.s.apGstPaePDsR3[iPdpt] = (R3PTRTYPE(PX86PDPAE))HCPtr;2352 # ifndef VBOX_WITH_2X_4GB_ADDR_SPACE2353 pVCpu->pgm.s.apGstPaePDsR0[iPdpt] = (R0PTRTYPE(PX86PDPAE))HCPtr;2354 # endif2355 if (fChanged)2356 pVCpu->pgm.s.aGCPhysGstPaePDs[iPdpt] = GCPhys;2357 2358 *ppPd = pVCpu->pgm.s.CTX_SUFF(apGstPaePDs)[iPdpt];2359 PGM_UNLOCK(pVM);2360 return VINF_SUCCESS;2361 }2362 # endif2363 2312 } 2364 2313 … … 2394 2343 if (RT_SUCCESS(rc)) 2395 2344 { 2396 # ifdef VBOX_WITH_RAM_IN_KERNEL2397 2345 rc = pgmPhysGCPhys2CCPtrInternalDepr(pVM, pPage, GCPhysCR3, (void **)ppPml4); 2398 2346 if (RT_SUCCESS(rc)) 2399 2347 { 2400 # 2348 # ifdef IN_RING3 2401 2349 pVCpu->pgm.s.pGstAmd64Pml4R0 = NIL_RTR0PTR; 2402 2350 pVCpu->pgm.s.pGstAmd64Pml4R3 = *ppPml4; 2403 # 2351 # else 2404 2352 pVCpu->pgm.s.pGstAmd64Pml4R3 = NIL_RTR3PTR; 2405 2353 pVCpu->pgm.s.pGstAmd64Pml4R0 = *ppPml4; 2406 # 2354 # endif 2407 2355 PGM_UNLOCK(pVM); 2408 2356 return VINF_SUCCESS; 2409 2357 } 2410 # else2411 RTHCPTR HCPtrGuestCR3;2412 rc = pgmPhysGCPhys2CCPtrInternalDepr(pVM, pPage, GCPhysCR3, (void **)&HCPtrGuestCR3);2413 if (RT_SUCCESS(rc))2414 {2415 pVCpu->pgm.s.pGstAmd64Pml4R3 = (R3PTRTYPE(PX86PML4))HCPtrGuestCR3;2416 # ifndef VBOX_WITH_2X_4GB_ADDR_SPACE2417 pVCpu->pgm.s.pGstAmd64Pml4R0 = (R0PTRTYPE(PX86PML4))HCPtrGuestCR3;2418 # endif2419 *ppPml4 = (PX86PML4)HCPtrGuestCR3;2420 2421 PGM_UNLOCK(pVM);2422 return VINF_SUCCESS;2423 }2424 # endif2425 2358 } 2426 2359 -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r90439 r91014 4323 4323 { 4324 4324 # if PGM_GST_TYPE == PGM_TYPE_32BIT 4325 # ifdef VBOX_WITH_RAM_IN_KERNEL 4326 # ifdef IN_RING3 4325 # ifdef IN_RING3 4327 4326 pVCpu->pgm.s.pGst32BitPdR3 = (PX86PD)HCPtrGuestCR3; 4328 4327 pVCpu->pgm.s.pGst32BitPdR0 = NIL_RTR0PTR; 4329 # 4328 # else 4330 4329 pVCpu->pgm.s.pGst32BitPdR3 = NIL_RTR3PTR; 4331 4330 pVCpu->pgm.s.pGst32BitPdR0 = (PX86PD)HCPtrGuestCR3; 4332 # endif4333 # else4334 pVCpu->pgm.s.pGst32BitPdR3 = (R3PTRTYPE(PX86PD))HCPtrGuestCR3;4335 # ifndef VBOX_WITH_2X_4GB_ADDR_SPACE4336 pVCpu->pgm.s.pGst32BitPdR0 = (R0PTRTYPE(PX86PD))HCPtrGuestCR3;4337 # endif4338 4331 # endif 4339 4332 4340 4333 # elif PGM_GST_TYPE == PGM_TYPE_PAE 4341 # ifdef VBOX_WITH_RAM_IN_KERNEL 4342 # ifdef IN_RING3 4334 # ifdef IN_RING3 4343 4335 pVCpu->pgm.s.pGstPaePdptR3 = (PX86PDPT)HCPtrGuestCR3; 4344 4336 pVCpu->pgm.s.pGstPaePdptR0 = NIL_RTR0PTR; 4345 # 4337 # else 4346 4338 pVCpu->pgm.s.pGstPaePdptR3 = NIL_RTR3PTR; 4347 4339 pVCpu->pgm.s.pGstPaePdptR0 = (PX86PDPT)HCPtrGuestCR3; 4348 # endif4349 # else4350 pVCpu->pgm.s.pGstPaePdptR3 = (R3PTRTYPE(PX86PDPT))HCPtrGuestCR3;4351 # ifndef VBOX_WITH_2X_4GB_ADDR_SPACE4352 pVCpu->pgm.s.pGstPaePdptR0 = (R0PTRTYPE(PX86PDPT))HCPtrGuestCR3;4353 # endif4354 4340 # endif 4355 4341 … … 4372 4358 if (RT_SUCCESS(rc2)) 4373 4359 { 4374 # ifdef VBOX_WITH_RAM_IN_KERNEL 4375 # ifdef IN_RING3 4360 # ifdef IN_RING3 4376 4361 pVCpu->pgm.s.apGstPaePDsR3[i] = (PX86PDPAE)HCPtr; 4377 4362 pVCpu->pgm.s.apGstPaePDsR0[i] = NIL_RTR0PTR; 4378 # 4363 # else 4379 4364 pVCpu->pgm.s.apGstPaePDsR3[i] = NIL_RTR3PTR; 4380 4365 pVCpu->pgm.s.apGstPaePDsR0[i] = (PX86PDPAE)HCPtr; 4381 # endif4382 # else4383 pVCpu->pgm.s.apGstPaePDsR3[i] = (R3PTRTYPE(PX86PDPAE))HCPtr;4384 # ifndef VBOX_WITH_2X_4GB_ADDR_SPACE4385 pVCpu->pgm.s.apGstPaePDsR0[i] = (R0PTRTYPE(PX86PDPAE))HCPtr;4386 # endif4387 4366 # endif 4388 4367 pVCpu->pgm.s.aGCPhysGstPaePDs[i] = GCPhys; … … 4400 4379 4401 4380 # elif PGM_GST_TYPE == PGM_TYPE_AMD64 4402 # ifdef VBOX_WITH_RAM_IN_KERNEL 4403 # ifdef IN_RING3 4381 # ifdef IN_RING3 4404 4382 pVCpu->pgm.s.pGstAmd64Pml4R3 = (PX86PML4)HCPtrGuestCR3; 4405 4383 pVCpu->pgm.s.pGstAmd64Pml4R0 = NIL_RTR0PTR; 4406 # 4384 # else 4407 4385 pVCpu->pgm.s.pGstAmd64Pml4R3 = NIL_RTR3PTR; 4408 4386 pVCpu->pgm.s.pGstAmd64Pml4R0 = (PX86PML4)HCPtrGuestCR3; 4409 # endif4410 # else4411 pVCpu->pgm.s.pGstAmd64Pml4R3 = (R3PTRTYPE(PX86PML4))HCPtrGuestCR3;4412 # ifndef VBOX_WITH_2X_4GB_ADDR_SPACE4413 pVCpu->pgm.s.pGstAmd64Pml4R0 = (R0PTRTYPE(PX86PML4))HCPtrGuestCR3;4414 # endif4415 4387 # endif 4416 4388 # endif -
trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp
r90439 r91014 573 573 pVM->pgm.s.PhysTlbR0.aEntries[i].GCPhys = NIL_RTGCPHYS; 574 574 pVM->pgm.s.PhysTlbR0.aEntries[i].pPage = 0; 575 #ifndef VBOX_WITH_RAM_IN_KERNEL576 pVM->pgm.s.PhysTlbR0.aEntries[i].pMap = 0;577 #endif578 575 pVM->pgm.s.PhysTlbR0.aEntries[i].pv = 0; 579 576 } … … 607 604 pVM->pgm.s.PhysTlbR0.aEntries[idx].GCPhys = NIL_RTGCPHYS; 608 605 pVM->pgm.s.PhysTlbR0.aEntries[idx].pPage = 0; 609 #ifndef VBOX_WITH_RAM_IN_KERNEL610 pVM->pgm.s.PhysTlbR0.aEntries[idx].pMap = 0;611 #endif612 606 pVM->pgm.s.PhysTlbR0.aEntries[idx].pv = 0; 613 607 … … 1151 1145 AssertReturn(idChunk != NIL_GMM_CHUNKID, VERR_INVALID_PARAMETER); 1152 1146 1153 #if defined(IN_RING0) && defined(VBOX_WITH_RAM_IN_KERNEL)1147 #ifdef IN_RING0 1154 1148 # ifdef VBOX_WITH_LINEAR_HOST_PHYS_MEM 1155 1149 return SUPR0HCPhysToVirt(HCPhys & ~(RTHCPHYS)PAGE_OFFSET_MASK, ppv); … … 1181 1175 else 1182 1176 { 1183 # ifdef IN_RING01184 int rc = VMMRZCallRing3NoCpu(pVM, VMMCALLRING3_PGM_MAP_CHUNK, idChunk);1185 AssertRCReturn(rc, rc);1186 pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);1187 Assert(pMap);1188 # else1189 1177 int rc = pgmR3PhysChunkMap(pVM, idChunk, &pMap); 1190 1178 if (RT_FAILURE(rc)) 1191 1179 return rc; 1192 # endif1193 1180 } 1194 1181 … … 1246 1233 AssertLogRelReturn(iPage < (pMmio2Range->RamRange.cb >> PAGE_SHIFT), VERR_PGM_PHYS_PAGE_MAP_MMIO2_IPE); 1247 1234 *ppMap = NULL; 1248 # if defined(IN_RING0) && defined(VBOX_WITH_ RAM_IN_KERNEL) && defined(VBOX_WITH_LINEAR_HOST_PHYS_MEM)1235 # if defined(IN_RING0) && defined(VBOX_WITH_LINEAR_HOST_PHYS_MEM) 1249 1236 return SUPR0HCPhysToVirt(PGM_PAGE_GET_HCPHYS(pPage), ppv); 1250 # elif defined(IN_RING0) && defined(VBOX_WITH_RAM_IN_KERNEL)1237 # elif defined(IN_RING0) 1251 1238 *ppv = (uint8_t *)pMmio2Range->pvR0 + ((uintptr_t)iPage << PAGE_SHIFT); 1252 1239 return VINF_SUCCESS; … … 1276 1263 } 1277 1264 1278 # if defined(IN_RING0) && defined(VBOX_WITH_ RAM_IN_KERNEL) && defined(VBOX_WITH_LINEAR_HOST_PHYS_MEM)1265 # if defined(IN_RING0) && defined(VBOX_WITH_LINEAR_HOST_PHYS_MEM) 1279 1266 /* 1280 1267 * Just use the physical address. … … 1283 1270 return SUPR0HCPhysToVirt(PGM_PAGE_GET_HCPHYS(pPage), ppv); 1284 1271 1285 # elif defined(IN_RING0) && defined(VBOX_WITH_RAM_IN_KERNEL)1272 # elif defined(IN_RING0) 1286 1273 /* 1287 1274 * Go by page ID thru GMMR0. … … 1317 1304 else 1318 1305 { 1319 # ifdef IN_RING01320 int rc = VMMRZCallRing3NoCpu(pVM, VMMCALLRING3_PGM_MAP_CHUNK, idChunk);1321 AssertRCReturn(rc, rc);1322 pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);1323 Assert(pMap);1324 # else1325 1306 int rc = pgmR3PhysChunkMap(pVM, idChunk, &pMap); 1326 1307 if (RT_FAILURE(rc)) 1327 1308 return rc; 1328 # endif1329 1309 AssertPtr(pMap->pv); 1330 1310 } … … 1340 1320 *ppMap = pMap; 1341 1321 return VINF_SUCCESS; 1342 # endif /* !IN_RING0 || !VBOX_WITH_RAM_IN_KERNEL*/1322 # endif /* !IN_RING0 */ 1343 1323 } 1344 1324 … … 1493 1473 if (RT_FAILURE(rc)) 1494 1474 return rc; 1495 # if !defined(IN_RING0) || !defined(VBOX_WITH_RAM_IN_KERNEL)1475 # ifndef IN_RING0 1496 1476 pTlbe->pMap = pMap; 1497 1477 # endif … … 1502 1482 { 1503 1483 AssertMsg(PGM_PAGE_GET_HCPHYS(pPage) == pVM->pgm.s.HCPhysZeroPg, ("%RGp/%R[pgmpage]\n", GCPhys, pPage)); 1504 # if !defined(IN_RING0) || !defined(VBOX_WITH_RAM_IN_KERNEL)1484 # ifndef IN_RING0 1505 1485 pTlbe->pMap = NULL; 1506 1486 # endif … … 1579 1559 DECLINLINE(void) pgmPhysPageMapLockForWriting(PVM pVM, PPGMPAGE pPage, PPGMPAGEMAPTLBE pTlbe, PPGMPAGEMAPLOCK pLock) 1580 1560 { 1581 # if !defined(IN_RING0) || !defined(VBOX_WITH_RAM_IN_KERNEL)1561 # ifndef IN_RING0 1582 1562 PPGMPAGEMAP pMap = pTlbe->pMap; 1583 1563 if (pMap) … … 1598 1578 PGM_PAGE_INC_WRITE_LOCKS(pPage); 1599 1579 AssertMsgFailed(("%R[pgmpage] is entering permanent write locked state!\n", pPage)); 1600 # if !defined(IN_RING0) || !defined(VBOX_WITH_RAM_IN_KERNEL)1580 # ifndef IN_RING0 1601 1581 if (pMap) 1602 1582 pMap->cRefs++; /* Extra ref to prevent it from going away. */ … … 1605 1585 1606 1586 pLock->uPageAndType = (uintptr_t)pPage | PGMPAGEMAPLOCK_TYPE_WRITE; 1607 # if !defined(IN_RING0) || !defined(VBOX_WITH_RAM_IN_KERNEL)1587 # ifndef IN_RING0 1608 1588 pLock->pvMap = pMap; 1609 1589 # else … … 1622 1602 DECLINLINE(void) pgmPhysPageMapLockForReading(PVM pVM, PPGMPAGE pPage, PPGMPAGEMAPTLBE pTlbe, PPGMPAGEMAPLOCK pLock) 1623 1603 { 1624 # if !defined(IN_RING0) || !defined(VBOX_WITH_RAM_IN_KERNEL)1604 # ifndef IN_RING0 1625 1605 PPGMPAGEMAP pMap = pTlbe->pMap; 1626 1606 if (pMap) … … 1641 1621 PGM_PAGE_INC_READ_LOCKS(pPage); 1642 1622 AssertMsgFailed(("%R[pgmpage] is entering permanent read locked state!\n", pPage)); 1643 # if !defined(IN_RING0) || !defined(VBOX_WITH_RAM_IN_KERNEL)1623 # ifndef IN_RING0 1644 1624 if (pMap) 1645 1625 pMap->cRefs++; /* Extra ref to prevent it from going away. */ … … 1648 1628 1649 1629 pLock->uPageAndType = (uintptr_t)pPage | PGMPAGEMAPLOCK_TYPE_READ; 1650 # if !defined(IN_RING0) || !defined(VBOX_WITH_RAM_IN_KERNEL)1630 # ifndef IN_RING0 1651 1631 pLock->pvMap = pMap; 1652 1632 # else … … 1960 1940 VMMDECL(void) PGMPhysReleasePageMappingLock(PVMCC pVM, PPGMPAGEMAPLOCK pLock) 1961 1941 { 1962 # if !defined(IN_RING0) || !defined(VBOX_WITH_RAM_IN_KERNEL)1942 # ifndef IN_RING0 1963 1943 PPGMPAGEMAP pMap = (PPGMPAGEMAP)pLock->pvMap; 1964 1944 # endif … … 2004 1984 } 2005 1985 2006 # if !defined(IN_RING0) || !defined(VBOX_WITH_RAM_IN_KERNEL)1986 # ifndef IN_RING0 2007 1987 if (pMap) 2008 1988 { -
trunk/src/VBox/VMM/VMMR0/GMMR0.cpp
r90784 r91014 194 194 #endif 195 195 196 #if (!defined(VBOX_WITH_RAM_IN_KERNEL) || defined(VBOX_WITH_LINEAR_HOST_PHYS_MEM)) \ 197 && !defined(RT_OS_DARWIN) 196 #if defined(VBOX_WITH_LINEAR_HOST_PHYS_MEM) && !defined(RT_OS_DARWIN) 198 197 /** Enable the legacy mode code (will be dropped soon). */ 199 198 # define GMM_WITH_LEGACY_MODE … … 413 412 * and related frees.) */ 414 413 RTR0MEMOBJ hMemObj; 415 #if defined(VBOX_WITH_RAM_IN_KERNEL) && !defined(VBOX_WITH_LINEAR_HOST_PHYS_MEM)414 #ifndef VBOX_WITH_LINEAR_HOST_PHYS_MEM 416 415 /** Pointer to the kernel mapping. */ 417 416 uint8_t *pbMapping; … … 2238 2237 #endif 2239 2238 2240 #if defined(VBOX_WITH_RAM_IN_KERNEL) && !defined(VBOX_WITH_LINEAR_HOST_PHYS_MEM)2239 #ifndef VBOX_WITH_LINEAR_HOST_PHYS_MEM 2241 2240 /* 2242 2241 * Get a ring-0 mapping of the object. … … 2270 2269 */ 2271 2270 pChunk->hMemObj = hMemObj; 2272 #if defined(VBOX_WITH_RAM_IN_KERNEL) && !defined(VBOX_WITH_LINEAR_HOST_PHYS_MEM)2271 #ifndef VBOX_WITH_LINEAR_HOST_PHYS_MEM 2273 2272 pChunk->pbMapping = pbMapping; 2274 2273 #endif … … 3521 3520 RTMemFree(pChunk); 3522 3521 3523 #if defined(VBOX_WITH_RAM_IN_KERNEL) && !defined(VBOX_WITH_LINEAR_HOST_PHYS_MEM)3522 #ifndef VBOX_WITH_LINEAR_HOST_PHYS_MEM 3524 3523 int rc = RTR0MemObjFree(hMemObj, true /* fFreeMappings */); 3525 3524 #else … … 4524 4523 } 4525 4524 4526 #if defined(VBOX_WITH_RAM_IN_KERNEL) && !defined(VBOX_WITH_LINEAR_HOST_PHYS_MEM) 4527 4525 4526 #ifndef VBOX_WITH_LINEAR_HOST_PHYS_MEM 4528 4527 /** 4529 4528 * Gets the ring-0 virtual address for the given page. … … 4601 4600 return VERR_GMM_NOT_PAGE_OWNER; 4602 4601 } 4603 4604 #endif 4602 #endif /* !VBOX_WITH_LINEAR_HOST_PHYS_MEM */ 4605 4603 4606 4604 #ifdef VBOX_WITH_PAGE_SHARING -
trunk/src/VBox/VMM/VMMR0/GVMMR0.cpp
r90897 r91014 107 107 * be logged, written to the VMs assertion text buffer, and @a a_BadExpr is 108 108 * executed. */ 109 #if (defined(VBOX_STRICT) || 1) && !defined(VBOX_WITH_RAM_IN_KERNEL) 110 # define GVMM_CHECK_SMAP_SETUP() uint32_t const fKernelFeatures = SUPR0GetKernelFeatures() 111 # define GVMM_CHECK_SMAP_CHECK(a_BadExpr) \ 112 do { \ 113 if (fKernelFeatures & SUPKERNELFEATURES_SMAP) \ 114 { \ 115 RTCCUINTREG fEflCheck = ASMGetFlags(); \ 116 if (RT_LIKELY(fEflCheck & X86_EFL_AC)) \ 117 { /* likely */ } \ 118 else \ 119 { \ 120 SUPR0Printf("%s, line %d: EFLAGS.AC is clear! (%#x)\n", __FUNCTION__, __LINE__, (uint32_t)fEflCheck); \ 121 a_BadExpr; \ 122 } \ 123 } \ 124 } while (0) 125 # define GVMM_CHECK_SMAP_CHECK2(a_pGVM, a_BadExpr) \ 126 do { \ 127 if (fKernelFeatures & SUPKERNELFEATURES_SMAP) \ 128 { \ 129 RTCCUINTREG fEflCheck = ASMGetFlags(); \ 130 if (RT_LIKELY(fEflCheck & X86_EFL_AC)) \ 131 { /* likely */ } \ 132 else \ 133 { \ 134 SUPR0BadContext((a_pGVM) ? (a_pGVM)->pSession : NULL, __FILE__, __LINE__, "EFLAGS.AC is zero!"); \ 135 a_BadExpr; \ 136 } \ 137 } \ 138 } while (0) 139 #else 140 # define GVMM_CHECK_SMAP_SETUP() uint32_t const fKernelFeatures = 0 141 # define GVMM_CHECK_SMAP_CHECK(a_BadExpr) NOREF(fKernelFeatures) 142 # define GVMM_CHECK_SMAP_CHECK2(a_pGVM, a_BadExpr) NOREF(fKernelFeatures) 143 #endif 109 #define GVMM_CHECK_SMAP_SETUP() uint32_t const fKernelFeatures = 0 110 #define GVMM_CHECK_SMAP_CHECK(a_BadExpr) NOREF(fKernelFeatures) 111 #define GVMM_CHECK_SMAP_CHECK2(a_pGVM, a_BadExpr) NOREF(fKernelFeatures) 144 112 145 113 /** Special value that GVMMR0DeregisterVCpu sets. */ -
trunk/src/VBox/VMM/VMMR0/PGMR0.cpp
r90439 r91014 376 376 PPGMREGMMIO2RANGE pFirstRegMmio = pgmR0PhysMMIOExFind(pGVM, pDevIns, hMmio2); 377 377 AssertReturn(pFirstRegMmio, VERR_NOT_FOUND); 378 #if defined(VBOX_WITH_RAM_IN_KERNEL) && !defined(VBOX_WITH_LINEAR_HOST_PHYS_MEM)378 #ifndef VBOX_WITH_LINEAR_HOST_PHYS_MEM 379 379 uint8_t * const pvR0 = (uint8_t *)pFirstRegMmio->pvR0; 380 380 #else … … 394 394 * Do the mapping. 395 395 */ 396 #if defined(VBOX_WITH_RAM_IN_KERNEL) && !defined(VBOX_WITH_LINEAR_HOST_PHYS_MEM)396 #ifndef VBOX_WITH_LINEAR_HOST_PHYS_MEM 397 397 AssertPtr(pvR0); 398 398 *ppvMapping = pvR0 + offSub; -
trunk/src/VBox/VMM/VMMR0/VMMR0.cpp
r90999 r91014 92 92 * be logged, written to the VMs assertion text buffer, and @a a_BadExpr is 93 93 * executed. */ 94 #if (defined(VBOX_STRICT) || 1) && !defined(VBOX_WITH_RAM_IN_KERNEL) 95 # define VMM_CHECK_SMAP_SETUP() uint32_t const fKernelFeatures = SUPR0GetKernelFeatures() 96 # define VMM_CHECK_SMAP_CHECK(a_BadExpr) \ 97 do { \ 98 if (fKernelFeatures & SUPKERNELFEATURES_SMAP) \ 99 { \ 100 RTCCUINTREG fEflCheck = ASMGetFlags(); \ 101 if (RT_LIKELY(fEflCheck & X86_EFL_AC)) \ 102 { /* likely */ } \ 103 else \ 104 { \ 105 SUPR0Printf("%s, line %d: EFLAGS.AC is clear! (%#x)\n", __FUNCTION__, __LINE__, (uint32_t)fEflCheck); \ 106 a_BadExpr; \ 107 } \ 108 } \ 109 } while (0) 110 # define VMM_CHECK_SMAP_CHECK2(a_pGVM, a_BadExpr) \ 111 do { \ 112 if (fKernelFeatures & SUPKERNELFEATURES_SMAP) \ 113 { \ 114 RTCCUINTREG fEflCheck = ASMGetFlags(); \ 115 if (RT_LIKELY(fEflCheck & X86_EFL_AC)) \ 116 { /* likely */ } \ 117 else if (a_pGVM) \ 118 { \ 119 SUPR0BadContext((a_pGVM)->pSession, __FILE__, __LINE__, "EFLAGS.AC is zero!"); \ 120 RTStrPrintf((a_pGVM)->vmm.s.szRing0AssertMsg1, sizeof((a_pGVM)->vmm.s.szRing0AssertMsg1), \ 121 "%s, line %d: EFLAGS.AC is clear! (%#x)\n", __FUNCTION__, __LINE__, (uint32_t)fEflCheck); \ 122 a_BadExpr; \ 123 } \ 124 else \ 125 { \ 126 SUPR0Printf("%s, line %d: EFLAGS.AC is clear! (%#x)\n", __FUNCTION__, __LINE__, (uint32_t)fEflCheck); \ 127 a_BadExpr; \ 128 } \ 129 } \ 130 } while (0) 131 #else 132 # define VMM_CHECK_SMAP_SETUP() uint32_t const fKernelFeatures = 0 133 # define VMM_CHECK_SMAP_CHECK(a_BadExpr) NOREF(fKernelFeatures) 134 # define VMM_CHECK_SMAP_CHECK2(a_pGVM, a_BadExpr) NOREF(fKernelFeatures) 135 #endif 94 #define VMM_CHECK_SMAP_SETUP() uint32_t const fKernelFeatures = 0 95 #define VMM_CHECK_SMAP_CHECK(a_BadExpr) NOREF(fKernelFeatures) 96 #define VMM_CHECK_SMAP_CHECK2(a_pGVM, a_BadExpr) NOREF(fKernelFeatures) 136 97 137 98 -
trunk/src/VBox/VMM/VMMR3/PGMPhys.cpp
r90439 r91014 3037 3037 { 3038 3038 void *pvPages; 3039 #if defined(VBOX_WITH_RAM_IN_KERNEL) && !defined(VBOX_WITH_LINEAR_HOST_PHYS_MEM)3039 #ifndef VBOX_WITH_LINEAR_HOST_PHYS_MEM 3040 3040 RTR0PTR pvPagesR0; 3041 3041 rc = SUPR3PageAllocEx(cPages, 0 /*fFlags*/, &pvPages, &pvPagesR0, paPages); … … 3062 3062 { 3063 3063 pCur->pvR3 = pbCurPages; 3064 #if defined(VBOX_WITH_RAM_IN_KERNEL) && !defined(VBOX_WITH_LINEAR_HOST_PHYS_MEM)3064 #ifndef VBOX_WITH_LINEAR_HOST_PHYS_MEM 3065 3065 pCur->pvR0 = pvPagesR0 + (iSrcPage << PAGE_SHIFT); 3066 3066 #endif … … 4640 4640 #endif 4641 4641 4642 #ifndef VBOX_WITH_RAM_IN_KERNEL4643 for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.PhysTlbR0.aEntries); i++)4644 if (pVM->pgm.s.PhysTlbR0.aEntries[i].pMap == pChunk)4645 return 0;4646 #endif4647 4642 for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.PhysTlbR3.aEntries); i++) 4648 4643 if (pVM->pgm.s.PhysTlbR3.aEntries[i].pMap == pChunk) -
trunk/src/VBox/VMM/include/PGMInline.h
r87141 r91014 271 271 rc = VINF_SUCCESS; 272 272 AssertPtr(pTlbe->pv); 273 #if defined(IN_RING3) || !defined(VBOX_WITH_RAM_IN_KERNEL)273 #ifdef IN_RING3 274 274 Assert(!pTlbe->pMap || RT_VALID_PTR(pTlbe->pMap->pv)); 275 275 #endif -
trunk/src/VBox/VMM/include/PGMInternal.h
r90439 r91014 1476 1476 /** Pointer to the ring-3 mapping of the allocation. */ 1477 1477 RTR3PTR pvR3; 1478 #if defined(VBOX_WITH_RAM_IN_KERNEL) && !defined(VBOX_WITH_LINEAR_HOST_PHYS_MEM)1478 #ifndef VBOX_WITH_LINEAR_HOST_PHYS_MEM 1479 1479 /** Pointer to the ring-0 mapping of the allocation. */ 1480 1480 RTR0PTR pvR0; … … 1493 1493 uint8_t idMmio2; 1494 1494 /** Alignment padding for putting the ram range on a PGMPAGE alignment boundary. */ 1495 #if defined(VBOX_WITH_RAM_IN_KERNEL) && !defined(VBOX_WITH_LINEAR_HOST_PHYS_MEM)1495 #ifndef VBOX_WITH_LINEAR_HOST_PHYS_MEM 1496 1496 uint8_t abAlignment[HC_ARCH_BITS == 32 ? 6 + 4 : 2]; 1497 1497 #else … … 1610 1610 #endif 1611 1611 /** The chunk map. */ 1612 #if defined(VBOX_WITH_2X_4GB_ADDR_SPACE) || defined(VBOX_WITH_RAM_IN_KERNEL)1613 1612 R3PTRTYPE(PPGMCHUNKR3MAP) volatile pChunk; 1614 #else1615 R3R0PTRTYPE(PPGMCHUNKR3MAP) volatile pChunk;1616 #endif1617 1613 } PGMCHUNKR3MAPTLBE; 1618 1614 /** Pointer to the an allocation chunk ring-3 mapping TLB entry. */ … … 1662 1658 RTGCPHYS volatile GCPhys; 1663 1659 /** The guest page. */ 1664 #if defined(VBOX_WITH_2X_4GB_ADDR_SPACE) || defined(VBOX_WITH_RAM_IN_KERNEL)1665 1660 R3PTRTYPE(PPGMPAGE) volatile pPage; 1666 #else1667 R3R0PTRTYPE(PPGMPAGE) volatile pPage;1668 #endif1669 1661 /** Pointer to the page mapping tracking structure, PGMCHUNKR3MAP. */ 1670 #if defined(VBOX_WITH_2X_4GB_ADDR_SPACE) || defined(VBOX_WITH_RAM_IN_KERNEL)1671 1662 R3PTRTYPE(PPGMCHUNKR3MAP) volatile pMap; 1672 #else1673 R3R0PTRTYPE(PPGMCHUNKR3MAP) volatile pMap;1674 #endif1675 1663 /** The address */ 1676 #if defined(VBOX_WITH_2X_4GB_ADDR_SPACE) || defined(VBOX_WITH_RAM_IN_KERNEL)1677 1664 R3PTRTYPE(void *) volatile pv; 1678 #else1679 R3R0PTRTYPE(void *) volatile pv;1680 #endif1681 1665 #if HC_ARCH_BITS == 32 1682 1666 uint32_t u32Padding; /**< alignment padding. */ … … 1712 1696 /** @} */ 1713 1697 1714 #if defined(VBOX_WITH_RAM_IN_KERNEL) || defined(DOXYGEN_RUNNING) 1698 1715 1699 /** @name Ring-0 page mapping TLB 1716 1700 * @{ */ … … 1754 1738 #define PGM_PAGER0MAPTLB_IDX(GCPhys) ( ((GCPhys) >> PAGE_SHIFT) & (PGM_PAGER0MAPTLB_ENTRIES - 1) ) 1755 1739 /** @} */ 1756 #endif /* VBOX_WITH_RAM_IN_KERNEL || DOXYGEN_RUNNING */ 1740 1757 1741 1758 1742 /** … … 1918 1902 /** @typedef PPPGMPAGEMAP 1919 1903 * Pointer to a page mapper unit pointer for current context. */ 1920 #if defined(IN_RING0) && defined(VBOX_WITH_RAM_IN_KERNEL)1904 #if defined(IN_RING0) 1921 1905 typedef PPGMPAGER0MAPTLB PPGMPAGEMAPTLB; 1922 1906 typedef PPGMPAGER0MAPTLBE PPGMPAGEMAPTLBE; … … 3274 3258 PGMCHUNKR3MAPTLB Tlb; 3275 3259 /** The chunk tree, ordered by chunk id. */ 3276 #if defined(VBOX_WITH_2X_4GB_ADDR_SPACE) || defined(VBOX_WITH_RAM_IN_KERNEL)3277 3260 R3PTRTYPE(PAVLU32NODECORE) pTree; 3278 #else3279 R3R0PTRTYPE(PAVLU32NODECORE) pTree;3280 #endif3281 3261 #if HC_ARCH_BITS == 32 3282 3262 uint32_t u32Alignment0; … … 3296 3276 /** The page mapping TLB for ring-3. */ 3297 3277 PGMPAGER3MAPTLB PhysTlbR3; 3298 #ifdef VBOX_WITH_RAM_IN_KERNEL3299 3278 /** The page mapping TLB for ring-0. */ 3300 3279 PGMPAGER0MAPTLB PhysTlbR0; 3301 #else3302 /** The page mapping TLB for ring-0 (still using ring-3 mappings). */3303 PGMPAGER3MAPTLB PhysTlbR0;3304 #endif3305 3280 3306 3281 /** @name The zero page.
Note:
See TracChangeset
for help on using the changeset viewer.