VirtualBox

Changeset 91266 in vbox for trunk/src/VBox/VMM


Ignore:
Timestamp:
Sep 15, 2021 10:26:50 PM (3 years ago)
Author:
vboxsync
Message:

VMM/CPUM: Moved CPUIDs and MSRs from the hyper heap and into the VM structure (might not be such a great idea for MSRs actually). bugref:10093

Location:
trunk/src/VBox/VMM
Files:
8 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp

    r85183 r91266  
    55175517     * Binary lookup.
    55185518     */
    5519     uint32_t        cRanges   = pVM->cpum.s.GuestInfo.cMsrRanges;
     5519    uint32_t        cRanges   = RT_MIN(pVM->cpum.s.GuestInfo.cMsrRanges, RT_ELEMENTS(pVM->cpum.s.GuestInfo.aMsrRanges));
    55205520    if (!cRanges)
    55215521        return NULL;
    5522     PCPUMMSRRANGE   paRanges  = pVM->cpum.s.GuestInfo.CTX_SUFF(paMsrRanges);
     5522    PCPUMMSRRANGE   paRanges  = pVM->cpum.s.GuestInfo.aMsrRanges;
    55235523    for (;;)
    55245524    {
     
    55505550     * Linear lookup to verify the above binary search.
    55515551     */
    5552     uint32_t        cLeft = pVM->cpum.s.GuestInfo.cMsrRanges;
    5553     PCPUMMSRRANGE   pCur  = pVM->cpum.s.GuestInfo.CTX_SUFF(paMsrRanges);
     5552    uint32_t        cLeft = RT_MIN(pVM->cpum.s.GuestInfo.cMsrRanges, RT_ELEMENTS(pVM->cpum.s.GuestInfo.aMsrRanges));
     5553    PCPUMMSRRANGE   pCur  = pVM->cpum.s.GuestInfo.aMsrRanges;
    55545554    while (cLeft-- > 0)
    55555555    {
  • trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp

    r91037 r91266  
    781781PCPUMCPUIDLEAF cpumCpuIdGetLeaf(PVM pVM, uint32_t uLeaf)
    782782{
    783     unsigned            iEnd     = pVM->cpum.s.GuestInfo.cCpuIdLeaves;
     783    unsigned            iEnd     = RT_MIN(pVM->cpum.s.GuestInfo.cCpuIdLeaves, RT_ELEMENTS(pVM->cpum.s.GuestInfo.aCpuIdLeaves));
    784784    if (iEnd)
    785785    {
    786786        unsigned        iStart   = 0;
    787         PCPUMCPUIDLEAF  paLeaves = pVM->cpum.s.GuestInfo.CTX_SUFF(paCpuIdLeaves);
     787        PCPUMCPUIDLEAF  paLeaves = pVM->cpum.s.GuestInfo.aCpuIdLeaves;
    788788        for (;;)
    789789        {
     
    838838PCPUMCPUIDLEAF cpumCpuIdGetLeafEx(PVM pVM, uint32_t uLeaf, uint32_t uSubLeaf, bool *pfExactSubLeafHit)
    839839{
    840     unsigned            iEnd     = pVM->cpum.s.GuestInfo.cCpuIdLeaves;
     840    unsigned            iEnd     = RT_MIN(pVM->cpum.s.GuestInfo.cCpuIdLeaves, RT_ELEMENTS(pVM->cpum.s.GuestInfo.aCpuIdLeaves));
    841841    if (iEnd)
    842842    {
    843843        unsigned        iStart   = 0;
    844         PCPUMCPUIDLEAF  paLeaves = pVM->cpum.s.GuestInfo.CTX_SUFF(paCpuIdLeaves);
     844        PCPUMCPUIDLEAF  paLeaves = pVM->cpum.s.GuestInfo.aCpuIdLeaves;
    845845        for (;;)
    846846        {
  • trunk/src/VBox/VMM/VMMAll/MMAllHyper.cpp

    r90991 r91266  
    338338
    339339
     340#if 0
    340341/**
    341342 * Duplicates a block of memory.
     
    359360    return rc;
    360361}
     362#endif
    361363
    362364
  • trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp

    r91120 r91266  
    2828#include "CPUMInternal.h"
    2929#include <VBox/vmm/vmcc.h>
    30 #include <VBox/vmm/mm.h>
    3130#include <VBox/sup.h>
    3231
     
    802801#else
    803802        Assert(ppaLeaves == &pVM->cpum.s.GuestInfo.paCpuIdLeavesR3);
     803        Assert(*ppaLeaves == pVM->cpum.s.GuestInfo.aCpuIdLeaves);
    804804        Assert(cLeaves == pVM->cpum.s.GuestInfo.cCpuIdLeaves);
    805805
    806         size_t cb    = cLeaves       * sizeof(**ppaLeaves);
    807         size_t cbNew = (cLeaves + 1) * sizeof(**ppaLeaves);
    808         int rc = MMR3HyperRealloc(pVM, *ppaLeaves, cb, 32, MM_TAG_CPUM_CPUID, cbNew, (void **)ppaLeaves);
    809         if (RT_SUCCESS(rc))
    810             pVM->cpum.s.GuestInfo.paCpuIdLeavesR0 = MMHyperR3ToR0(pVM, *ppaLeaves);
     806        if (cLeaves + 1 <= RT_ELEMENTS(pVM->cpum.s.GuestInfo.aCpuIdLeaves))
     807        { }
    811808        else
    812809        {
    813810            *ppaLeaves = NULL;
    814             pVM->cpum.s.GuestInfo.paCpuIdLeavesR0 = NIL_RTR0PTR;
    815             LogRel(("CPUM: cpumR3CpuIdEnsureSpace: MMR3HyperRealloc failed. rc=%Rrc\n", rc));
     811            LogRel(("CPUM: cpumR3CpuIdEnsureSpace: Out of CPUID space!\n"));
    816812        }
    817813#endif
     
    927923        AssertReturn(!ppaLeaves, VERR_INVALID_PARAMETER);
    928924        AssertReturn(!pcLeaves, VERR_INVALID_PARAMETER);
     925        AssertReturn(pVM->cpum.s.GuestInfo.paCpuIdLeavesR3 == pVM->cpum.s.GuestInfo.aCpuIdLeaves, VERR_INVALID_PARAMETER);
    929926
    930927        ppaLeaves = &pVM->cpum.s.GuestInfo.paCpuIdLeavesR3;
     
    23702367     * Install the CPUID information.
    23712368     */
    2372     int rc = MMHyperDupMem(pVM, paLeaves, sizeof(paLeaves[0]) * cLeaves, 32,
    2373                            MM_TAG_CPUM_CPUID, (void **)&pCpum->GuestInfo.paCpuIdLeavesR3);
    2374 
    2375     AssertLogRelRCReturn(rc, rc);
    2376     pCpum->GuestInfo.cCpuIdLeaves = cLeaves;
    2377     pCpum->GuestInfo.paCpuIdLeavesR0 = MMHyperR3ToR0(pVM, pCpum->GuestInfo.paCpuIdLeavesR3);
    2378     Assert(MMHyperR0ToR3(pVM, pCpum->GuestInfo.paCpuIdLeavesR0) == (void *)pCpum->GuestInfo.paCpuIdLeavesR3);
     2369    AssertLogRelMsgReturn(cLeaves <= RT_ELEMENTS(pVM->cpum.s.GuestInfo.aCpuIdLeaves),
     2370                          ("cLeaves=%u - max %u\n", cLeaves, RT_ELEMENTS(pVM->cpum.s.GuestInfo.aCpuIdLeaves)),
     2371                          VERR_CPUM_IPE_1); /** @todo better status! */
     2372    if (paLeaves != pCpum->GuestInfo.aCpuIdLeaves)
     2373        memcpy(pCpum->GuestInfo.aCpuIdLeaves, paLeaves, cLeaves * sizeof(paLeaves[0]));
     2374    pCpum->GuestInfo.paCpuIdLeavesR3 = pCpum->GuestInfo.aCpuIdLeaves;
     2375    pCpum->GuestInfo.cCpuIdLeaves    = cLeaves;
    23792376
    23802377    /*
     
    24092406     * Explode the guest CPU features.
    24102407     */
    2411     rc = cpumR3CpuIdExplodeFeatures(pCpum->GuestInfo.paCpuIdLeavesR3, pCpum->GuestInfo.cCpuIdLeaves, pMsrs,
    2412                                     &pCpum->GuestFeatures);
     2408    int rc = cpumR3CpuIdExplodeFeatures(pCpum->GuestInfo.paCpuIdLeavesR3, pCpum->GuestInfo.cCpuIdLeaves, pMsrs,
     2409                                        &pCpum->GuestFeatures);
    24132410    AssertLogRelRCReturn(rc, rc);
    24142411
     
    45284525     * API for the hyper heap).  This means special cleanup considerations.
    45294526     */
     4527    /** @todo The hyper heap will be removed ASAP, so the final destination is
     4528     *        now a fixed sized arrays in the VM structure.  Maybe we can simplify
     4529     *        this allocation fun a little now?  Or maybe it's too convenient for
     4530     *        the CPU reporter code... No time to figure that out now.   */
    45304531    rc = cpumR3DbGetCpuInfo(Config.szCpuName, &pCpum->GuestInfo);
    45314532    if (RT_FAILURE(rc))
     
    45684569     */
    45694570    if (RT_SUCCESS(rc))
    4570     {
    45714571        rc = cpumR3CpuIdExplodeFeatures(pCpum->GuestInfo.paCpuIdLeavesR3, pCpum->GuestInfo.cCpuIdLeaves, &GuestMsrs,
    45724572                                        &pCpum->GuestFeatures);
    4573     }
    45744573
    45754574    /*
     
    46124611    {
    46134612        /*
    4614          * Move the MSR and CPUID arrays over on the hypervisor heap, and explode
    4615          * guest CPU features again.
     4613         * Move the MSR and CPUID arrays over to the static VM structure allocations
     4614         * and explode guest CPU features again.
    46164615         */
    46174616        void *pvFree = pCpum->GuestInfo.paCpuIdLeavesR3;
    4618         int rc1 = cpumR3CpuIdInstallAndExplodeLeaves(pVM, pCpum, pCpum->GuestInfo.paCpuIdLeavesR3,
    4619                                                      pCpum->GuestInfo.cCpuIdLeaves, &GuestMsrs);
     4617        rc = cpumR3CpuIdInstallAndExplodeLeaves(pVM, pCpum, pCpum->GuestInfo.paCpuIdLeavesR3,
     4618                                                pCpum->GuestInfo.cCpuIdLeaves, &GuestMsrs);
    46204619        RTMemFree(pvFree);
    46214620
    4622         pvFree = pCpum->GuestInfo.paMsrRangesR3;
    4623         int rc2 = MMHyperDupMem(pVM, pvFree,
    4624                                 sizeof(pCpum->GuestInfo.paMsrRangesR3[0]) * pCpum->GuestInfo.cMsrRanges, 32,
    4625                                 MM_TAG_CPUM_MSRS, (void **)&pCpum->GuestInfo.paMsrRangesR3);
    4626         RTMemFree(pvFree);
    4627         AssertLogRelRCReturn(rc1, rc1);
    4628         AssertLogRelRCReturn(rc2, rc2);
    4629 
    4630         pCpum->GuestInfo.paMsrRangesR0 = MMHyperR3ToR0(pVM, pCpum->GuestInfo.paMsrRangesR3);
     4621        AssertFatalMsg(pCpum->GuestInfo.cMsrRanges <= RT_ELEMENTS(pCpum->GuestInfo.aMsrRanges),
     4622                       ("%u\n", pCpum->GuestInfo.cMsrRanges));
     4623        memcpy(pCpum->GuestInfo.aMsrRanges, pCpum->GuestInfo.paMsrRangesR3,
     4624               sizeof(pCpum->GuestInfo.paMsrRangesR3[0]) * pCpum->GuestInfo.cMsrRanges);
     4625        RTMemFree(pCpum->GuestInfo.paMsrRangesR3);
     4626        pCpum->GuestInfo.paMsrRangesR3 = pCpum->GuestInfo.aMsrRanges;
     4627
     4628        AssertLogRelRCReturn(rc, rc);
    46314629
    46324630        /*
     
    60015999     * We're good, commit the CPU ID leaves.
    60026000     */
    6003     MMHyperFree(pVM, pVM->cpum.s.GuestInfo.paCpuIdLeavesR3);
    6004     pVM->cpum.s.GuestInfo.paCpuIdLeavesR3 = NULL;
    6005     pVM->cpum.s.GuestInfo.paCpuIdLeavesR0 = NIL_RTR0PTR;
    60066001    pVM->cpum.s.GuestInfo.DefCpuId = GuestDefCpuId;
    60076002    rc = cpumR3CpuIdInstallAndExplodeLeaves(pVM, &pVM->cpum.s, paLeaves, cLeaves, pMsrs);
  • trunk/src/VBox/VMM/VMMR3/CPUMR3Db.cpp

    r89934 r91266  
    378378static PCPUMMSRRANGE cpumR3MsrRangesEnsureSpace(PVM pVM, PCPUMMSRRANGE *ppaMsrRanges, uint32_t cMsrRanges, uint32_t cNewRanges)
    379379{
    380     uint32_t cMsrRangesAllocated;
    381     if (!pVM)
    382         cMsrRangesAllocated = RT_ALIGN_32(cMsrRanges, 16);
     380    if (  cMsrRanges + cNewRanges
     381        > RT_ELEMENTS(pVM->cpum.s.GuestInfo.aMsrRanges) + (pVM ? 0 : 128 /* Catch too many MSRs in CPU reporter! */))
     382    {
     383        LogRel(("CPUM: Too many MSR ranges! %#x, max %#x\n",
     384                cMsrRanges + cNewRanges, RT_ELEMENTS(pVM->cpum.s.GuestInfo.aMsrRanges)));
     385        return NULL;
     386    }
     387    if (pVM)
     388    {
     389        Assert(cMsrRanges == pVM->cpum.s.GuestInfo.cMsrRanges);
     390        Assert(*ppaMsrRanges == pVM->cpum.s.GuestInfo.aMsrRanges);
     391    }
    383392    else
    384393    {
    385         /*
    386          * We're using the hyper heap now, but when the range array was copied over to it from
    387          * the host-context heap, we only copy the exact size and not the ensured size.
    388          * See @bugref{7270}.
    389          */
    390         cMsrRangesAllocated = cMsrRanges;
    391     }
    392     if (cMsrRangesAllocated < cMsrRanges + cNewRanges)
    393     {
    394         void    *pvNew;
    395         uint32_t cNew = RT_ALIGN_32(cMsrRanges + cNewRanges, 16);
    396         if (pVM)
    397         {
    398             Assert(ppaMsrRanges == &pVM->cpum.s.GuestInfo.paMsrRangesR3);
    399             Assert(cMsrRanges   == pVM->cpum.s.GuestInfo.cMsrRanges);
    400 
    401             size_t cb    = cMsrRangesAllocated * sizeof(**ppaMsrRanges);
    402             size_t cbNew = cNew * sizeof(**ppaMsrRanges);
    403             int rc = MMR3HyperRealloc(pVM, *ppaMsrRanges, cb, 32, MM_TAG_CPUM_MSRS, cbNew, &pvNew);
    404             if (RT_FAILURE(rc))
    405             {
    406                 *ppaMsrRanges = NULL;
    407                 pVM->cpum.s.GuestInfo.paMsrRangesR0 = NIL_RTR0PTR;
    408                 LogRel(("CPUM: cpumR3MsrRangesEnsureSpace: MMR3HyperRealloc failed. rc=%Rrc\n", rc));
    409                 return NULL;
    410             }
    411             *ppaMsrRanges = (PCPUMMSRRANGE)pvNew;
    412         }
    413         else
    414         {
    415             pvNew = RTMemRealloc(*ppaMsrRanges, cNew * sizeof(**ppaMsrRanges));
    416             if (!pvNew)
     394        if (cMsrRanges + cNewRanges > RT_ALIGN_32(cMsrRanges, 16))
     395        {
     396
     397            uint32_t const cNew = RT_ALIGN_32(cMsrRanges + cNewRanges, 16);
     398            void *pvNew = RTMemRealloc(*ppaMsrRanges, cNew * sizeof(**ppaMsrRanges));
     399            if (pvNew)
     400                *ppaMsrRanges = (PCPUMMSRRANGE)pvNew;
     401            else
    417402            {
    418403                RTMemFree(*ppaMsrRanges);
     
    421406            }
    422407        }
    423         *ppaMsrRanges = (PCPUMMSRRANGE)pvNew;
    424     }
    425 
    426     if (pVM)
    427     {
    428         /* Update the R0 pointer. */
    429         Assert(ppaMsrRanges == &pVM->cpum.s.GuestInfo.paMsrRangesR3);
    430         pVM->cpum.s.GuestInfo.paMsrRangesR0 = MMHyperR3ToR0(pVM, *ppaMsrRanges);
    431408    }
    432409
     
    466443        AssertReturn(!ppaMsrRanges, VERR_INVALID_PARAMETER);
    467444        AssertReturn(!pcMsrRanges,  VERR_INVALID_PARAMETER);
     445        AssertReturn(pVM->cpum.s.GuestInfo.paMsrRangesR3 == pVM->cpum.s.GuestInfo.aMsrRanges, VERR_INTERNAL_ERROR_3);
    468446
    469447        ppaMsrRanges = &pVM->cpum.s.GuestInfo.paMsrRangesR3;
     
    10431021    pInfo->iFirstExtCpuIdLeaf   = 0; /* Set by caller. */
    10441022    pInfo->uScalableBusFreq     = pEntry->uScalableBusFreq;
    1045     pInfo->paCpuIdLeavesR0      = NIL_RTR0PTR;
    1046     pInfo->paMsrRangesR0        = NIL_RTR0PTR;
    10471023
    10481024    /*
  • trunk/src/VBox/VMM/VMMR3/MMHyper.cpp

    r91016 r91266  
    14301430
    14311431
     1432#if 0
    14321433/**
    14331434 * Re-allocates memory from the hyper heap.
     
    14871488    return rc;
    14881489}
    1489 
     1490#endif
     1491
  • trunk/src/VBox/VMM/include/CPUMInternal.h

    r91120 r91266  
    178178    uint64_t                    uScalableBusFreq;
    179179
    180     /** Pointer to the MSR ranges (ring-0 pointer). */
    181     R0PTRTYPE(PCPUMMSRRANGE)    paMsrRangesR0;
    182     /** Pointer to the CPUID leaves (ring-0 pointer). */
    183     R0PTRTYPE(PCPUMCPUIDLEAF)   paCpuIdLeavesR0;
    184 
    185     /** Pointer to the MSR ranges (ring-3 pointer). */
     180    /** Pointer to the MSR ranges (for compatibility with old hyper heap code). */
    186181    R3PTRTYPE(PCPUMMSRRANGE)    paMsrRangesR3;
    187     /** Pointer to the CPUID leaves (ring-3 pointer). */
     182    /** Pointer to the CPUID leaves (for compatibility with old hyper heap code). */
    188183    R3PTRTYPE(PCPUMCPUIDLEAF)   paCpuIdLeavesR3;
     184
     185    /** CPUID leaves. */
     186    CPUMCPUIDLEAF               aCpuIdLeaves[256];
     187    /** MSR ranges.
     188     * @todo This is insane, so might want to move this into a separate
     189     *       allocation.  The insanity is mainly for more recent AMD CPUs. */
     190    CPUMMSRRANGE                aMsrRanges[8192];
    189191} CPUMINFO;
    190192/** Pointer to a CPU info structure. */
  • trunk/src/VBox/VMM/include/CPUMInternal.mac

    r87766 r91266  
    4545    .DefCpuId               resb CPUMCPUID_size     ; CPUMCPUID
    4646    .uScalableBusFreq       resq 1                  ; uint64_t
    47     .paMsrRangesR0          RTR0PTR_RES 1           ; R0PTRTYPE(PCPUMMSRRANGE)
    48     .paCpuIdLeavesR0        RTR0PTR_RES 1           ; R0PTRTYPE(PCPUMCPUIDLEAF)
    4947    .paMsrRangesR3          RTR3PTR_RES 1           ; R3PTRTYPE(PCPUMMSRRANGE)
    5048    .paCpuIdLeavesR3        RTR3PTR_RES 1           ; R3PTRTYPE(PCPUMCPUIDLEAF)
     49    .aCpuIdLeaves           resb 256*32
     50    .aMsrRanges             resb 8192*128
    5151endstruc
    5252
     
    9292    .HostFeatures               resb    48
    9393    .GuestFeatures              resb    48
    94     .GuestInfo                  resb    RTHCPTR_CB*4 + 4*12
     94    .GuestInfo                  resb    CPUMINFO_size
    9595
    9696    ; Patch manager saved state compatability CPUID leaf arrays
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