Changeset 91275 in vbox

Timestamp:

Sep 16, 2021 11:13:11 AM (4 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

146935

Message:

VMM: Added missing features checks while constructing mask of valid CR4 bits.

Location:

trunk

Files:

• include/VBox/vmm/cpum.h (modified) (2 diffs)
• src/VBox/VMM/VMMAll/CPUMAllRegs.cpp (modified) (2 diffs)
• src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp (modified) (1 diff)

trunk/include/VBox/vmm/cpum.h ¶

@@ -1037 +1037 @@
     /** Supports physical address extension (PAE). */
     uint32_t        fPae : 1;
+    /** Supports page-global extension (PGE). */
+    uint32_t        fPge : 1;
     /** Page attribute table (PAT) support (page level cache control). */
     uint32_t        fPat : 1;
@@ -1159 +1161 @@
 
     /** Alignment padding / reserved for future use. */
-    uint32_t        fPadding : 8;
+    uint32_t        fPadding : 7;
 
     /** SVM: Supports Nested-paging. */

trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp ¶

@@ -2316 +2316 @@
     uint64_t fMask = X86_CR4_VME | X86_CR4_PVI
                    | X86_CR4_TSD | X86_CR4_DE
-                   | X86_CR4_PSE | X86_CR4_PAE /** @todo r=bird: PAE isn't a given either, we must check features. See als PAEmode. */
-                   | X86_CR4_MCE | X86_CR4_PGE
-                   | X86_CR4_PCE
-                   | X86_CR4_OSXMMEEXCPT;  /** @todo r=ramshankar: Introduced in Pentium III along with SSE. Check fSse here? */
+                   | X86_CR4_MCE | X86_CR4_PCE;
+    if (pGuestFeatures->fPae)
+        fMask |= X86_CR4_PAE;
+    if (pGuestFeatures->fPge)
+        fMask |= X86_CR4_PGE;
+    if (pGuestFeatures->fPse)
+        fMask |= X86_CR4_PSE;
     if (pGuestFeatures->fFxSaveRstor)
         fMask |= X86_CR4_OSFXSR;
@@ -2330 +2333 @@
     if (pGuestFeatures->fFsGsBase)
         fMask |= X86_CR4_FSGSBASE;
+    if (pGuestFeatures->fSse)
+        fMask |= X86_CR4_OSXMMEEXCPT;
     return fMask;
 }

trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp ¶

@@ -1974 +1974 @@
             pFeatures->fPse36          |= RT_BOOL(pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_PSE36);
             pFeatures->fPae            |= RT_BOOL(pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_PAE);
+            pFeatures->fPge            |= RT_BOOL(pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_PGE);
             pFeatures->fPat            |= RT_BOOL(pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_PAT);
             pFeatures->fFxSaveRstor    |= RT_BOOL(pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_FXSR);