Changeset 91580 in vbox for trunk/include

Timestamp:

Oct 6, 2021 7:22:04 AM (4 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

147289

Message:

VMM: Nested VMX: bugref:10092 Made changes to PGM++ to handle invalid PAE PDPEs being loaded.

Location:

trunk/include/VBox

Files:

• err.h (modified) (1 diff)
• vmm/cpum.h (modified) (2 diffs)
• vmm/hm_vmx.h (modified) (2 diffs)
• vmm/pgm.h (modified) (1 diff)
• vmm/vm.h (modified) (1 diff)

trunk/include/VBox/err.h ¶

@@ -651 +651 @@
 /** Shadow mode 'none' internal error. */
 #define VERR_PGM_SHW_NONE_IPE                   (-1687)
+/** One or more PAE PDPEs are invalid due to reserved bits being set. */
+#define VERR_PGM_PAE_PDPE_RSVD                  (-1688)
 /** @} */
 

trunk/include/VBox/vmm/cpum.h ¶

@@ -1539 +1539 @@
 VMM_INT_DECL(uint64_t) CPUMGetGuestCR4ValidMask(PVM pVM);
 VMM_INT_DECL(void)     CPUMSetGuestPaePdpes(PVMCPU pVCpu, PCX86PDPE paPaePdpes);
+VMM_INT_DECL(void)     CPUMGetGuestPaePdpes(PVMCPU pVCpu, PX86PDPE paPaePdpes);
 /** @} */
 
@@ -1750 +1751 @@
 
 /**
- * Tests if the guest is running in PAE mode or not.
- *
- * @returns true if in PAE mode, otherwise false.
- * @param   pCtx    Current CPU context.
- */
-DECLINLINE(bool) CPUMIsGuestInPAEModeEx(PCCPUMCTX pCtx)
+ * Tests if PAE paging is enabled given the relevant control registers.
+ *
+ * @returns @c true if in PAE mode, @c false otherwise.
+ * @param   uCr0        The CR0 value.
+ * @param   uCr4        The CR4 value.
+ * @param   uEferMsr    The EFER value.
+ */
+DECLINLINE(bool) CPUMIsPaePagingEnabled(uint64_t uCr0, uint64_t uCr4, uint64_t uEferMsr)
 {
     /* Intel mentions EFER.LMA and EFER.LME in different parts of their spec. We shall use EFER.LMA rather
        than EFER.LME as it reflects if the CPU has entered paging with EFER.LME set.  */
-    return (   (pCtx->cr4 & X86_CR4_PAE)
-            && CPUMIsGuestPagingEnabledEx(pCtx)
-            && !(pCtx->msrEFER & MSR_K6_EFER_LMA));
-}
-
-
-/**
- * Tests if PAE PDPE ("PDPTE" in Intel nomenclature) entries are valid.
- *
- * @returns @c true if all PDPEs are valid, @c false otherwise.
- * @param   paPdpes         Pointer to the 4 PAE PDPEs.
- * @param   pidxInvalid     Where to store the index of the first invalid PDPE.
- *                          Optional, can be NULL. Mainly used for diagnostics.
- */
-DECLINLINE(bool) CPUMArePaePdpesValid(PCX86PDPE paPdpes, uint8_t *pidxInvalid)
-{
-    for (uint8_t idx = 0; idx < X86_PG_PAE_PDPE_ENTRIES; idx++)
-    {
-        if (   !(paPdpes[idx].u & X86_PDPE_P)
-            || !(paPdpes[idx].u & X86_PDPE_PAE_MBZ_MASK))
-        { /* likely */ }
-        else
-        {
-            if (pidxInvalid)
-                *pidxInvalid = idx;
-            return false;
-        }
-    }
-    return true;
-}
-
+    return (   (uCr4 & X86_CR4_PAE)
+            && (uCr0 & X86_CR0_PG)
+            && !(uEferMsr & MSR_K6_EFER_LMA));
+}
+
+/**
+ * Tests if the guest is running in PAE mode or not.
+ *
+ * @returns @c true if in PAE mode, @c false otherwise.
+ * @param   pCtx    Current CPU context.
+ */
+DECLINLINE(bool) CPUMIsGuestInPAEModeEx(PCCPUMCTX pCtx)
+{
+    return CPUMIsPaePagingEnabled(pCtx->cr0, pCtx->cr4, pCtx->msrEFER);
+}
 
 /**

trunk/include/VBox/vmm/hm_vmx.h ¶

@@ -4201 +4201 @@
     kVmxVDiag_Vmentry_GuestPatMsr,
     kVmxVDiag_Vmentry_GuestPcide,
-    kVmxVDiag_Vmentry_GuestPdpteCr3ReadPhys,
-    kVmxVDiag_Vmentry_GuestPdpte0Rsvd,
-    kVmxVDiag_Vmentry_GuestPdpte1Rsvd,
-    kVmxVDiag_Vmentry_GuestPdpte2Rsvd,
-    kVmxVDiag_Vmentry_GuestPdpte3Rsvd,
+    kVmxVDiag_Vmentry_GuestPdpte,
     kVmxVDiag_Vmentry_GuestPndDbgXcptBsNoTf,
     kVmxVDiag_Vmentry_GuestPndDbgXcptBsTf,
@@ -4358 +4354 @@
     kVmxVDiag_Vmentry_VmxRoot,
     kVmxVDiag_Vmentry_Vpid,
-    kVmxVDiag_Vmexit_HostPdpteCr3ReadPhys,
-    kVmxVDiag_Vmexit_HostPdpte0Rsvd,
-    kVmxVDiag_Vmexit_HostPdpte1Rsvd,
-    kVmxVDiag_Vmexit_HostPdpte2Rsvd,
-    kVmxVDiag_Vmexit_HostPdpte3Rsvd,
+    kVmxVDiag_Vmexit_HostPdpte,
     kVmxVDiag_Vmexit_MsrLoad,
     kVmxVDiag_Vmexit_MsrLoadCount,

trunk/include/VBox/vmm/pgm.h ¶

@@ -354 +354 @@
 VMMDECL(int)        PGMGstSetPage(PVMCPUCC pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags);
 VMMDECL(int)        PGMGstModifyPage(PVMCPUCC pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
+VMM_INT_DECL(bool)  PGMGstArePaePdpesValid(PVMCPUCC pVCpu, PCX86PDPE paPaePdpes);
+VMM_INT_DECL(int)   PGMGstMapPaePdpes(PVMCPUCC pVCpu, PCX86PDPE paPaePdpes);
+VMM_INT_DECL(int)   PGMGstMapPaePdpesAtCr3(PVMCPUCC pVCpu, uint64_t cr3);
 
 VMMDECL(int)        PGMInvalidatePage(PVMCPUCC pVCpu, RTGCPTR GCPtrPage);
-VMMDECL(int)        PGMFlushTLB(PVMCPUCC pVCpu, uint64_t cr3, bool fGlobal);
+VMMDECL(int)        PGMFlushTLB(PVMCPUCC pVCpu, uint64_t cr3, bool fGlobal, bool fPdpesMapped);
 VMMDECL(int)        PGMSyncCR3(PVMCPUCC pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal);
-VMMDECL(int)        PGMUpdateCR3(PVMCPUCC pVCpu, uint64_t cr3);
+VMMDECL(int)        PGMUpdateCR3(PVMCPUCC pVCpu, uint64_t cr3, bool fPdpesMapped);
 VMMDECL(int)        PGMChangeMode(PVMCPUCC pVCpu, uint64_t cr0, uint64_t cr4, uint64_t efer);
 VMM_INT_DECL(int)   PGMHCChangeMode(PVMCC pVM, PVMCPUCC pVCpu, PGMMODE enmGuestMode);

trunk/include/VBox/vmm/vm.h ¶

@@ -483 +483 @@
 #define VMCPU_FF_INTERRUPT_NESTED_GUEST     RT_BIT_64(VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT)
 #define VMCPU_FF_INTERRUPT_NESTED_GUEST_BIT 11
+/** This action forces PGM to update changes to CR3 when the guest was in HM mode
+ *  (when using nested paging). */
 #define VMCPU_FF_HM_UPDATE_CR3              RT_BIT_64(VMCPU_FF_HM_UPDATE_CR3_BIT)
 #define VMCPU_FF_HM_UPDATE_CR3_BIT          12