Changeset 91710 in vbox for trunk/include

Timestamp:

Oct 13, 2021 11:05:26 AM (3 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

147446

Message:

VMM/CPUM: Nested VMX: bugref:10092 Added some VMX CPUMFEATURES' bit. Cleaned up cpumR3AreVmxCpuFeaturesCompatible to avoid some duplication.

File:

• trunk/include/VBox/vmm/cpum.h (modified) (4 diffs)

trunk/include/VBox/vmm/cpum.h

@@ -1309 +1309 @@
     /** VMX: Supports EPT-violations \#VE. */
     uint32_t        fVmxEptXcptVe : 1;
+    /** VMX: Supports conceal VMX from PT. */
+    uint32_t        fVmxConcealVmxFromPt : 1;
     /** VMX: Supports XSAVES/XRSTORS. */
     uint32_t        fVmxXsavesXrstors : 1;
+    /** VMX: Supports mode-based execute control for EPT. */
+    uint32_t        fVmxModeBasedExecuteEpt : 1;
+    /** VMX: Supports sub-page write permissions for EPT. */
+    uint32_t        fVmxSppEpt : 1;
+    /** VMX: Supports Intel PT to output guest-physical addresses for EPT. */
+    uint32_t        fVmxPtEpt : 1;
     /** VMX: Supports TSC scaling. */
     uint32_t        fVmxUseTscScaling : 1;
+    /** VMX: Supports TPAUSE, UMONITOR, or UMWAIT. */
+    uint32_t        fVmxUserWaitPause : 1;
+    /** VMX: Supports enclave (ENCLV) exiting. */
+    uint32_t        fVmxEnclvExit : 1;
     /** @} */
 
@@ -1358 +1370 @@
     uint32_t        fVmxExitSaveEferLma : 1;
     /** VMX: Whether Intel PT (Processor Trace) is supported in VMX mode or not. */
-    uint32_t        fVmxIntelPt : 1;
+    uint32_t        fVmxPt : 1;
     /** VMX: Supports VMWRITE to any valid VMCS field incl. read-only fields, otherwise
      *  VMWRITE cannot modify read-only VM-exit information fields. */
@@ -1368 +1380 @@
 
     /** VMX: Padding / reserved for future features. */
-    uint32_t        fVmxPadding1 : 31;
+    uint32_t        fVmxPadding1 : 25;
 } CPUMFEATURES;
 #ifndef VBOX_FOR_DTRACE_LIB
@@ -1584 +1596 @@
 VMM_INT_DECL(int)       CPUMStopGuestVmxPremptTimer(PVMCPUCC pVCpu);
 VMM_INT_DECL(uint32_t)  CPUMGetVmxMsrPermission(void const *pvMsrBitmap, uint32_t idMsr);
+VMM_INT_DECL(bool)      CPUMIsGuestVmxEptPagingEnabled(PCVMCPUCC pVCpu);
 /** @} */