Changeset 91711 in vbox

Timestamp:

Oct 13, 2021 11:06:54 AM (3 years ago)

Author:

vboxsync

Message:

hm_vmx.h: Nested VMX: bugref:10092 Added some macros (removed one duplicate define) for upcoming guest-mode EPT changes.

File:

• trunk/include/VBox/vmm/hm_vmx.h (modified) (8 diffs)

trunk/include/VBox/vmm/hm_vmx.h

@@ -465 +465 @@
 #define EPT_E_BIT_SHADOW_STACK  60
 #define EPT_E_SHADOW_STACK      RT_BIT_64(EPT_E_BIT_SHADOW_STACK)   /**< @see EPT_E_BIT_SHADOW_STACK*/
-/** Bit 61 - Sub-page write permissions (PT only, ignored).
- * @note Ignored if sub-page write permissions for EPT is disabled. */
-#define EPT_E_BIT_SHADOW_STACK  60
-#define EPT_E_SHADOW_STACK      RT_BIT_64(EPT_E_BIT_SHADOW_STACK)   /**< @see EPT_E_BIT_SHADOW_STACK*/
-
-/* Bit 62 is always ignored at time of writing. */
+
+/* Bit 61, 62 are always ignored at time of writing. */
 
 /** Bit 63 - Supress \#VE (leaf only, ignored).
@@ -520 +516 @@
 /** The PML4 index mask (apply to a shifted page address). */
 #define EPT_PML4_MASK           X86_PML4_MASK
+/** Bits - - EPT - PML4 MBZ Mask. */
+#define EPT_PML4E_MBZ_MASK      UINT64_C(0x00000000000000f8)
 
 /**
@@ -558 +556 @@
 typedef const EPTPML4 *PCEPTPML4;
 
+
 /**
  * EPT Page Directory Pointer Entry. Bit view.
@@ -587 +586 @@
 /** The PDPT index mask (apply to a shifted page address). */
 #define EPT_PDPT_MASK           X86_PDPT_MASK_AMD64
+/** Bits 3-7 - - EPT - PDPTE MBZ Mask. */
+#define EPT_PDPTE_MBZ_MASK      UINT64_C(0x00000000000000f8)
+/** Bits 12-29 - - EPT - 1GB PDPTE MBZ Mask. */
+#define EPT_PDPTE1G_MBZ_MASK    UINT64_C(0x000000003ffff000)
+/** */
 
 /**
@@ -624 +628 @@
 /** Pointer to a const EPT Page Directory Pointer Table. */
 typedef const EPTPDPT *PCEPTPDPT;
+
 
 /**
@@ -656 +661 @@
 /** The PD index mask (apply to a shifted page address). */
 #define EPT_PD_MASK             X86_PD_PAE_MASK
+/** Bits 3-7 - EPT - PDE MBZ Mask. */
+#define EPT_PDE_MBZ_MASK        UINT64_C(0x00000000000000f8)
+
+
 
 /**
@@ -688 +697 @@
 /** Bits 21-51 - - EPT - Physical Page number of the next level. */
 #define EPT_PDE2M_PG_MASK       X86_PDE2M_PAE_PG_MASK
+/** Bits 20-12 - - EPT - PDE 2M MBZ Mask. */
+#define EPT_PDE2M_MBZ_MASK      UINT64_C(0x00000000001ff000)
+
 
 /**
@@ -764 +776 @@
 /** The EPT PT index mask (apply to a shifted page address). */
 #define EPT_PT_MASK             X86_PT_PAE_MASK
+/** No bits - - EPT - PTE MBZ bits. */
+#define EPT_PTE_MBZ_MASK        UINT64_C(0x0000000000000000)
+
 
 /**