Changeset 9220 in vbox for trunk/src/VBox

Timestamp:

May 29, 2008 12:34:27 PM (17 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

31390

Message:

Default to 32 bits virtual addresses in CSAM & PATM.

Location:

trunk/src/VBox/VMM/PATM

Files:

• CSAM.cpp (modified) (29 diffs)
• CSAMInternal.h (modified) (3 diffs)
• PATM.cpp (modified) (104 diffs)
• PATMA.h (modified) (1 diff)
• PATMGuest.cpp (modified) (4 diffs)
• PATMInternal.h (modified) (13 diffs)
• PATMPatch.cpp (modified) (39 diffs)
• PATMPatch.h (modified) (8 diffs)
• VMMAll/CSAMAll.cpp (modified) (6 diffs)
• VMMAll/PATMAll.cpp (modified) (13 diffs)
• VMMGC/CSAMGC.cpp (modified) (2 diffs)
• VMMGC/PATMGC.cpp (modified) (8 diffs)

trunk/src/VBox/VMM/PATM/CSAM.cpp

@@ -74 +74 @@
 static DECLCALLBACK(int) CSAMCodePageInvalidate(PVM pVM, RTGCPTR GCPtr);
 
-bool                csamIsCodeScanned(PVM pVM, RTGCPTR pInstr, PCSAMPAGE *pPage);
-int                 csamR3CheckPageRecord(PVM pVM, RTGCPTR pInstr);
-static PCSAMPAGE    csamCreatePageRecord(PVM pVM, RTGCPTR GCPtr, CSAMTAG enmTag, bool fCode32, bool fMonitorInvalidation = false);
-static int          csamRemovePageRecord(PVM pVM, RTGCPTR GCPtr);
+bool                csamIsCodeScanned(PVM pVM, RTGCPTR32 pInstr, PCSAMPAGE *pPage);
+int                 csamR3CheckPageRecord(PVM pVM, RTGCPTR32 pInstr);
+static PCSAMPAGE    csamCreatePageRecord(PVM pVM, RTGCPTR32 GCPtr, CSAMTAG enmTag, bool fCode32, bool fMonitorInvalidation = false);
+static int          csamRemovePageRecord(PVM pVM, RTGCPTR32 GCPtr);
 static int          csamReinit(PVM pVM);
-static void         csamMarkCode(PVM pVM, PCSAMPAGE pPage, RTGCPTR pInstr, uint32_t opsize, bool fScanned);
+static void         csamMarkCode(PVM pVM, PCSAMPAGE pPage, RTGCPTR32 pInstr, uint32_t opsize, bool fScanned);
 static int          csamAnalyseCodeStream(PVM pVM, RCPTRTYPE(uint8_t *) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC, bool fCode32,
                                           PFN_CSAMR3ANALYSE pfnCSAMR3Analyse, void *pUserData, PCSAMP2GLOOKUPREC pCacheRec);
@@ -118 +118 @@
     rc = MMR3HyperAllocOnceNoRel(pVM, CSAM_PGDIRBMP_CHUNKS*sizeof(RTHCPTR), 0, MM_TAG_CSAM, (void **)&pVM->csam.s.pPDBitmapHC);
     AssertRCReturn(rc, rc);
-    rc = MMR3HyperAllocOnceNoRel(pVM, CSAM_PGDIRBMP_CHUNKS*sizeof(RTGCPTR), 0, MM_TAG_CSAM, (void **)&pVM->csam.s.pPDGCBitmapHC);
+    rc = MMR3HyperAllocOnceNoRel(pVM, CSAM_PGDIRBMP_CHUNKS*sizeof(RTGCPTR32), 0, MM_TAG_CSAM, (void **)&pVM->csam.s.pPDGCBitmapHC);
     AssertRCReturn(rc, rc);
     pVM->csam.s.pPDBitmapGC   = MMHyperHC2GC(pVM, pVM->csam.s.pPDGCBitmapHC);
@@ -605 +605 @@
     PVM           pVM      = (PVM)pCpu->apvUserData[0];
     RTHCUINTPTR   pInstrHC = (RTHCUINTPTR)pCpu->apvUserData[1];
-    RTGCUINTPTR   pInstrGC = (uintptr_t)pCpu->apvUserData[2];
+    RTGCUINTPTR32   pInstrGC = (uintptr_t)pCpu->apvUserData[2];
     int           orgsize  = size;
 
@@ -612 +612 @@
     for (int i=0;i<orgsize;i++)
     {
-        int rc = PATMR3QueryOpcode(pVM, (RTGCPTR)pSrc, pDest);
+        int rc = PATMR3QueryOpcode(pVM, (RTGCPTR32)pSrc, pDest);
         if (VBOX_SUCCESS(rc))
         {
@@ -642 +642 @@
 }
 
-inline int CSAMR3DISInstr(PVM pVM, DISCPUSTATE *pCpu, RTGCPTR InstrGC, uint8_t *InstrHC, uint32_t *pOpsize, char *pszOutput)
+inline int CSAMR3DISInstr(PVM pVM, DISCPUSTATE *pCpu, RTGCPTR32 InstrGC, uint8_t *InstrHC, uint32_t *pOpsize, char *pszOutput)
 {
     (pCpu)->pfnReadBytes  = CSAMR3ReadBytes;
@@ -1270 +1270 @@
            )
         {
-            RTGCPTR  pJumpTableGC = (RTGCPTR)cpu.param1.disp32;
+            RTGCPTR32  pJumpTableGC = (RTGCPTR32)cpu.param1.disp32;
             uint8_t *pJumpTableHC;
             int      rc2;
@@ -1288 +1288 @@
                         break;
 
-                    addr = *(RTGCPTR *)(pJumpTableHC + cpu.param1.scale * i);
+                    addr = *(RTGCPTR32 *)(pJumpTableHC + cpu.param1.scale * i);
 
                     rc2 = PGMGstGetPage(pVM, addr, &fFlags, NULL);
@@ -1346 +1346 @@
  * @param   pInstr      Page address
  */
-uint64_t csamR3CalcPageHash(PVM pVM, RTGCPTR pInstr)
+uint64_t csamR3CalcPageHash(PVM pVM, RTGCPTR32 pInstr)
 {
     uint64_t hash   = 0;
@@ -1411 +1411 @@
  * @param   fRemovePage Page removal flag
  */
-static int csamFlushPage(PVM pVM, RTGCPTR addr, bool fRemovePage)
+static int csamFlushPage(PVM pVM, RTGCPTR32 addr, bool fRemovePage)
 {
     PCSAMPAGEREC pPageRec;
@@ -1518 +1518 @@
  * @param   addr        GC address of the page to flush
  */
-CSAMR3DECL(int) CSAMR3FlushPage(PVM pVM, RTGCPTR addr)
+CSAMR3DECL(int) CSAMR3FlushPage(PVM pVM, RTGCPTR32 addr)
 {
     return csamFlushPage(pVM, addr, true /* remove page record */);
@@ -1530 +1530 @@
  * @param   addr        GC address of the page to flush
  */
-CSAMR3DECL(int) CSAMR3RemovePage(PVM pVM, RTGCPTR addr)
+CSAMR3DECL(int) CSAMR3RemovePage(PVM pVM, RTGCPTR32 addr)
 {
     PCSAMPAGEREC pPageRec;
@@ -1555 +1555 @@
  * @param   pInstrGC    GC instruction pointer
  */
-int csamR3CheckPageRecord(PVM pVM, RTGCPTR pInstrGC)
+int csamR3CheckPageRecord(PVM pVM, RTGCPTR32 pInstrGC)
 {
     PCSAMPAGEREC pPageRec;
@@ -1602 +1602 @@
  * @param   fMonitorInvalidation    Monitor page invalidation flag
  */
-static PCSAMPAGE csamCreatePageRecord(PVM pVM, RTGCPTR GCPtr, CSAMTAG enmTag, bool fCode32, bool fMonitorInvalidation)
+static PCSAMPAGE csamCreatePageRecord(PVM pVM, RTGCPTR32 GCPtr, CSAMTAG enmTag, bool fCode32, bool fMonitorInvalidation)
 {
     PCSAMPAGEREC pPage;
@@ -1703 +1703 @@
  * @param   enmTag      Monitor tag
  */
-CSAMR3DECL(int) CSAMR3MonitorPage(PVM pVM, RTGCPTR pPageAddrGC, CSAMTAG enmTag)
+CSAMR3DECL(int) CSAMR3MonitorPage(PVM pVM, RTGCPTR32 pPageAddrGC, CSAMTAG enmTag)
 {
     PCSAMPAGEREC pPageRec = NULL;
@@ -1825 +1825 @@
  * @param   enmTag      Monitor tag
  */
-CSAMR3DECL(int) CSAMR3UnmonitorPage(PVM pVM, RTGCPTR pPageAddrGC, CSAMTAG enmTag)
+CSAMR3DECL(int) CSAMR3UnmonitorPage(PVM pVM, RTGCPTR32 pPageAddrGC, CSAMTAG enmTag)
 {
     pPageAddrGC &= PAGE_BASE_GC_MASK;
@@ -1849 +1849 @@
  * @param   GCPtr       Page address
  */
-static int csamRemovePageRecord(PVM pVM, RTGCPTR GCPtr)
+static int csamRemovePageRecord(PVM pVM, RTGCPTR32 GCPtr)
 {
     PCSAMPAGEREC pPageRec;
@@ -1984 +1984 @@
  * @param   pPage       CSAM patch structure pointer
  */
-bool csamIsCodeScanned(PVM pVM, RTGCPTR pInstr, PCSAMPAGE *pPage)
+bool csamIsCodeScanned(PVM pVM, RTGCPTR32 pInstr, PCSAMPAGE *pPage)
 {
     PCSAMPAGEREC pPageRec;
@@ -2036 +2036 @@
  * @param   fScanned    Mark as scanned or not
  */
-static void csamMarkCode(PVM pVM, PCSAMPAGE pPage, RTGCPTR pInstr, uint32_t opsize, bool fScanned)
+static void csamMarkCode(PVM pVM, PCSAMPAGE pPage, RTGCPTR32 pInstr, uint32_t opsize, bool fScanned)
 {
     LogFlow(("csamMarkCodeAsScanned %VGv opsize=%d\n", pInstr, opsize));
@@ -2075 +2075 @@
  * @param   fScanned    Mark as scanned or not
  */
-CSAMR3DECL(int) CSAMR3MarkCode(PVM pVM, RTGCPTR pInstr, uint32_t opsize, bool fScanned)
+CSAMR3DECL(int) CSAMR3MarkCode(PVM pVM, RTGCPTR32 pInstr, uint32_t opsize, bool fScanned)
 {
     PCSAMPAGE pPage = 0;
@@ -2103 +2103 @@
  * @param   pInstrGC    Instruction pointer
  */
-CSAMR3DECL(int) CSAMR3CheckCodeEx(PVM pVM, RTSEL Sel, CPUMSELREGHID *pHiddenSel, RTGCPTR pInstrGC)
+CSAMR3DECL(int) CSAMR3CheckCodeEx(PVM pVM, RTSEL Sel, CPUMSELREGHID *pHiddenSel, RTGCPTR32 pInstrGC)
 {
     if (EMIsRawRing0Enabled(pVM) == false || PATMIsPatchGCAddr(pVM, pInstrGC) == true)
@@ -2137 +2137 @@
  * @param   pInstrGC    Instruction pointer (0:32 virtual address)
  */
-CSAMR3DECL(int) CSAMR3CheckCode(PVM pVM, RTGCPTR pInstrGC)
+CSAMR3DECL(int) CSAMR3CheckCode(PVM pVM, RTGCPTR32 pInstrGC)
 {
     int rc;
@@ -2179 +2179 @@
         int          rc;
         PCSAMPAGEREC pPageRec;
-        RTGCPTR      GCPtr = pVM->csam.s.pvDirtyBasePage[i];
+        RTGCPTR32      GCPtr = pVM->csam.s.pvDirtyBasePage[i];
 
         GCPtr = GCPtr & PAGE_BASE_GC_MASK;
@@ -2223 +2223 @@
     for (uint32_t i=0;i<pVM->csam.s.cPossibleCodePages;i++)
     {
-        RTGCPTR      GCPtr = pVM->csam.s.pvPossibleCodePage[i];
+        RTGCPTR32      GCPtr = pVM->csam.s.pvPossibleCodePage[i];
 
         GCPtr = GCPtr & PAGE_BASE_GC_MASK;
@@ -2262 +2262 @@
 {
     uint16_t    cbIDT;
-    RTGCPTR     GCPtrIDT = CPUMGetGuestIDTR(pVM, &cbIDT);
+    RTGCPTR32     GCPtrIDT = CPUMGetGuestIDTR(pVM, &cbIDT);
     uint32_t    iGateEnd;
     uint32_t    maxGates;
@@ -2295 +2295 @@
         for (unsigned i=0;i<RT_ELEMENTS(pVM->csam.s.pvCallInstruction);i++)
         {
-            RTGCPTR pHandler = pVM->csam.s.pvCallInstruction[i];
+            RTGCPTR32 pHandler = pVM->csam.s.pvCallInstruction[i];
 
             if (pHandler)
@@ -2365 +2365 @@
            )
         {
-            RTGCPTR pHandler;
+            RTGCPTR32 pHandler;
             CSAMP2GLOOKUPREC cacheRec = {0};            /* Cache record for PATMGCVirtToHCVirt. */
             PCSAMPAGE pPage = NULL;
@@ -2411 +2411 @@
                 PCPUMCTX    pCtx;
                 DISCPUSTATE cpu;
-                RTGCUINTPTR aOpenBsdPushCSOffset[3] = {0x03,       /* OpenBSD 3.7 & 3.8 */
+                RTGCUINTPTR32 aOpenBsdPushCSOffset[3] = {0x03,       /* OpenBSD 3.7 & 3.8 */
                                                        0x2B,       /* OpenBSD 4.0 installation ISO */
                                                        0x2F};      /* OpenBSD 4.0 after install */
@@ -2462 +2462 @@
                 Log(("Gate handler 0x%X is SAFE!\n", iGate));
 
-                RTGCPTR pNewHandlerGC = PATMR3QueryPatchGCPtr(pVM, pHandler);
+                RTGCPTR32 pNewHandlerGC = PATMR3QueryPatchGCPtr(pVM, pHandler);
                 if (pNewHandlerGC)
                 {
@@ -2483 +2483 @@
  * @param   GCPtrCall   Call address
  */
-CSAMR3DECL(int) CSAMR3RecordCallAddress(PVM pVM, RTGCPTR GCPtrCall)
+CSAMR3DECL(int) CSAMR3RecordCallAddress(PVM pVM, RTGCPTR32 GCPtrCall)
 {
     for (unsigned i=0;i<RT_ELEMENTS(pVM->csam.s.pvCallInstruction);i++)

trunk/src/VBox/VMM/PATM/CSAMInternal.h

@@ -252 +252 @@
  * @param   pBranchInstrGC  GC pointer of branch instruction
  */
-inline RTGCPTR CSAMResolveBranch(PDISCPUSTATE pCpu, RTGCPTR pBranchInstrGC)
+inline RTGCPTR32 CSAMResolveBranch(PDISCPUSTATE pCpu, RTGCPTR32 pBranchInstrGC)
 {
     uint32_t disp;
@@ -275 +275 @@
     }
 #ifdef IN_GC
-    return (RTGCPTR)((uint8_t *)pBranchInstrGC + pCpu->opsize + disp);
+    return (RTGCPTR32)((uint8_t *)pBranchInstrGC + pCpu->opsize + disp);
 #else
     return pBranchInstrGC + pCpu->opsize + disp;
@@ -282 +282 @@
 
 __BEGIN_DECLS
-CSAMGCDECL(int) CSAMGCCodePageWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange);
+CSAMGCDECL(int) CSAMGCCodePageWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR32 pvFault, RTGCPTR32 pvRange, uintptr_t offRange);
 __END_DECLS
 

trunk/src/VBox/VMM/PATM/PATM.cpp

@@ -64 +64 @@
 *******************************************************************************/
 
-static int          patmDisableUnusablePatch(PVM pVM, RTGCPTR pInstrGC, RTGCPTR pConflictAddr, PPATCHINFO pPatch);
+static int          patmDisableUnusablePatch(PVM pVM, RTGCPTR32 pInstrGC, RTGCPTR32 pConflictAddr, PPATCHINFO pPatch);
 static int          patmActivateInt3Patch(PVM pVM, PPATCHINFO pPatch);
 static int          patmDeactivateInt3Patch(PVM pVM, PPATCHINFO pPatch);
 
 #ifdef LOG_ENABLED // keep gcc quiet
-static bool         patmIsCommonIDTHandlerPatch(PVM pVM, RTGCPTR pInstrGC);
+static bool         patmIsCommonIDTHandlerPatch(PVM pVM, RTGCPTR32 pInstrGC);
 #endif
 #ifdef VBOX_WITH_STATISTICS
@@ -409 +409 @@
 PATMR3DECL(void) PATMR3Relocate(PVM pVM)
 {
-    RTGCPTR         GCPtrNew = MMHyperHC2GC(pVM, pVM->patm.s.pGCStateHC);
+    RTGCPTR32         GCPtrNew = MMHyperHC2GC(pVM, pVM->patm.s.pGCStateHC);
     RTGCINTPTR      delta = GCPtrNew - pVM->patm.s.pGCStateGC;
 
@@ -533 +533 @@
         for (int i=0;i<orgsize;i++)
         {
-            int rc = PATMR3QueryOpcode(pDisInfo->pVM, (RTGCPTR)pSrc, pDest);
+            int rc = PATMR3QueryOpcode(pDisInfo->pVM, (RTGCPTR32)pSrc, pDest);
             if (VBOX_SUCCESS(rc))
             {
@@ -635 +635 @@
         {
         case FIXUP_ABSOLUTE:
-            Log(("Absolute fixup at %VGv %VHv -> %VHv at %VGv\n", pRec->pSource, *(RTGCUINTPTR*)pRec->pRelocPos, *(RTGCINTPTR*)pRec->pRelocPos + delta, pRec->pRelocPos));
+            Log(("Absolute fixup at %VGv %VHv -> %VHv at %VGv\n", pRec->pSource, *(RTGCUINTPTR32*)pRec->pRelocPos, *(RTGCINTPTR*)pRec->pRelocPos + delta, pRec->pRelocPos));
             if (!pRec->pSource || PATMIsPatchGCAddr(pVM, pRec->pSource))
             {
-                *(RTGCUINTPTR *)pRec->pRelocPos += delta;
+                *(RTGCUINTPTR32 *)pRec->pRelocPos += delta;
             }
             else
@@ -649 +649 @@
 
                 memcpy(oldInstr, pPatch->patch.aPrivInstr, pPatch->patch.cbPrivInstr);
-                *(RTGCPTR *)&oldInstr[pPatch->patch.cbPrivInstr - sizeof(RTGCPTR)] = pRec->pDest;
+                *(RTGCPTR32 *)&oldInstr[pPatch->patch.cbPrivInstr - sizeof(RTGCPTR32)] = pRec->pDest;
 
                 rc = PGMPhysReadGCPtr(pVM, curInstr, pPatch->patch.pPrivInstrGC, pPatch->patch.cbPrivInstr);
                 Assert(VBOX_SUCCESS(rc) || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
 
-                pRec->pDest = (RTGCPTR)((RTGCUINTPTR)pRec->pDest + delta);
+                pRec->pDest = (RTGCPTR32)((RTGCUINTPTR32)pRec->pDest + delta);
 
                 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT)
                 {
-                    RTGCPTR pPage = pPatch->patch.pPrivInstrGC & PAGE_BASE_GC_MASK;
+                    RTGCPTR32 pPage = pPatch->patch.pPrivInstrGC & PAGE_BASE_GC_MASK;
 
                     Log(("PATM: Patch page not present -> check later!\n"));
@@ -677 +677 @@
                 if (VBOX_SUCCESS(rc))
                 {
-                    *(RTGCPTR *)&curInstr[pPatch->patch.cbPrivInstr - sizeof(RTGCPTR)] = pRec->pDest;
+                    *(RTGCPTR32 *)&curInstr[pPatch->patch.cbPrivInstr - sizeof(RTGCPTR32)] = pRec->pDest;
                     rc = PGMPhysWriteGCPtrDirty(pVM, pRec->pSource, curInstr, pPatch->patch.cbPrivInstr);
                     AssertRC(rc);
@@ -686 +686 @@
         case FIXUP_REL_JMPTOPATCH:
         {
-            RTGCPTR pTarget = (RTGCPTR)((RTGCINTPTR)pRec->pDest + delta);
+            RTGCPTR32 pTarget = (RTGCPTR32)((RTGCINTPTR)pRec->pDest + delta);
 
             if (    pPatch->patch.uState == PATCH_ENABLED
@@ -693 +693 @@
                 uint8_t    oldJump[SIZEOF_NEAR_COND_JUMP32];
                 uint8_t    temp[SIZEOF_NEAR_COND_JUMP32];
-                RTGCPTR    pJumpOffGC;
+                RTGCPTR32    pJumpOffGC;
                 RTGCINTPTR displ   = (RTGCINTPTR)pTarget - (RTGCINTPTR)pRec->pSource;
                 RTGCINTPTR displOld= (RTGCINTPTR)pRec->pDest - (RTGCINTPTR)pRec->pSource;
@@ -708 +708 @@
                     oldJump[0] = pPatch->patch.aPrivInstr[0];
                     oldJump[1] = pPatch->patch.aPrivInstr[1];
-                    *(RTGCUINTPTR *)&oldJump[2] = displOld;
+                    *(RTGCUINTPTR32 *)&oldJump[2] = displOld;
                 }
                 else
@@ -716 +716 @@
                     pJumpOffGC = pPatch->patch.pPrivInstrGC + 1;    //one byte opcode
                     oldJump[0] = 0xE9;
-                    *(RTGCUINTPTR *)&oldJump[1] = displOld;
+                    *(RTGCUINTPTR32 *)&oldJump[1] = displOld;
                 }
                 else
@@ -733 +733 @@
                 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT)
                 {
-                    RTGCPTR pPage = pPatch->patch.pPrivInstrGC & PAGE_BASE_GC_MASK;
+                    RTGCPTR32 pPage = pPatch->patch.pPrivInstrGC & PAGE_BASE_GC_MASK;
 
                     rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_ALL, pPage, pPage + (PAGE_SIZE - 1) /* inclusive! */, 0, patmVirtPageHandler, "PATMGCMonitorPage", 0, "PATMMonitorPatchJump");
@@ -770 +770 @@
         case FIXUP_REL_JMPTOGUEST:
         {
-            RTGCPTR    pSource = (RTGCPTR)((RTGCINTPTR)pRec->pSource + delta);
+            RTGCPTR32    pSource = (RTGCPTR32)((RTGCINTPTR)pRec->pSource + delta);
             RTGCINTPTR displ   = (RTGCINTPTR)pRec->pDest - (RTGCINTPTR)pSource;
 
             Assert(!(pPatch->patch.flags & PATMFL_GLOBAL_FUNCTIONS));
             Log(("Relative fixup (p2g) %08X -> %08X at %08X (source=%08x, target=%08x)\n", *(int32_t*)pRec->pRelocPos, displ, pRec->pRelocPos, pRec->pSource, pRec->pDest));
-            *(RTGCUINTPTR *)pRec->pRelocPos = displ;
+            *(RTGCUINTPTR32 *)pRec->pRelocPos = displ;
             pRec->pSource = pSource;
             break;
@@ -842 +842 @@
     PPATMPATCHREC pPatch = (PPATMPATCHREC)pNode;
 
-    PATMR3EnablePatch((PVM)pVM, (RTGCPTR)pPatch->Core.Key);
+    PATMR3EnablePatch((PVM)pVM, (RTGCPTR32)pPatch->Core.Key);
     return 0;
 }
@@ -862 +862 @@
     PPATMPATCHREC pPatch = (PPATMPATCHREC)pNode;
 
-    PATMR3DisablePatch((PVM)pVM, (RTGCPTR)pPatch->Core.Key);
+    PATMR3DisablePatch((PVM)pVM, (RTGCPTR32)pPatch->Core.Key);
     return 0;
 }
@@ -891 +891 @@
  * @param   pcb         Size of the patch memory block
  */
-PATMR3DECL(RTGCPTR) PATMR3QueryPatchMemGC(PVM pVM, uint32_t *pcb)
+PATMR3DECL(RTGCPTR32) PATMR3QueryPatchMemGC(PVM pVM, uint32_t *pcb)
 {
     if (pcb)
@@ -946 +946 @@
  * @param   pAddrGC     GC pointer
  */
-PATMR3DECL(R3PTRTYPE(void *)) PATMR3GCPtrToHCPtr(PVM pVM, RTGCPTR pAddrGC)
+PATMR3DECL(R3PTRTYPE(void *)) PATMR3GCPtrToHCPtr(PVM pVM, RTGCPTR32 pAddrGC)
 {
     if (pVM->patm.s.pPatchMemGC <= pAddrGC && pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem > pAddrGC)
@@ -1057 +1057 @@
                 {
                     uint8_t *pPatchHC;
-                    RTGCPTR  pPatchGC;
-                    RTGCPTR  pOrgInstrGC;
+                    RTGCPTR32  pPatchGC;
+                    RTGCPTR32  pOrgInstrGC;
 
                     pOrgInstrGC = PATMR3PatchToGCPtr(pVM, pInstrGC, 0);
@@ -1090 +1090 @@
         }
         /* Our jumps *always* have a dword displacement (to make things easier). */
-        Assert(sizeof(uint32_t) == sizeof(RTGCPTR));
-        displ =  pBranchTargetGC - (pInstrGC + pRec->offDispl + sizeof(RTGCPTR));
-        *(RTGCPTR *)(pRec->pJumpHC + pRec->offDispl) = displ;
-        Log(("Set branch target %d to %08X : %08x - (%08x + %d + %d)\n", nrJumpRecs, displ, pBranchTargetGC, pInstrGC, pRec->offDispl, sizeof(RTGCPTR)));
+        Assert(sizeof(uint32_t) == sizeof(RTGCPTR32));
+        displ =  pBranchTargetGC - (pInstrGC + pRec->offDispl + sizeof(RTGCPTR32));
+        *(RTGCPTR32 *)(pRec->pJumpHC + pRec->offDispl) = displ;
+        Log(("Set branch target %d to %08X : %08x - (%08x + %d + %d)\n", nrJumpRecs, displ, pBranchTargetGC, pInstrGC, pRec->offDispl, sizeof(RTGCPTR32)));
     }
     Assert(nrJumpRecs == pPatch->nrJumpRecs);
@@ -1107 +1107 @@
  *
  */
-static void patmAddIllegalInstrRecord(PVM pVM, PPATCHINFO pPatch, RTGCPTR pInstrGC)
+static void patmAddIllegalInstrRecord(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pInstrGC)
 {
     PAVLPVNODECORE pRec;
@@ -1120 +1120 @@
 }
 
-static bool patmIsIllegalInstr(PPATCHINFO pPatch, RTGCPTR pInstrGC)
+static bool patmIsIllegalInstr(PPATCHINFO pPatch, RTGCPTR32 pInstrGC)
 {
     PAVLPVNODECORE pRec;
@@ -1142 +1142 @@
  */
  /** @note Be extremely careful with this function. Make absolutely sure the guest address is correct! (to avoid executing instructions twice!) */
-void patmr3AddP2GLookupRecord(PVM pVM, PPATCHINFO pPatch, uint8_t *pPatchInstrHC, RTGCPTR pInstrGC, PATM_LOOKUP_TYPE enmType, bool fDirty)
+void patmr3AddP2GLookupRecord(PVM pVM, PPATCHINFO pPatch, uint8_t *pPatchInstrHC, RTGCPTR32 pInstrGC, PATM_LOOKUP_TYPE enmType, bool fDirty)
 {
     bool ret;
@@ -1201 +1201 @@
  * @param   pPatchInstrGC   Guest context pointer to patch block
  */
-void patmr3RemoveP2GLookupRecord(PVM pVM, PPATCHINFO pPatch, RTGCPTR pPatchInstrGC)
+void patmr3RemoveP2GLookupRecord(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pPatchInstrGC)
 {
     PAVLU32NODECORE     pNode;
@@ -1691 +1691 @@
     case OP_STI:
     {
-        RTGCPTR pNextInstrGC = 0;   /* by default no inhibit irq */
+        RTGCPTR32 pNextInstrGC = 0;   /* by default no inhibit irq */
 
         /** In a sequence of instructions that inhibit irqs, only the first one actually inhibits irqs. */
@@ -1855 +1855 @@
         if (pPatch->flags & PATMFL_SUPPORT_INDIRECT_CALLS && pCpu->param1.size == 4 /* no far calls! */)
         {
-            rc = patmPatchGenCall(pVM, pPatch, pCpu, pCurInstrGC, (RTGCPTR)0xDEADBEEF, true);
+            rc = patmPatchGenCall(pVM, pPatch, pCpu, pCurInstrGC, (RTGCPTR32)0xDEADBEEF, true);
             if (VBOX_SUCCESS(rc))
             {
@@ -1931 +1931 @@
     {
         int     rc2;
-        RTGCPTR pNextInstrGC = pCurInstrGC + pCpu->opsize;
+        RTGCPTR32 pNextInstrGC = pCurInstrGC + pCpu->opsize;
 
         pPatch->flags &= ~PATMFL_INHIBIT_IRQS;
@@ -1960 +1960 @@
            )
         {
-            RTGCPTR pNextInstrGC = pCurInstrGC + pCpu->opsize;
+            RTGCPTR32 pNextInstrGC = pCurInstrGC + pCpu->opsize;
 
             // The end marker for this kind of patch is any instruction at a location outside our patch jump
@@ -1982 +1982 @@
  *
  */
-static void patmPatchAddDisasmJump(PVM pVM, PPATCHINFO pPatch, RTGCPTR pInstrGC)
+static void patmPatchAddDisasmJump(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pInstrGC)
 {
     PAVLPVNODECORE pRec;
@@ -2002 +2002 @@
  *
  */
-static bool patmIsKnownDisasmJump(PPATCHINFO pPatch, RTGCPTR pInstrGC)
+static bool patmIsKnownDisasmJump(PPATCHINFO pPatch, RTGCPTR32 pInstrGC)
 {
     PAVLPVNODECORE pRec;
@@ -2032 +2032 @@
         DISCPUSTATE cpu;
         uint8_t    *pOrgJumpHC;
-        RTGCPTR     pOrgJumpGC;
+        RTGCPTR32     pOrgJumpGC;
         uint32_t    dummy;
 
@@ -2110 +2110 @@
         if (PATMIsPatchGCAddr(pVM, pCurInstrGC))
         {
-            RTGCPTR pOrgInstrGC = patmPatchGCPtr2GuestGCPtr(pVM, pPatch, pCurInstrGC);
+            RTGCPTR32 pOrgInstrGC = patmPatchGCPtr2GuestGCPtr(pVM, pPatch, pCurInstrGC);
 
             if (pOrgInstrGC != pPatch->pTempInfo->pLastDisasmInstrGC)
@@ -2145 +2145 @@
            )
         {
-            RTGCPTR pTargetGC = PATMResolveBranch(&cpu, pCurInstrGC);
-            RTGCPTR pOrgTargetGC;
+            RTGCPTR32 pTargetGC = PATMResolveBranch(&cpu, pCurInstrGC);
+            RTGCPTR32 pOrgTargetGC;
 
             if (pTargetGC == 0)
@@ -2231 +2231 @@
  *
  */
-PATMR3DECL(int) PATMR3DetectConflict(PVM pVM, RTGCPTR pInstrGC, RTGCPTR pConflictGC)
+PATMR3DECL(int) PATMR3DetectConflict(PVM pVM, RTGCPTR32 pInstrGC, RTGCPTR32 pConflictGC)
 {
     PPATCHINFO pTargetPatch = PATMFindActivePatchByEntrypoint(pVM, pConflictGC, true /* include patch hints */);
@@ -2303 +2303 @@
                 uint32_t    opsizenext;
                 uint8_t *pNextInstrHC;
-                RTGCPTR  pNextInstrGC = pCurInstrGC + opsize;
+                RTGCPTR32  pNextInstrGC = pCurInstrGC + opsize;
 
                 Log(("patmRecompileCodeStream: irqs inhibited by instruction %VGv\n", pNextInstrGC));
@@ -2520 +2520 @@
         }
         temp[0] = 0xE9;  //jmp
-        *(uint32_t *)&temp[1] = (RTGCUINTPTR)PATCHCODE_PTR_GC(pPatch) - ((RTGCUINTPTR)pPatch->pPrivInstrGC + SIZEOF_NEARJUMP32);    //return address
+        *(uint32_t *)&temp[1] = (RTGCUINTPTR32)PATCHCODE_PTR_GC(pPatch) - ((RTGCUINTPTR32)pPatch->pPrivInstrGC + SIZEOF_NEARJUMP32);    //return address
     }
     rc = PGMPhysWriteGCPtrDirty(pVM, pPatch->pPrivInstrGC, temp, pPatch->cbPatchJump);
@@ -2593 +2593 @@
  * @param   pPatch      Patch record
  */
-static int patmGenCallToPatch(PVM pVM, PPATCHINFO pPatch, RTGCPTR pTargetGC, bool fAddFixup = true)
+static int patmGenCallToPatch(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pTargetGC, bool fAddFixup = true)
 {
     uint8_t  temp[8];
@@ -2640 +2640 @@
  *
  */
-PATMR3DECL(int) PATMR3PatchBlock(PVM pVM, RTGCPTR pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC,
+PATMR3DECL(int) PATMR3PatchBlock(PVM pVM, RTGCPTR32 pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC,
                                  uint32_t uOpcode, uint32_t uOpSize, PPATMPATCHREC pPatchRec)
 {
@@ -2647 +2647 @@
     DISCPUSTATE cpu;
     uint32_t orgOffsetPatchMem = ~0;
-    RTGCPTR pInstrStart;
+    RTGCPTR32 pInstrStart;
 #ifdef LOG_ENABLED
     uint32_t opsize;
@@ -2867 +2867 @@
  *
  */
-static int patmIdtHandler(PVM pVM, RTGCPTR pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC,
+static int patmIdtHandler(PVM pVM, RTGCPTR32 pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC,
                           uint32_t uOpSize, PPATMPATCHREC pPatchRec)
 {
@@ -2874 +2874 @@
     DISCPUSTATE cpuPush, cpuJmp;
     uint32_t opsize;
-    RTGCPTR  pCurInstrGC = pInstrGC;
+    RTGCPTR32  pCurInstrGC = pInstrGC;
     uint8_t *pCurInstrHC = pInstrHC;
     uint32_t orgOffsetPatchMem = ~0;
@@ -2888 +2888 @@
     if (disret && cpuPush.pCurInstr->opcode == OP_PUSH)
     {
-        RTGCPTR  pJmpInstrGC;
+        RTGCPTR32  pJmpInstrGC;
         int      rc;
 
@@ -2994 +2994 @@
  *
  */
-static int patmInstallTrapTrampoline(PVM pVM, RTGCPTR pInstrGC, PPATMPATCHREC pPatchRec)
+static int patmInstallTrapTrampoline(PVM pVM, RTGCPTR32 pInstrGC, PPATMPATCHREC pPatchRec)
 {
     PPATCHINFO pPatch = &pPatchRec->patch;
@@ -3082 +3082 @@
  *
  */
-static bool patmIsCommonIDTHandlerPatch(PVM pVM, RTGCPTR pInstrGC)
+static bool patmIsCommonIDTHandlerPatch(PVM pVM, RTGCPTR32 pInstrGC)
 {
     PPATMPATCHREC pRec;
@@ -3103 +3103 @@
  *
  */
-static int patmDuplicateFunction(PVM pVM, RTGCPTR pInstrGC, PPATMPATCHREC pPatchRec)
+static int patmDuplicateFunction(PVM pVM, RTGCPTR32 pInstrGC, PPATMPATCHREC pPatchRec)
 {
     PPATCHINFO pPatch = &pPatchRec->patch;
@@ -3233 +3233 @@
  *
  */
-static int patmCreateTrampoline(PVM pVM, RTGCPTR pInstrGC, PPATMPATCHREC pPatchRec)
+static int patmCreateTrampoline(PVM pVM, RTGCPTR32 pInstrGC, PPATMPATCHREC pPatchRec)
 {
     PPATCHINFO  pPatch = &pPatchRec->patch;
-    RTGCPTR     pPage, pPatchTargetGC = 0;
+    RTGCPTR32     pPage, pPatchTargetGC = 0;
     uint32_t    orgOffsetPatchMem = ~0;
     int         rc = VERR_PATCHING_REFUSED;
@@ -3248 +3248 @@
     pPage = pInstrGC & PAGE_BASE_GC_MASK;
 
-    PPATMPATCHPAGE pPatchPage = (PPATMPATCHPAGE)RTAvloGCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, (RTGCPTR)pPage);
+    PPATMPATCHPAGE pPatchPage = (PPATMPATCHPAGE)RTAvloGCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, (RTGCPTR32)pPage);
     if (pPatchPage)
     {
@@ -3367 +3367 @@
 PATMR3DECL(int) PATMR3DuplicateFunctionRequest(PVM pVM, PCPUMCTX pCtx)
 {
-    RTGCPTR     pBranchTarget, pPage;
+    RTGCPTR32     pBranchTarget, pPage;
     int         rc;
-    RTGCPTR     pPatchTargetGC = 0;
+    RTGCPTR32     pPatchTargetGC = 0;
 
     pBranchTarget = pCtx->edx;
@@ -3377 +3377 @@
     pPage = pBranchTarget & PAGE_BASE_GC_MASK;
 
-    PPATMPATCHPAGE pPatchPage = (PPATMPATCHPAGE)RTAvloGCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, (RTGCPTR)pPage);
+    PPATMPATCHPAGE pPatchPage = (PPATMPATCHPAGE)RTAvloGCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, (RTGCPTR32)pPage);
     if (pPatchPage)
     {
@@ -3421 +3421 @@
     {
         pCtx->eax = pPatchTargetGC;
-        pCtx->eax = pCtx->eax - (RTGCUINTPTR)pVM->patm.s.pPatchMemGC;   /* make it relative */
+        pCtx->eax = pCtx->eax - (RTGCUINTPTR32)pVM->patm.s.pPatchMemGC;   /* make it relative */
     }
     else
@@ -3448 +3448 @@
  *
  */
-static int patmReplaceFunctionCall(PVM pVM, DISCPUSTATE *pCpu, RTGCPTR pInstrGC, PPATCHINFO pPatch)
+static int patmReplaceFunctionCall(PVM pVM, DISCPUSTATE *pCpu, RTGCPTR32 pInstrGC, PPATCHINFO pPatch)
 {
     int           rc = VERR_PATCHING_REFUSED;
     DISCPUSTATE   cpu;
-    RTGCPTR       pTargetGC;
+    RTGCPTR32       pTargetGC;
     PPATMPATCHREC pPatchFunction;
     uint32_t      opsize;
@@ -3560 +3560 @@
  *
  */
-static int patmPatchMMIOInstr(PVM pVM, RTGCPTR pInstrGC, DISCPUSTATE *pCpu, PPATCHINFO pPatch)
+static int patmPatchMMIOInstr(PVM pVM, RTGCPTR32 pInstrGC, DISCPUSTATE *pCpu, PPATCHINFO pPatch)
 {
     uint8_t *pPB;
@@ -3581 +3581 @@
 
     /* Add relocation record for cached data access. */
-    if (patmPatchAddReloc32(pVM, pPatch, &pPB[pCpu->opsize - sizeof(RTGCPTR)], FIXUP_ABSOLUTE, pPatch->pPrivInstrGC, pVM->patm.s.mmio.pCachedData) != VINF_SUCCESS)
+    if (patmPatchAddReloc32(pVM, pPatch, &pPB[pCpu->opsize - sizeof(RTGCPTR32)], FIXUP_ABSOLUTE, pPatch->pPrivInstrGC, pVM->patm.s.mmio.pCachedData) != VINF_SUCCESS)
     {
         Log(("Relocation failed for cached mmio address!!\n"));
@@ -3599 +3599 @@
 
     /* Replace address with that of the cached item. */
-    rc = PGMPhysWriteGCPtrDirty(pVM, pInstrGC + pCpu->opsize - sizeof(RTGCPTR), &pVM->patm.s.mmio.pCachedData, sizeof(RTGCPTR));
+    rc = PGMPhysWriteGCPtrDirty(pVM, pInstrGC + pCpu->opsize - sizeof(RTGCPTR32), &pVM->patm.s.mmio.pCachedData, sizeof(RTGCPTR32));
     AssertRC(rc);
     if (VBOX_FAILURE(rc))
@@ -3635 +3635 @@
  *
  */
-static int patmPatchPATMMMIOInstr(PVM pVM, RTGCPTR pInstrGC, PPATCHINFO pPatch)
+static int patmPatchPATMMMIOInstr(PVM pVM, RTGCPTR32 pInstrGC, PPATCHINFO pPatch)
 {
     DISCPUSTATE   cpu;
@@ -3667 +3667 @@
 
     /* Add relocation record for cached data access. */
-    if (patmPatchAddReloc32(pVM, pPatch, &pInstrHC[cpu.opsize - sizeof(RTGCPTR)], FIXUP_ABSOLUTE) != VINF_SUCCESS)
+    if (patmPatchAddReloc32(pVM, pPatch, &pInstrHC[cpu.opsize - sizeof(RTGCPTR32)], FIXUP_ABSOLUTE) != VINF_SUCCESS)
     {
         Log(("Relocation failed for cached mmio address!!\n"));
@@ -3673 +3673 @@
     }
     /* Replace address with that of the cached item. */
-    *(RTGCPTR *)&pInstrHC[cpu.opsize - sizeof(RTGCPTR)] = pVM->patm.s.mmio.pCachedData;
+    *(RTGCPTR32 *)&pInstrHC[cpu.opsize - sizeof(RTGCPTR32)] = pVM->patm.s.mmio.pCachedData;
 
     /* Lowest and highest address for write monitoring. */
@@ -3748 +3748 @@
  *
  */
-PATMR3DECL(int) PATMR3PatchInstrInt3(PVM pVM, RTGCPTR pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, DISCPUSTATE *pCpu, PPATCHINFO pPatch)
+PATMR3DECL(int) PATMR3PatchInstrInt3(PVM pVM, RTGCPTR32 pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, DISCPUSTATE *pCpu, PPATCHINFO pPatch)
 {
     uint8_t ASMInt3 = 0xCC;
@@ -3803 +3803 @@
  *
  */
-int patmPatchJump(PVM pVM, RTGCPTR pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, DISCPUSTATE *pCpu, PPATMPATCHREC pPatchRec)
+int patmPatchJump(PVM pVM, RTGCPTR32 pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, DISCPUSTATE *pCpu, PPATMPATCHREC pPatchRec)
 {
     PPATCHINFO pPatch = &pPatchRec->patch;
@@ -3878 +3878 @@
      * references the target instruction in the conflict patch.
      */
-    RTGCPTR pJmpDest = PATMR3GuestGCPtrToPatchGCPtr(pVM, pInstrGC + pCpu->opsize + (int32_t)pCpu->param1.parval);
+    RTGCPTR32 pJmpDest = PATMR3GuestGCPtrToPatchGCPtr(pVM, pInstrGC + pCpu->opsize + (int32_t)pCpu->param1.parval);
 
     AssertMsg(pJmpDest, ("PATMR3GuestGCPtrToPatchGCPtr failed for %VGv\n", pInstrGC + pCpu->opsize + (int32_t)pCpu->param1.parval));
@@ -3924 +3924 @@
  * @param   flags       Patch flags
  */
-PATMR3DECL(int) PATMR3AddHint(PVM pVM, RTGCPTR pInstrGC, uint32_t flags)
+PATMR3DECL(int) PATMR3AddHint(PVM pVM, RTGCPTR32 pInstrGC, uint32_t flags)
 {
     Assert(pInstrGC);
@@ -3943 +3943 @@
  * @note    returns failure if patching is not allowed or possible
  */
-PATMR3DECL(int) PATMR3InstallPatch(PVM pVM, RTGCPTR pInstrGC, uint64_t flags)
+PATMR3DECL(int) PATMR3InstallPatch(PVM pVM, RTGCPTR32 pInstrGC, uint64_t flags)
 {
     DISCPUSTATE cpu;
@@ -3986 +3986 @@
     if (CPUMGetGuestCPL(pVM, CPUMCTX2CORE(pCtx)) == 0)
     {
-        RTGCPTR pInstrGCFlat = SELMToFlat(pVM, pCtx->eflags, pCtx->cs, &pCtx->csHid, pInstrGC);
+        RTGCPTR32 pInstrGCFlat = SELMToFlat(pVM, pCtx->eflags, pCtx->cs, &pCtx->csHid, pInstrGC);
         if (pInstrGCFlat != pInstrGC)
         {
@@ -4005 +4005 @@
         && (flags & PATMFL_MMIO_ACCESS))
     {
-        RTGCUINTPTR offset;
-        void       *pvPatchCoreOffset;
+        RTGCUINTPTR32 offset;
+        void         *pvPatchCoreOffset;
 
         /* Find the patch record. */
@@ -4389 +4389 @@
  * @param   pInstrGC    Instruction address
  */
-static uint32_t patmGetInstrSize(PVM pVM, PPATCHINFO pPatch, RTGCPTR pInstrGC)
+static uint32_t patmGetInstrSize(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pInstrGC)
 {
     uint8_t *pInstrHC;
@@ -4416 +4416 @@
  * @param   pPatch      Patch record
  */
-int patmAddPatchToPage(PVM pVM, RTGCUINTPTR pPage, PPATCHINFO pPatch)
+int patmAddPatchToPage(PVM pVM, RTGCUINTPTR32 pPage, PPATCHINFO pPatch)
 {
     PPATMPATCHPAGE pPatchPage;
@@ -4481 +4481 @@
         LogFlow(("patmAddPatchToPage: lowest patch page address %VGv current lowest %VGv\n", pGuestToPatchRec->Core.Key, pPatchPage->pLowestAddrGC));
         if (    pPatchPage->pLowestAddrGC == 0
-            ||  pPatchPage->pLowestAddrGC > (RTGCPTR)pGuestToPatchRec->Core.Key)
-        {
-            RTGCUINTPTR offset;
-
-            pPatchPage->pLowestAddrGC = (RTGCPTR)pGuestToPatchRec->Core.Key;
+            ||  pPatchPage->pLowestAddrGC > (RTGCPTR32)pGuestToPatchRec->Core.Key)
+        {
+            RTGCUINTPTR32 offset;
+
+            pPatchPage->pLowestAddrGC = (RTGCPTR32)pGuestToPatchRec->Core.Key;
 
             offset = pPatchPage->pLowestAddrGC & PAGE_OFFSET_MASK;
@@ -4496 +4496 @@
                 if (pGuestToPatchRec)
                 {
-                    uint32_t size = patmGetInstrSize(pVM, pPatch, (RTGCPTR)pGuestToPatchRec->Core.Key);
-                    if ((RTGCUINTPTR)pGuestToPatchRec->Core.Key + size  > pPage)
+                    uint32_t size = patmGetInstrSize(pVM, pPatch, (RTGCPTR32)pGuestToPatchRec->Core.Key);
+                    if ((RTGCUINTPTR32)pGuestToPatchRec->Core.Key + size  > pPage)
                     {
                         pPatchPage->pLowestAddrGC = pPage;
@@ -4514 +4514 @@
         LogFlow(("patmAddPatchToPage: highest patch page address %VGv current lowest %VGv\n", pGuestToPatchRec->Core.Key, pPatchPage->pHighestAddrGC));
         if (    pPatchPage->pHighestAddrGC == 0
-            ||  pPatchPage->pHighestAddrGC <= (RTGCPTR)pGuestToPatchRec->Core.Key)
-        {
-            pPatchPage->pHighestAddrGC = (RTGCPTR)pGuestToPatchRec->Core.Key;
+            ||  pPatchPage->pHighestAddrGC <= (RTGCPTR32)pGuestToPatchRec->Core.Key)
+        {
+            pPatchPage->pHighestAddrGC = (RTGCPTR32)pGuestToPatchRec->Core.Key;
             /* Increase by instruction size. */
             uint32_t size = patmGetInstrSize(pVM, pPatch, pPatchPage->pHighestAddrGC);
@@ -4536 +4536 @@
  * @param   pPatch      Patch record
  */
-int patmRemovePatchFromPage(PVM pVM, RTGCUINTPTR pPage, PPATCHINFO pPatch)
+int patmRemovePatchFromPage(PVM pVM, RTGCUINTPTR32 pPage, PPATCHINFO pPatch)
 {
     PPATMPATCHPAGE pPatchPage;
@@ -4601 +4601 @@
 int patmInsertPatchPages(PVM pVM, PPATCHINFO pPatch)
 {
-    int         rc;
-    RTGCUINTPTR pPatchPageStart, pPatchPageEnd, pPage;
+    int           rc;
+    RTGCUINTPTR32 pPatchPageStart, pPatchPageEnd, pPage;
 
     /* Insert the pages that contain patched instructions into a lookup tree for detecting self-modifying code. */
-    pPatchPageStart = (RTGCUINTPTR)pPatch->pInstrGCLowest  & PAGE_BASE_GC_MASK;
-    pPatchPageEnd   = (RTGCUINTPTR)pPatch->pInstrGCHighest & PAGE_BASE_GC_MASK;
+    pPatchPageStart = (RTGCUINTPTR32)pPatch->pInstrGCLowest  & PAGE_BASE_GC_MASK;
+    pPatchPageEnd   = (RTGCUINTPTR32)pPatch->pInstrGCHighest & PAGE_BASE_GC_MASK;
 
     /** @todo optimize better (large gaps between current and next used page) */
@@ -4636 +4636 @@
 {
     int         rc;
-    RTGCUINTPTR pPatchPageStart, pPatchPageEnd, pPage;
+    RTGCUINTPTR32 pPatchPageStart, pPatchPageEnd, pPage;
 
     /* Insert the pages that contain patched instructions into a lookup tree for detecting self-modifying code. */
-    pPatchPageStart = (RTGCUINTPTR)pPatch->pInstrGCLowest  & PAGE_BASE_GC_MASK;
-    pPatchPageEnd   = (RTGCUINTPTR)pPatch->pInstrGCHighest & PAGE_BASE_GC_MASK;
+    pPatchPageStart = (RTGCUINTPTR32)pPatch->pInstrGCLowest  & PAGE_BASE_GC_MASK;
+    pPatchPageEnd   = (RTGCUINTPTR32)pPatch->pInstrGCHighest & PAGE_BASE_GC_MASK;
 
     for(pPage = pPatchPageStart; pPage <= pPatchPageEnd; pPage += PAGE_SIZE)
@@ -4668 +4668 @@
  *
  */
-PATMR3DECL(int) PATMR3PatchWrite(PVM pVM, RTGCPTR GCPtr, uint32_t cbWrite)
-{
-    RTGCUINTPTR          pWritePageStart, pWritePageEnd, pPage;
+PATMR3DECL(int) PATMR3PatchWrite(PVM pVM, RTGCPTR32 GCPtr, uint32_t cbWrite)
+{
+    RTGCUINTPTR32          pWritePageStart, pWritePageEnd, pPage;
 
     Log(("PATMR3PatchWrite %VGv %x\n", GCPtr, cbWrite));
@@ -4684 +4684 @@
     STAM_PROFILE_ADV_START(&pVM->patm.s.StatPatchWrite, a);
 
-    pWritePageStart =  (RTGCUINTPTR)GCPtr & PAGE_BASE_GC_MASK;
-    pWritePageEnd   = ((RTGCUINTPTR)GCPtr + cbWrite - 1) & PAGE_BASE_GC_MASK;
+    pWritePageStart =  (RTGCUINTPTR32)GCPtr & PAGE_BASE_GC_MASK;
+    pWritePageEnd   = ((RTGCUINTPTR32)GCPtr + cbWrite - 1) & PAGE_BASE_GC_MASK;
 
     for (pPage = pWritePageStart; pPage <= pWritePageEnd; pPage += PAGE_SIZE)
     {
 loop_start:
-        PPATMPATCHPAGE pPatchPage = (PPATMPATCHPAGE)RTAvloGCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, (RTGCPTR)pPage);
+        PPATMPATCHPAGE pPatchPage = (PPATMPATCHPAGE)RTAvloGCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, (RTGCPTR32)pPage);
         if (pPatchPage)
         {
@@ -4697 +4697 @@
 
             /* Quick check to see if the write is in the patched part of the page */
-            if (    pPatchPage->pLowestAddrGC  > (RTGCPTR)((RTGCUINTPTR)GCPtr + cbWrite - 1)
+            if (    pPatchPage->pLowestAddrGC  > (RTGCPTR32)((RTGCUINTPTR32)GCPtr + cbWrite - 1)
                 ||  pPatchPage->pHighestAddrGC < GCPtr)
             {
@@ -4708 +4708 @@
                 {
                     PPATCHINFO pPatch = pPatchPage->aPatch[i];
-                    RTGCPTR pPatchInstrGC;
+                    RTGCPTR32 pPatchInstrGC;
                     //unused: bool    fForceBreak = false;
 
@@ -4715 +4715 @@
                     for (uint32_t j=0; j<cbWrite; j++)
                     {
-                        RTGCPTR pGuestPtrGC = (RTGCPTR)((RTGCUINTPTR)GCPtr + j);
+                        RTGCPTR32 pGuestPtrGC = (RTGCPTR32)((RTGCUINTPTR32)GCPtr + j);
 
                         if (    pPatch->cbPatchJump
@@ -4734 +4734 @@
                         if (!pPatchInstrGC)
                         {
-                            RTGCPTR  pClosestInstrGC;
+                            RTGCPTR32  pClosestInstrGC;
                             uint32_t size;
 
@@ -4795 +4795 @@
                  */
 invalid_write_loop_start:
-                pPatchPage = (PPATMPATCHPAGE)RTAvloGCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, (RTGCPTR)pPage);
+                pPatchPage = (PPATMPATCHPAGE)RTAvloGCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, (RTGCPTR32)pPage);
 
                 if (pPatchPage)
@@ -4841 +4841 @@
 /** @note Currently only called by CSAMR3FlushPage; optimization to avoid having to double check if the physical address has changed
  */
-PATMR3DECL(int) PATMR3FlushPage(PVM pVM, RTGCPTR addr)
+PATMR3DECL(int) PATMR3FlushPage(PVM pVM, RTGCPTR32 addr)
 {
     addr &= PAGE_BASE_GC_MASK;
@@ -4873 +4873 @@
  * @param   pInstrGC    Guest context pointer to instruction
  */
-PATMR3DECL(bool) PATMR3HasBeenPatched(PVM pVM, RTGCPTR pInstrGC)
+PATMR3DECL(bool) PATMR3HasBeenPatched(PVM pVM, RTGCPTR32 pInstrGC)
 {
     PPATMPATCHREC pPatchRec;
@@ -4891 +4891 @@
  *
  */
-PATMR3DECL(int) PATMR3QueryOpcode(PVM pVM, RTGCPTR pInstrGC, uint8_t *pByte)
+PATMR3DECL(int) PATMR3QueryOpcode(PVM pVM, RTGCPTR32 pInstrGC, uint8_t *pByte)
 {
     PPATMPATCHREC pPatchRec;
@@ -4912 +4912 @@
         &&  pInstrGC < pPatchRec->patch.pPrivInstrGC + pPatchRec->patch.cbPatchJump)
     {
-        RTGCPTR offset = pInstrGC - pPatchRec->patch.pPrivInstrGC;
+        RTGCPTR32 offset = pInstrGC - pPatchRec->patch.pPrivInstrGC;
         *pByte = pPatchRec->patch.aPrivInstr[offset];
 
@@ -4935 +4935 @@
  *
  */
-PATMR3DECL(int) PATMR3DisablePatch(PVM pVM, RTGCPTR pInstrGC)
+PATMR3DECL(int) PATMR3DisablePatch(PVM pVM, RTGCPTR32 pInstrGC)
 {
     PPATMPATCHREC pPatchRec;
@@ -5000 +5000 @@
                     if (rc == VINF_SUCCESS)
                     {
-                        RTGCINTPTR displ = (RTGCUINTPTR)PATCHCODE_PTR_GC(pPatch) - ((RTGCUINTPTR)pPatch->pPrivInstrGC + SIZEOF_NEARJUMP32);
+                        RTGCINTPTR displ = (RTGCUINTPTR32)PATCHCODE_PTR_GC(pPatch) - ((RTGCUINTPTR32)pPatch->pPrivInstrGC + SIZEOF_NEARJUMP32);
 
                         if (    temp[0] != 0xE9 /* jmp opcode */
@@ -5090 +5090 @@
  *
  */
-static int patmDisableUnusablePatch(PVM pVM, RTGCPTR pInstrGC, RTGCPTR pConflictAddr, PPATCHINFO pConflictPatch)
+static int patmDisableUnusablePatch(PVM pVM, RTGCPTR32 pInstrGC, RTGCPTR32 pConflictAddr, PPATCHINFO pConflictPatch)
 {
 #ifdef PATM_RESOLVE_CONFLICTS_WITH_JUMP_PATCHES
@@ -5188 +5188 @@
  *
  */
-PATMR3DECL(int) PATMR3EnablePatch(PVM pVM, RTGCPTR pInstrGC)
+PATMR3DECL(int) PATMR3EnablePatch(PVM pVM, RTGCPTR32 pInstrGC)
 {
     PPATMPATCHREC pPatchRec;
@@ -5380 +5380 @@
     PPATCHINFO  pPatch;
     int         rc;
-    RTGCPTR     pInstrGC = pPatchRec->patch.pPrivInstrGC;
+    RTGCPTR32     pInstrGC = pPatchRec->patch.pPrivInstrGC;
 
     Log(("patmR3RefreshPatch: attempt to refresh patch at %VGv\n", pInstrGC));
@@ -5428 +5428 @@
     if (VBOX_SUCCESS(rc))
     {
-        RTGCPTR         pPatchTargetGC;
+        RTGCPTR32         pPatchTargetGC;
         PPATMPATCHREC   pNewPatchRec;
 
@@ -5492 +5492 @@
  *
  */
-PPATCHINFO PATMFindActivePatchByEntrypoint(PVM pVM, RTGCPTR pInstrGC, bool fIncludeHints)
+PPATCHINFO PATMFindActivePatchByEntrypoint(PVM pVM, RTGCPTR32 pInstrGC, bool fIncludeHints)
 {
     PPATMPATCHREC pPatchRec = (PPATMPATCHREC)RTAvloGCPtrGetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC, false);
@@ -5528 +5528 @@
  * @param   pPatchAddr  Guest context patch address (if true)
  */
-PATMR3DECL(bool) PATMR3IsInsidePatchJump(PVM pVM, RTGCPTR pAddr, PRTGCPTR pPatchAddr)
-{
-    RTGCPTR addr;
+PATMR3DECL(bool) PATMR3IsInsidePatchJump(PVM pVM, RTGCPTR32 pAddr, PRTGCPTR32 pPatchAddr)
+{
+    RTGCPTR32 addr;
     PPATCHINFO pPatch;
 
@@ -5559 +5559 @@
  *
  */
-PATMR3DECL(int) PATMR3RemovePatch(PVM pVM, RTGCPTR pInstrGC)
+PATMR3DECL(int) PATMR3RemovePatch(PVM pVM, RTGCPTR32 pInstrGC)
 {
     PPATMPATCHREC pPatchRec;
@@ -5625 +5625 @@
  * @param   pPatchGC    GC address in patch block
  */
-RTGCPTR patmPatchGCPtr2GuestGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pPatchGC)
+RTGCPTR32 patmPatchGCPtr2GuestGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pPatchGC)
 {
     Assert(pPatch->Patch2GuestAddrTree);
@@ -5644 +5644 @@
  *
  */
-RTGCPTR patmGuestGCPtrToPatchGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t*) pInstrGC)
+RTGCPTR32 patmGuestGCPtrToPatchGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t*) pInstrGC)
 {
     if (pPatch->Guest2PatchAddrTree)
@@ -5664 +5664 @@
  *
  */
-RTGCPTR patmGuestGCPtrToClosestPatchGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t*) pInstrGC)
+RTGCPTR32 patmGuestGCPtrToClosestPatchGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t*) pInstrGC)
 {
         PRECGUESTTOPATCH pGuestToPatchRec = (PRECGUESTTOPATCH)RTAvlGCPtrGetBestFit(&pPatch->Guest2PatchAddrTree, pInstrGC, false);
@@ -5680 +5680 @@
  *
  */
-PATMR3DECL(RTGCPTR) PATMR3GuestGCPtrToPatchGCPtr(PVM pVM, RCPTRTYPE(uint8_t*) pInstrGC)
+PATMR3DECL(RTGCPTR32) PATMR3GuestGCPtrToPatchGCPtr(PVM pVM, RCPTRTYPE(uint8_t*) pInstrGC)
 {
     PPATMPATCHREC pPatchRec = (PPATMPATCHREC)RTAvloGCPtrGetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC, false);
@@ -5699 +5699 @@
  *
  */
-PATMR3DECL(RTGCPTR) PATMR3PatchToGCPtr(PVM pVM, RTGCPTR pPatchGC, PATMTRANSSTATE *pEnmState)
+PATMR3DECL(RTGCPTR32) PATMR3PatchToGCPtr(PVM pVM, RTGCPTR32 pPatchGC, PATMTRANSSTATE *pEnmState)
 {
     PPATMPATCHREC pPatchRec;
     void         *pvPatchCoreOffset;
-    RTGCPTR       pPrivInstrGC;
+    RTGCPTR32       pPrivInstrGC;
 
     Assert(PATMIsPatchGCAddr(pVM, pPatchGC));
@@ -5765 +5765 @@
  * @param   pAddrGC     Guest context address
  */
-PATMR3DECL(RTGCPTR) PATMR3QueryPatchGCPtr(PVM pVM, RTGCPTR pAddrGC)
+PATMR3DECL(RTGCPTR32) PATMR3QueryPatchGCPtr(PVM pVM, RTGCPTR32 pAddrGC)
 {
     PPATMPATCHREC pPatchRec;
@@ -5788 +5788 @@
  * @param   pEip        GC pointer of trapping instruction
  */
-static int patmR3HandleDirtyInstr(PVM pVM, PCPUMCTX pCtx, PPATMPATCHREC pPatch, PRECPATCHTOGUEST pPatchToGuestRec, RTGCPTR pEip)
+static int patmR3HandleDirtyInstr(PVM pVM, PCPUMCTX pCtx, PPATMPATCHREC pPatch, PRECPATCHTOGUEST pPatchToGuestRec, RTGCPTR32 pEip)
 {
     DISCPUSTATE  CpuOld, CpuNew;
     uint8_t     *pPatchInstrHC, *pCurPatchInstrHC;
     int          rc;
-    RTGCPTR      pCurInstrGC, pCurPatchInstrGC;
+    RTGCPTR32      pCurInstrGC, pCurPatchInstrGC;
     uint32_t     cbDirty;
     PRECPATCHTOGUEST pRec;
@@ -5867 +5867 @@
                )
             {
-                RTGCPTR pTargetGC = PATMResolveBranch(&CpuNew, pCurInstrGC);
+                RTGCPTR32 pTargetGC = PATMResolveBranch(&CpuNew, pCurInstrGC);
 
                 if (    pTargetGC >= pPatchToGuestRec->pOrgInstrGC
@@ -5956 +5956 @@
  * @param   ppNewEip    GC pointer to new instruction
  */
-PATMR3DECL(int) PATMR3HandleTrap(PVM pVM, PCPUMCTX pCtx, RTGCPTR pEip, RTGCPTR *ppNewEip)
+PATMR3DECL(int) PATMR3HandleTrap(PVM pVM, PCPUMCTX pCtx, RTGCPTR32 pEip, RTGCPTR *ppNewEip)
 {
     PPATMPATCHREC    pPatch = 0;
     void            *pvPatchCoreOffset;
-    RTGCUINTPTR      offset;
-    RTGCPTR          pNewEip;
+    RTGCUINTPTR32      offset;
+    RTGCPTR32          pNewEip;
     int              rc ;
     PRECPATCHTOGUEST pPatchToGuestRec = 0;
@@ -6000 +6000 @@
         if (pPatch->patch.uState == PATCH_DISABLE_PENDING)
         {
-            RTGCPTR pPrivInstrGC = pPatch->patch.pPrivInstrGC;
+            RTGCPTR32 pPrivInstrGC = pPatch->patch.pPrivInstrGC;
 
             Log(("PATMR3HandleTrap: disable operation is pending for patch at %VGv\n", pPatch->patch.pPrivInstrGC));
@@ -6134 +6134 @@
         if (disret && cpu.pCurInstr->opcode == OP_RETN)
         {
-            RTGCPTR retaddr;
+            RTGCPTR32 retaddr;
             PCPUMCTX pCtx;
             int      rc;
@@ -6145 +6145 @@
 
             Log(("Return failed at %VGv (%VGv)\n", pEip, pNewEip));
-            Log(("Expected return address %VGv found address %VGv Psp=%x\n", pVM->patm.s.pGCStackHC[(pVM->patm.s.pGCStateHC->Psp+PATM_STACK_SIZE)/sizeof(RTGCPTR)], retaddr, pVM->patm.s.pGCStateHC->Psp));
+            Log(("Expected return address %VGv found address %VGv Psp=%x\n", pVM->patm.s.pGCStackHC[(pVM->patm.s.pGCStateHC->Psp+PATM_STACK_SIZE)/sizeof(RTGCPTR32)], retaddr, pVM->patm.s.pGCStateHC->Psp));
         }
     }
@@ -6217 +6217 @@
 PATMR3DECL(int) PATMR3HandleMonitoredPage(PVM pVM)
 {
-    RTGCPTR addr = pVM->patm.s.pvFaultMonitor;
+    RTGCPTR32 addr = pVM->patm.s.pvFaultMonitor;
 
     addr &= PAGE_BASE_GC_MASK;
@@ -6359 +6359 @@
  * @param   pPatch      Patch structure
  */
-RTGCPTR patmPatchQueryStatAddress(PVM pVM, PPATCHINFO pPatch)
+RTGCPTR32 patmPatchQueryStatAddress(PVM pVM, PPATCHINFO pPatch)
 {
     Assert(pPatch->uPatchIdx != PATM_STAT_INDEX_NONE);

trunk/src/VBox/VMM/PATM/PATMA.h

@@ -133 +133 @@
     struct
     {
-        RTGCPTR      pInstrGC;
-        RTGCUINTPTR  pRelPatchGC; /* relative to patch base */
+        RTGCPTR32      pInstrGC;
+        RTGCUINTPTR32  pRelPatchGC; /* relative to patch base */
     } Slot[1];
 } PATCHJUMPTABLE, *PPATCHJUMPTABLE;

trunk/src/VBox/VMM/PATM/PATMGuest.cpp

@@ -97 +97 @@
  *
  */
-int PATMPatchSysenterXP(PVM pVM, RTGCPTR pInstrGC, PPATMPATCHREC pPatchRec)
+int PATMPatchSysenterXP(PVM pVM, RTGCPTR32 pInstrGC, PPATMPATCHREC pPatchRec)
 {
     PPATCHINFO pPatch = &pPatchRec->patch;
     uint8_t   uTemp[16];
-    RTGCPTR   lpfnKiFastSystemCall, lpfnKiIntSystemCall = 0; /* (initializing it to shut up warning.) */
+    RTGCPTR32   lpfnKiFastSystemCall, lpfnKiIntSystemCall = 0; /* (initializing it to shut up warning.) */
     int       rc, i;
 
@@ -151 +151 @@
     /* Now we simply jump from the fast version to the 'old and slow' system call */
     uTemp[0] = 0xE9;
-    *(RTGCPTR *)&uTemp[1] = lpfnKiIntSystemCall - (pInstrGC + SIZEOF_NEARJUMP32);
+    *(RTGCPTR32 *)&uTemp[1] = lpfnKiIntSystemCall - (pInstrGC + SIZEOF_NEARJUMP32);
     rc = PGMPhysWriteGCPtrDirty(pVM, pInstrGC, uTemp, SIZEOF_NEARJUMP32);
     if (VBOX_FAILURE(rc))
@@ -180 +180 @@
  *
  */
-int PATMPatchOpenBSDHandlerPrefix(PVM pVM, PDISCPUSTATE pCpu, RTGCPTR pInstrGC, uint8_t *pInstrHC, PPATMPATCHREC pPatchRec)
+int PATMPatchOpenBSDHandlerPrefix(PVM pVM, PDISCPUSTATE pCpu, RTGCPTR32 pInstrGC, uint8_t *pInstrHC, PPATMPATCHREC pPatchRec)
 {
     uint8_t   uTemp[16];
@@ -213 +213 @@
  *
  */
-int PATMInstallGuestSpecificPatch(PVM pVM, PDISCPUSTATE pCpu, RTGCPTR pInstrGC, uint8_t *pInstrHC, PPATMPATCHREC pPatchRec)
+int PATMInstallGuestSpecificPatch(PVM pVM, PDISCPUSTATE pCpu, RTGCPTR32 pInstrGC, uint8_t *pInstrHC, PPATMPATCHREC pPatchRec)
 {
     int rc;

trunk/src/VBox/VMM/PATM/PATMInternal.h

@@ -236 +236 @@
     RTGCPTR32       pPatchJumpDestGC;
 
-    RTGCUINTPTR     pPatchBlockOffset;
+    RTGCUINTPTR32   pPatchBlockOffset;
     uint32_t        cbPatchBlockSize;
     uint32_t        uCurPatchOffset;
@@ -293 +293 @@
 } PATCHINFO, *PPATCHINFO;
 
-#define PATCHCODE_PTR_GC(pPatch)    (RTGCPTR)  (pVM->patm.s.pPatchMemGC + (pPatch)->pPatchBlockOffset)
+#define PATCHCODE_PTR_GC(pPatch)    (RTGCPTR32)  (pVM->patm.s.pPatchMemGC + (pPatch)->pPatchBlockOffset)
 #define PATCHCODE_PTR_HC(pPatch)    (uint8_t *)(pVM->patm.s.pPatchMemHC + (pPatch)->pPatchBlockOffset)
 
@@ -529 +529 @@
 
 #ifdef IN_RING3
-RTGCPTR patmPatchGCPtr2GuestGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pPatchGC);
-RTGCPTR patmGuestGCPtrToPatchGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t*) pInstrGC);
-RTGCPTR patmGuestGCPtrToClosestPatchGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t*) pInstrGC);
+RTGCPTR32 patmPatchGCPtr2GuestGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pPatchGC);
+RTGCPTR32 patmGuestGCPtrToPatchGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t*) pInstrGC);
+RTGCPTR32 patmGuestGCPtrToClosestPatchGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t*) pInstrGC);
 #endif
 
@@ -544 +544 @@
  *
  */
-void patmr3AddP2GLookupRecord(PVM pVM, PPATCHINFO pPatch, uint8_t *pPatchInstrHC, RTGCPTR pInstrGC, PATM_LOOKUP_TYPE enmType, bool fDirty=false);
+void patmr3AddP2GLookupRecord(PVM pVM, PPATCHINFO pPatch, uint8_t *pPatchInstrHC, RTGCPTR32 pInstrGC, PATM_LOOKUP_TYPE enmType, bool fDirty=false);
 
 /**
@@ -571 +571 @@
  * @param   pPatch      Patch structure
  */
-RTGCPTR patmPatchQueryStatAddress(PVM pVM, PPATCHINFO pPatch);
+RTGCPTR32 patmPatchQueryStatAddress(PVM pVM, PPATCHINFO pPatch);
 
 /**
@@ -607 +607 @@
  *
  */
-int PATMInstallGuestSpecificPatch(PVM pVM, PDISCPUSTATE pCpu, RTGCPTR pInstrGC, uint8_t *pInstrHC, PPATMPATCHREC pPatchRec);
+int PATMInstallGuestSpecificPatch(PVM pVM, PDISCPUSTATE pCpu, RTGCPTR32 pInstrGC, uint8_t *pInstrHC, PPATMPATCHREC pPatchRec);
 
 /**
@@ -631 +631 @@
  *
  */
-PATMDECL(PPATMPATCHREC) PATMQueryFunctionPatch(PVM pVM, RTGCPTR pInstrGC);
+PATMDECL(PPATMPATCHREC) PATMQueryFunctionPatch(PVM pVM, RTGCPTR32 pInstrGC);
 
 
@@ -690 +690 @@
     PPATCHINFO    pPatchInfo;
     R3PTRTYPE(uint8_t *) pInstrHC;
-    RTGCPTR       pInstrGC;
+    RTGCPTR32       pInstrGC;
     uint32_t      fReadFlags;
 } PATMDISASM, *PPATMDISASM;
 
-inline bool PATMR3DISInstr(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR InstrGC,
+inline bool PATMR3DISInstr(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR32 InstrGC,
                            uint8_t *InstrHC, uint32_t *pOpsize, char *pszOutput,
                            uint32_t fReadFlags = PATMREAD_ORGCODE)
@@ -734 +734 @@
  *
  */
-PPATCHINFO PATMFindActivePatchByEntrypoint(PVM pVM, RTGCPTR pInstrGC, bool fIncludeHints=false);
+PPATCHINFO PATMFindActivePatchByEntrypoint(PVM pVM, RTGCPTR32 pInstrGC, bool fIncludeHints=false);
 
 /**
@@ -750 +750 @@
  *
  */
-PATMR3DECL(int) PATMR3PatchBlock(PVM pVM, RTGCPTR pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC,
+PATMR3DECL(int) PATMR3PatchBlock(PVM pVM, RTGCPTR32 pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC,
                                  uint32_t uOpcode, uint32_t uOpSize, PPATMPATCHREC pPatchRec);
 
@@ -767 +767 @@
  *
  */
-PATMR3DECL(int) PATMR3PatchInstrInt3(PVM pVM, RTGCPTR pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, DISCPUSTATE *pCpu, PPATCHINFO pPatch);
+PATMR3DECL(int) PATMR3PatchInstrInt3(PVM pVM, RTGCPTR32 pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, DISCPUSTATE *pCpu, PPATCHINFO pPatch);
 
 /**
@@ -788 +788 @@
  * @param   pBranchInstrGC  GC pointer of branch instruction
  */
-inline RTGCPTR PATMResolveBranch(PDISCPUSTATE pCpu, RTGCPTR pBranchInstrGC)
+inline RTGCPTR32 PATMResolveBranch(PDISCPUSTATE pCpu, RTGCPTR32 pBranchInstrGC)
 {
     uint32_t disp;
@@ -811 +811 @@
     }
 #ifdef IN_GC
-    return (RTGCPTR)((uint8_t *)pBranchInstrGC + pCpu->opsize + disp);
+    return (RTGCPTR32)((uint8_t *)pBranchInstrGC + pCpu->opsize + disp);
 #else
     return pBranchInstrGC + pCpu->opsize + disp;

trunk/src/VBox/VMM/PATM/PATMPatch.cpp

@@ -59 +59 @@
 typedef struct
 {
-    RTGCPTR     pTargetGC;
-    RTGCPTR     pCurInstrGC;
-    RTGCPTR     pNextInstrGC;
-    RTGCPTR     pReturnGC;
+    RTGCPTR32   pTargetGC;
+    RTGCPTR32   pCurInstrGC;
+    RTGCPTR32   pNextInstrGC;
+    RTGCPTR32   pReturnGC;
 } PATMCALLINFO, *PPATMCALLINFO;
 
-int patmPatchAddReloc32(PVM pVM, PPATCHINFO pPatch, uint8_t *pRelocHC, uint32_t uType, RTGCPTR pSource, RTGCPTR pDest)
+int patmPatchAddReloc32(PVM pVM, PPATCHINFO pPatch, uint8_t *pRelocHC, uint32_t uType, RTGCPTR32 pSource, RTGCPTR32 pDest)
 {
     PRELOCREC pRec;
@@ -88 +88 @@
 }
 
-int patmPatchAddJump(PVM pVM, PPATCHINFO pPatch, uint8_t *pJumpHC, uint32_t offset, RTGCPTR pTargetGC, uint32_t opcode)
+int patmPatchAddJump(PVM pVM, PPATCHINFO pPatch, uint8_t *pJumpHC, uint32_t offset, RTGCPTR32 pTargetGC, uint32_t opcode)
 {
     PJUMPREC pRec;
@@ -168 +168 @@
                 case PATM_FIXUP:
                     /* Offset in uReloc[i+1] is from the base of the function. */
-                    dest = (RTGCUINTPTR)pVM->patm.s.pPatchMemGC + pAsmRecord->uReloc[i+1] + (RTGCUINTPTR)(pPB - pVM->patm.s.pPatchMemHC);
+                    dest = (RTGCUINTPTR32)pVM->patm.s.pPatchMemGC + pAsmRecord->uReloc[i+1] + (RTGCUINTPTR32)(pPB - pVM->patm.s.pPatchMemHC);
                     break;
 #ifdef VBOX_WITH_STATISTICS
@@ -306 +306 @@
                 case PATM_LOOKUP_AND_CALL_FUNCTION:
                 {
-                    RTGCPTR pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR)(&pPB[j] + sizeof(RTGCPTR) - pVM->patm.s.pPatchMemHC);
+                    RTGCPTR32 pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR32)(&pPB[j] + sizeof(RTGCPTR32) - pVM->patm.s.pPatchMemHC);
                     Assert(pVM->patm.s.pfnHelperCallGC);
-                    Assert(sizeof(uint32_t) == sizeof(RTGCPTR));
+                    Assert(sizeof(uint32_t) == sizeof(RTGCPTR32));
 
                     /* Relative value is target minus address of instruction after the actual call instruction. */
@@ -317 +317 @@
                 case PATM_RETURN_FUNCTION:
                 {
-                    RTGCPTR pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR)(&pPB[j] + sizeof(RTGCPTR) - pVM->patm.s.pPatchMemHC);
+                    RTGCPTR32 pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR32)(&pPB[j] + sizeof(RTGCPTR32) - pVM->patm.s.pPatchMemHC);
                     Assert(pVM->patm.s.pfnHelperRetGC);
-                    Assert(sizeof(uint32_t) == sizeof(RTGCPTR));
+                    Assert(sizeof(uint32_t) == sizeof(RTGCPTR32));
 
                     /* Relative value is target minus address of instruction after the actual call instruction. */
@@ -328 +328 @@
                 case PATM_IRET_FUNCTION:
                 {
-                    RTGCPTR pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR)(&pPB[j] + sizeof(RTGCPTR) - pVM->patm.s.pPatchMemHC);
+                    RTGCPTR32 pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR32)(&pPB[j] + sizeof(RTGCPTR32) - pVM->patm.s.pPatchMemHC);
                     Assert(pVM->patm.s.pfnHelperIretGC);
-                    Assert(sizeof(uint32_t) == sizeof(RTGCPTR));
+                    Assert(sizeof(uint32_t) == sizeof(RTGCPTR32));
 
                     /* Relative value is target minus address of instruction after the actual call instruction. */
@@ -339 +339 @@
                 case PATM_LOOKUP_AND_JUMP_FUNCTION:
                 {
-                    RTGCPTR pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR)(&pPB[j] + sizeof(RTGCPTR) - pVM->patm.s.pPatchMemHC);
+                    RTGCPTR32 pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR32)(&pPB[j] + sizeof(RTGCPTR32) - pVM->patm.s.pPatchMemHC);
                     Assert(pVM->patm.s.pfnHelperJumpGC);
-                    Assert(sizeof(uint32_t) == sizeof(RTGCPTR));
+                    Assert(sizeof(uint32_t) == sizeof(RTGCPTR32));
 
                     /* Relative value is target minus address of instruction after the actual call instruction. */
@@ -354 +354 @@
                 }
 
-                *(RTGCPTR *)&pPB[j] = dest;
+                *(RTGCPTR32 *)&pPB[j] = dest;
                 if (pAsmRecord->uReloc[i] < PATM_NO_FIXUP)
                 {
@@ -393 +393 @@
 
 /* Read bytes and check for overwritten instructions. */
-static int patmPatchReadBytes(PVM pVM, uint8_t *pDest, RTGCPTR pSrc, uint32_t cb)
+static int patmPatchReadBytes(PVM pVM, uint8_t *pDest, RTGCPTR32 pSrc, uint32_t cb)
 {
     int rc = PGMPhysReadGCPtr(pVM, pDest, pSrc, cb);
@@ -426 +426 @@
 }
 
-int patmPatchGenIret(PVM pVM, PPATCHINFO pPatch, RTGCPTR pCurInstrGC, bool fSizeOverride)
+int patmPatchGenIret(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pCurInstrGC, bool fSizeOverride)
 {
     uint32_t size;
@@ -457 +457 @@
  * Generate an STI patch
  */
-int patmPatchGenSti(PVM pVM, PPATCHINFO pPatch, RTGCPTR pCurInstrGC, RTGCPTR pNextInstrGC)
+int patmPatchGenSti(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pCurInstrGC, RTGCPTR32 pNextInstrGC)
 {
     PATMCALLINFO callInfo;
@@ -564 +564 @@
     }
 
-    *(RTGCPTR *)&pPB[pPatchAsmRec->offRelJump] = 0xDEADBEEF;
+    *(RTGCPTR32 *)&pPB[pPatchAsmRec->offRelJump] = 0xDEADBEEF;
 
     patmPatchAddJump(pVM, pPatch, &pPB[pPatchAsmRec->offRelJump - 1], 1, pTargetGC, opcode);
@@ -657 +657 @@
     else offset++;
 
-    *(RTGCPTR *)&pPB[offset] = 0xDEADBEEF;
+    *(RTGCPTR32 *)&pPB[offset] = 0xDEADBEEF;
 
     patmPatchAddJump(pVM, pPatch, pPB, offset, pTargetGC, opcode);
 
-    offset += sizeof(RTGCPTR);
+    offset += sizeof(RTGCPTR32);
 
     PATCHGEN_EPILOG(pPatch, offset);
@@ -670 +670 @@
  * Rewrite call to dynamic or currently unknown function (on-demand patching of function)
  */
-int patmPatchGenCall(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR pCurInstrGC, RTGCPTR pTargetGC, bool fIndirect)
+int patmPatchGenCall(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR32 pCurInstrGC, RTGCPTR32 pTargetGC, bool fIndirect)
 {
     PATMCALLINFO        callInfo;
@@ -710 +710 @@
             i++;    //skip segment prefix
 
-        rc = patmPatchReadBytes(pVM, &pPB[offset], (RTGCPTR)((RTGCUINTPTR)pCurInstrGC + i), pCpu->opsize - i);
+        rc = patmPatchReadBytes(pVM, &pPB[offset], (RTGCPTR32)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i);
         AssertRCReturn(rc, rc);
         offset += (pCpu->opsize - i);
@@ -730 +730 @@
         offset = 0;
         pPB[offset++] = 0x68;              // push %Iv
-        *(RTGCPTR *)&pPB[offset] = pTargetGC;
-        offset += sizeof(RTGCPTR);
+        *(RTGCPTR32 *)&pPB[offset] = pTargetGC;
+        offset += sizeof(RTGCPTR32);
     }
 
@@ -771 +771 @@
  * @param   pCurInstrGC Current instruction address
  */
-int patmPatchGenJump(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR pCurInstrGC)
+int patmPatchGenJump(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR32 pCurInstrGC)
 {
     PATMCALLINFO        callInfo;
@@ -807 +807 @@
         i++;    //skip segment prefix
 
-    rc = patmPatchReadBytes(pVM, &pPB[offset], (RTGCPTR)((RTGCUINTPTR)pCurInstrGC + i), pCpu->opsize - i);
+    rc = patmPatchReadBytes(pVM, &pPB[offset], (RTGCPTR32)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i);
     AssertRCReturn(rc, rc);
     offset += (pCpu->opsize - i);
@@ -846 +846 @@
 {
     int size = 0, rc;
-    RTGCPTR pPatchRetInstrGC;
+    RTGCPTR32 pPatchRetInstrGC;
 
     /* Remember start of this patch for below. */
@@ -970 +970 @@
  *
  */
-int patmPatchGenCheckIF(PVM pVM, PPATCHINFO pPatch, RTGCPTR pCurInstrGC)
+int patmPatchGenCheckIF(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pCurInstrGC)
 {
     uint32_t size;
@@ -995 +995 @@
  *
  */
-int patmPatchGenSetPIF(PVM pVM, PPATCHINFO pPatch, RTGCPTR pInstrGC)
+int patmPatchGenSetPIF(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pInstrGC)
 {
     PATCHGEN_PROLOG(pVM, pPatch);
@@ -1016 +1016 @@
  *
  */
-int patmPatchGenClearPIF(PVM pVM, PPATCHINFO pPatch, RTGCPTR pInstrGC)
+int patmPatchGenClearPIF(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pInstrGC)
 {
     PATCHGEN_PROLOG(pVM, pPatch);
@@ -1037 +1037 @@
  * @param   pNextInstrGC    Next guest instruction
  */
-int patmPatchGenClearInhibitIRQ(PVM pVM, PPATCHINFO pPatch, RTGCPTR pNextInstrGC)
+int patmPatchGenClearInhibitIRQ(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pNextInstrGC)
 {
     int          size;
@@ -1070 +1070 @@
  ** @todo must check if virtual IF is already cleared on entry!!!!!!!!!!!!!!!!!!!!!!!
  */
-int patmPatchGenIntEntry(PVM pVM, PPATCHINFO pPatch, RTGCPTR pIntHandlerGC)
+int patmPatchGenIntEntry(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pIntHandlerGC)
 {
     uint32_t size;
@@ -1102 +1102 @@
  * @param   pTrapHandlerGC  IDT handler address
  */
-int patmPatchGenTrapEntry(PVM pVM, PPATCHINFO pPatch, RTGCPTR pTrapHandlerGC)
+int patmPatchGenTrapEntry(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pTrapHandlerGC)
 {
     uint32_t size;
@@ -1121 +1121 @@
 
 #ifdef VBOX_WITH_STATISTICS
-int patmPatchGenStats(PVM pVM, PPATCHINFO pPatch, RTGCPTR pInstrGC)
+int patmPatchGenStats(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pInstrGC)
 {
     uint32_t size;
@@ -1213 +1213 @@
         break;
     }
-    *(RTGCPTR *)&pPB[2] = pVM->patm.s.pCPUMCtxGC + offset;
+    *(RTGCPTR32 *)&pPB[2] = pVM->patm.s.pCPUMCtxGC + offset;
     patmPatchAddReloc32(pVM, pPatch, &pPB[2], FIXUP_ABSOLUTE);
 
-    PATCHGEN_EPILOG(pPatch, 2 + sizeof(RTGCPTR));
+    PATCHGEN_EPILOG(pPatch, 2 + sizeof(RTGCPTR32));
     return rc;
 }
@@ -1279 +1279 @@
         break;
     }
-    *(RTGCPTR *)&pPB[2] = pVM->patm.s.pCPUMCtxGC + offset;
+    *(RTGCPTR32 *)&pPB[2] = pVM->patm.s.pCPUMCtxGC + offset;
     patmPatchAddReloc32(pVM, pPatch, &pPB[2], FIXUP_ABSOLUTE);
 
-    PATCHGEN_EPILOG(pPatch, 2 + sizeof(RTGCPTR));
+    PATCHGEN_EPILOG(pPatch, 2 + sizeof(RTGCPTR32));
     return rc;
 }
@@ -1289 +1289 @@
  * mov GPR, SS
  */
-int patmPatchGenMovFromSS(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR pCurInstrGC)
+int patmPatchGenMovFromSS(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR32 pCurInstrGC)
 {
     uint32_t size, offset;
@@ -1340 +1340 @@
  * @param   pCurInstrGC Guest instruction address
  */
-int patmPatchGenSldtStr(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR pCurInstrGC)
+int patmPatchGenSldtStr(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR32 pCurInstrGC)
 {
     // sldt %Ew
@@ -1365 +1365 @@
         if (pCpu->pCurInstr->opcode == OP_STR)
         {
-            *(RTGCPTR *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, tr);
+            *(RTGCPTR32 *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, tr);
         }
         else
         {
-            *(RTGCPTR *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, ldtr);
+            *(RTGCPTR32 *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, ldtr);
         }
         patmPatchAddReloc32(pVM, pPatch, &pPB[offset], FIXUP_ABSOLUTE);
-        offset += sizeof(RTGCPTR);
+        offset += sizeof(RTGCPTR32);
     }
     else
@@ -1402 +1402 @@
             i++;    //skip segment prefix
 
-        rc = patmPatchReadBytes(pVM, &pPB[offset], (RTGCPTR)((RTGCUINTPTR)pCurInstrGC + i), pCpu->opsize - i);
+        rc = patmPatchReadBytes(pVM, &pPB[offset], (RTGCPTR32)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i);
         AssertRCReturn(rc, rc);
         offset += (pCpu->opsize - i);
@@ -1410 +1410 @@
         if (pCpu->pCurInstr->opcode == OP_STR)
         {
-            *(RTGCPTR *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, tr);
+            *(RTGCPTR32 *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, tr);
         }
         else
         {
-            *(RTGCPTR *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, ldtr);
+            *(RTGCPTR32 *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, ldtr);
         }
         patmPatchAddReloc32(pVM, pPatch, &pPB[offset], FIXUP_ABSOLUTE);
-        offset += sizeof(RTGCPTR);
+        offset += sizeof(RTGCPTR32);
 
         pPB[offset++] = 0x66;              // mov       word ptr [edx],ax
@@ -1441 +1441 @@
  * @param   pCurInstrGC Guest instruction address
  */
-int patmPatchGenSxDT(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR pCurInstrGC)
+int patmPatchGenSxDT(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR32 pCurInstrGC)
 {
     int rc = VINF_SUCCESS;
@@ -1496 +1496 @@
     if (pCpu->prefix == PREFIX_SEG)
         i++;    //skip segment prefix
-    rc = patmPatchReadBytes(pVM, &pPB[offset], (RTGCPTR)((RTGCUINTPTR)pCurInstrGC + i), pCpu->opsize - i);
+    rc = patmPatchReadBytes(pVM, &pPB[offset], (RTGCPTR32)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i);
     AssertRCReturn(rc, rc);
     offset += (pCpu->opsize - i);
@@ -1502 +1502 @@
     pPB[offset++] = 0x66;              // mov       ax, CPUMCTX.gdtr.limit
     pPB[offset++] = 0xA1;
-    *(RTGCPTR *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + offset_limit;
+    *(RTGCPTR32 *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + offset_limit;
     patmPatchAddReloc32(pVM, pPatch, &pPB[offset], FIXUP_ABSOLUTE);
-    offset += sizeof(RTGCPTR);
+    offset += sizeof(RTGCPTR32);
 
     pPB[offset++] = 0x66;              // mov       word ptr [edx],ax
@@ -1511 +1511 @@
 
     pPB[offset++] = 0xA1;              // mov       eax, CPUMCTX.gdtr.base
-    *(RTGCPTR *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + offset_base;
+    *(RTGCPTR32 *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + offset_base;
     patmPatchAddReloc32(pVM, pPatch, &pPB[offset], FIXUP_ABSOLUTE);
-    offset += sizeof(RTGCPTR);
+    offset += sizeof(RTGCPTR32);
 
     pPB[offset++] = 0x89;              // mov       dword ptr [edx+2],eax
@@ -1535 +1535 @@
  * @param   pCurInstrGC Guest instruction address
  */
-int patmPatchGenCpuid(PVM pVM, PPATCHINFO pPatch, RTGCPTR pCurInstrGC)
+int patmPatchGenCpuid(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pCurInstrGC)
 {
     uint32_t size;
@@ -1583 +1583 @@
  * Relative jump from patch code to patch code (no fixup required)
  */
-int patmPatchGenPatchJump(PVM pVM, PPATCHINFO pPatch, RTGCPTR pCurInstrGC, RCPTRTYPE(uint8_t *) pPatchAddrGC, bool fAddLookupRecord)
+int patmPatchGenPatchJump(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pCurInstrGC, RCPTRTYPE(uint8_t *) pPatchAddrGC, bool fAddLookupRecord)
 {
     int32_t displ;

trunk/src/VBox/VMM/PATM/PATMPatch.h

@@ -22 +22 @@
 #define ___PATMPATCH_H
 
-int patmPatchAddReloc32(PVM pVM, PPATCHINFO pPatch, uint8_t *pRelocHC, uint32_t uType, RTGCPTR pSource = 0, RTGCPTR pDest = 0);
-int patmPatchAddJump(PVM pVM, PPATCHINFO pPatch, uint8_t *pJumpHC, uint32_t offset, RTGCPTR pTargetGC, uint32_t opcode);
+int patmPatchAddReloc32(PVM pVM, PPATCHINFO pPatch, uint8_t *pRelocHC, uint32_t uType, RTGCPTR32 pSource = 0, RTGCPTR32 pDest = 0);
+int patmPatchAddJump(PVM pVM, PPATCHINFO pPatch, uint8_t *pJumpHC, uint32_t offset, RTGCPTR32 pTargetGC, uint32_t opcode);
 
-int patmPatchGenCpuid(PVM pVM, PPATCHINFO pPatch, RTGCPTR pCurInstrGC);
-int patmPatchGenSxDT(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR pCurInstrGC);
-int patmPatchGenSldtStr(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR pCurInstrGC);
+int patmPatchGenCpuid(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pCurInstrGC);
+int patmPatchGenSxDT(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR32 pCurInstrGC);
+int patmPatchGenSldtStr(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR32 pCurInstrGC);
 int patmPatchGenMovControl(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu);
 int patmPatchGenMovDebug(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu);
-int patmPatchGenMovFromSS(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR pCurInstrGC);
+int patmPatchGenMovFromSS(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR32 pCurInstrGC);
 int patmPatchGenRelJump(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pTargetGC, uint32_t opcode, bool fSizeOverride);
 int patmPatchGenLoop(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pTargetGC, uint32_t opcode, bool fSizeOverride);
 int patmPatchGenPushf(PVM pVM, PPATCHINFO pPatch, bool fSizeOverride);
 int patmPatchGenPopf(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pReturnAddrGC, bool fSizeOverride, bool fGenJumpBack);
-int patmPatchGenSti(PVM pVM, PPATCHINFO pPatch, RTGCPTR pCurInstrGC, RTGCPTR pNextInstrGC);
+int patmPatchGenSti(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pCurInstrGC, RTGCPTR32 pNextInstrGC);
 
 int patmPatchGenCli(PVM pVM, PPATCHINFO pPatch);
-int patmPatchGenIret(PVM pVM, PPATCHINFO pPatch, RTGCPTR pCurInstrGC, bool fSizeOverride);
+int patmPatchGenIret(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pCurInstrGC, bool fSizeOverride);
 int patmPatchGenDuplicate(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RCPTRTYPE(uint8_t *) pCurInstrGC);
 int patmPatchGenPushCS(PVM pVM, PPATCHINFO pPatch);
 
-int patmPatchGenStats(PVM pVM, PPATCHINFO pPatch, RTGCPTR pInstrGC);
+int patmPatchGenStats(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pInstrGC);
 
-int patmPatchGenCall(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR pInstrGC, RTGCPTR pTargetGC, bool fIndirect);
+int patmPatchGenCall(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR32 pInstrGC, RTGCPTR32 pTargetGC, bool fIndirect);
 int patmPatchGenRet(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RCPTRTYPE(uint8_t *) pCurInstrGC);
 
-int patmPatchGenPatchJump(PVM pVM, PPATCHINFO pPatch, RTGCPTR pCurInstrGC, RCPTRTYPE(uint8_t *) pPatchAddrGC, bool fAddLookupRecord = true);
+int patmPatchGenPatchJump(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pCurInstrGC, RCPTRTYPE(uint8_t *) pPatchAddrGC, bool fAddLookupRecord = true);
 
 /**
@@ -58 +58 @@
  * @param   pCurInstrGC Current instruction address
  */
-int patmPatchGenJump(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR pCurInstrGC);
+int patmPatchGenJump(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTGCPTR32 pCurInstrGC);
 
 /**
@@ -68 +68 @@
  * @param   pTrapHandlerGC  IDT handler address
  */
-int patmPatchGenTrapEntry(PVM pVM, PPATCHINFO pPatch, RTGCPTR pTrapHandlerGC);
+int patmPatchGenTrapEntry(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pTrapHandlerGC);
 
 /**
@@ -78 +78 @@
  * @param   pIntHandlerGC IDT handler address
  */
-int patmPatchGenIntEntry(PVM pVM, PPATCHINFO pPatch, RTGCPTR pIntHandlerGC);
+int patmPatchGenIntEntry(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pIntHandlerGC);
 
 /**
@@ -110 +110 @@
  *
  */
-int patmPatchGenSetPIF(PVM pVM, PPATCHINFO pPatch, RTGCPTR pInstrGC);
+int patmPatchGenSetPIF(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pInstrGC);
 
 /**
@@ -121 +121 @@
  *
  */
-int patmPatchGenClearPIF(PVM pVM, PPATCHINFO pPatch, RTGCPTR pInstrGC);
+int patmPatchGenClearPIF(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pInstrGC);
 
 /**
@@ -131 +131 @@
  * @param   pNextInstrGC    Next guest instruction
  */
-int patmPatchGenClearInhibitIRQ(PVM pVM, PPATCHINFO pPatch, RTGCPTR pNextInstrGC);
+int patmPatchGenClearInhibitIRQ(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pNextInstrGC);
 
 /**
@@ -142 +142 @@
  *
  */
-int patmPatchGenCheckIF(PVM pVM, PPATCHINFO pPatch, RTGCPTR pCurInstrGC);
+int patmPatchGenCheckIF(PVM pVM, PPATCHINFO pPatch, RTGCPTR32 pCurInstrGC);
 
 /**

trunk/src/VBox/VMM/PATM/VMMAll/CSAMAll.cpp

@@ -53 +53 @@
  * @param   pvFault     Fault address
  */
-CSAMDECL(int) CSAMExecFault(PVM pVM, RTGCPTR pvFault)
+CSAMDECL(int) CSAMExecFault(PVM pVM, RTGCPTR32 pvFault)
 {
     if(!CSAMIsEnabled(pVM))
@@ -80 +80 @@
  * @param   pPage       GC page address
  */
-CSAMDECL(bool) CSAMIsPageScanned(PVM pVM, RTGCPTR pPage)
+CSAMDECL(bool) CSAMIsPageScanned(PVM pVM, RTGCPTR32 pPage)
 {
     int pgdir, bit;
@@ -108 +108 @@
  *
  */
-CSAMDECL(int) CSAMMarkPage(PVM pVM, RTGCPTR pPage, bool fScanned)
+CSAMDECL(int) CSAMMarkPage(PVM pVM, RTGCPTR32 pPage, bool fScanned)
 {
     int pgdir, bit;
@@ -177 +177 @@
  * @param   GCPtr       GC pointer of page
  */
-CSAMDECL(bool) CSAMDoesPageNeedScanning(PVM pVM, RTGCPTR GCPtr)
+CSAMDECL(bool) CSAMDoesPageNeedScanning(PVM pVM, RTGCPTR32 GCPtr)
 {
     if(!CSAMIsEnabled(pVM))
@@ -200 +200 @@
  * @param   GCPtr       GC pointer of page
  */
-CSAMDECL(void) CSAMMarkPossibleCodePage(PVM pVM, RTGCPTR GCPtr)
+CSAMDECL(void) CSAMMarkPossibleCodePage(PVM pVM, RTGCPTR32 GCPtr)
 {
     if (pVM->csam.s.cPossibleCodePages < RT_ELEMENTS(pVM->csam.s.pvPossibleCodePage))
@@ -247 +247 @@
  * @param   GCPtr       GC pointer of page table entry
  */
-CSAMDECL(bool) CSAMIsKnownDangerousInstr(PVM pVM, RTGCPTR GCPtr)
+CSAMDECL(bool) CSAMIsKnownDangerousInstr(PVM pVM, RTGCPTR32 GCPtr)
 {
     for (uint32_t i=0;i<pVM->csam.s.cDangerousInstr;i++)

trunk/src/VBox/VMM/PATM/VMMAll/PATMAll.cpp

@@ -52 +52 @@
 PATMDECL(void) PATMRawEnter(PVM pVM, PCPUMCTXCORE pCtxCore)
 {
-    bool fPatchCode = PATMIsPatchGCAddr(pVM, (RTGCPTR)pCtxCore->eip);
+    bool fPatchCode = PATMIsPatchGCAddr(pVM, (RTGCPTR32)pCtxCore->eip);
 
     /*
@@ -81 +81 @@
        )
     {
-        if (pVM->patm.s.pfnSysEnterGC != (RTGCPTR)pCtx->SysEnter.eip)
+        if (pVM->patm.s.pfnSysEnterGC != (RTGCPTR32)pCtx->SysEnter.eip)
         {
             pVM->patm.s.pfnSysEnterPatchGC = 0;
@@ -94 +94 @@
                 {
                     pVM->patm.s.pfnSysEnterPatchGC  = PATMR3QueryPatchGCPtr(pVM, pCtx->SysEnter.eip);
-                    pVM->patm.s.pfnSysEnterGC       = (RTGCPTR)pCtx->SysEnter.eip;
+                    pVM->patm.s.pfnSysEnterGC       = (RTGCPTR32)pCtx->SysEnter.eip;
                     Assert(pVM->patm.s.pfnSysEnterPatchGC);
                 }
             }
             else
-                pVM->patm.s.pfnSysEnterGC = (RTGCPTR)pCtx->SysEnter.eip;
+                pVM->patm.s.pfnSysEnterGC = (RTGCPTR32)pCtx->SysEnter.eip;
         }
     }
@@ -126 +126 @@
 PATMDECL(void) PATMRawLeave(PVM pVM, PCPUMCTXCORE pCtxCore, int rawRC)
 {
-    bool fPatchCode = PATMIsPatchGCAddr(pVM, (RTGCPTR)pCtxCore->eip);
+    bool fPatchCode = PATMIsPatchGCAddr(pVM, (RTGCPTR32)pCtxCore->eip);
     /*
      * We will only be called if PATMRawEnter was previously called.
@@ -157 +157 @@
             {
                 PATMTRANSSTATE  enmState;
-                RTGCPTR         pOrgInstrGC = PATMR3PatchToGCPtr(pVM, pCtxCore->eip, &enmState);
+                RTGCPTR32         pOrgInstrGC = PATMR3PatchToGCPtr(pVM, pCtxCore->eip, &enmState);
 
                 AssertRelease(pOrgInstrGC);
@@ -191 +191 @@
     if (!fPatchCode)
     {
-        if (CTXSUFF(pVM->patm.s.pGCState)->GCPtrInhibitInterrupts == (RTGCPTR)pCtxCore->eip)
+        if (CTXSUFF(pVM->patm.s.pGCState)->GCPtrInhibitInterrupts == (RTGCPTR32)pCtxCore->eip)
         {
             EMSetInhibitInterruptsPC(pVM, pCtxCore->eip);
@@ -246 +246 @@
  * @param   pAddrGC     Guest context address
  */
-PATMDECL(bool) PATMShouldUseRawMode(PVM pVM, RTGCPTR pAddrGC)
+PATMDECL(bool) PATMShouldUseRawMode(PVM pVM, RTGCPTR32 pAddrGC)
 {
     return (    PATMIsEnabled(pVM)
-            && ((pAddrGC >= (RTGCPTR)pVM->patm.s.pPatchMemGC && pAddrGC < (RTGCPTR)pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem))) ? true : false;
+            && ((pAddrGC >= (RTGCPTR32)pVM->patm.s.pPatchMemGC && pAddrGC < (RTGCPTR32)pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem))) ? true : false;
 }
 
@@ -270 +270 @@
  * @param   pAddrGC     Guest context address
  */
-PATMDECL(bool) PATMIsPatchGCAddr(PVM pVM, RTGCPTR pAddrGC)
+PATMDECL(bool) PATMIsPatchGCAddr(PVM pVM, RTGCPTR32 pAddrGC)
 {
     RTGCPTR32 pAddrGG32 = (RTGCPTR32)pAddrGC;
 
-    return (PATMIsEnabled(pVM) && pAddrGG32 >= (RTGCPTR)pVM->patm.s.pPatchMemGC && pAddrGG32 < (RTGCPTR)pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem) ? true : false;
+    return (PATMIsEnabled(pVM) && pAddrGG32 >= (RTGCPTR32)pVM->patm.s.pPatchMemGC && pAddrGG32 < (RTGCPTR32)pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem) ? true : false;
 }
 
@@ -285 +285 @@
  * @param   pCachedData     GC pointer to cached data
  */
-PATMDECL(int) PATMSetMMIOPatchInfo(PVM pVM, RTGCPHYS GCPhys, RTGCPTR pCachedData)
+PATMDECL(int) PATMSetMMIOPatchInfo(PVM pVM, RTGCPHYS GCPhys, RTGCPTR32 pCachedData)
 {
     pVM->patm.s.mmio.GCPhys = GCPhys;
@@ -325 +325 @@
     if (PATMIsEnabled(pVM))
     {
-        if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pCtxCore->eip))
+        if (PATMIsPatchGCAddr(pVM, (RTGCPTR32)pCtxCore->eip))
             return false;
     }
@@ -339 +339 @@
  *
  */
-PATMDECL(PPATMPATCHREC) PATMQueryFunctionPatch(PVM pVM, RTGCPTR pInstrGC)
+PATMDECL(PPATMPATCHREC) PATMQueryFunctionPatch(PVM pVM, RTGCPTR32 pInstrGC)
 {
     PPATMPATCHREC pRec;
@@ -362 +362 @@
  * @param   pSize       Original instruction size (out, optional)
  */
-PATMDECL(bool) PATMIsInt3Patch(PVM pVM, RTGCPTR pInstrGC, uint32_t *pOpcode, uint32_t *pSize)
+PATMDECL(bool) PATMIsInt3Patch(PVM pVM, RTGCPTR32 pInstrGC, uint32_t *pOpcode, uint32_t *pSize)
 {
     PPATMPATCHREC pRec;
@@ -467 +467 @@
  * @param   pRelBranchPatch     Relative duplicated function address
  */
-PATMDECL(int) PATMAddBranchToLookupCache(PVM pVM, RTGCPTR pJumpTableGC, RTGCPTR pBranchTarget, RTGCUINTPTR pRelBranchPatch)
+PATMDECL(int) PATMAddBranchToLookupCache(PVM pVM, RTGCPTR32 pJumpTableGC, RTGCPTR32 pBranchTarget, RTGCUINTPTR pRelBranchPatch)
 {
     PPATCHJUMPTABLE pJumpTable;

trunk/src/VBox/VMM/PATM/VMMGC/CSAMGC.cpp

@@ -66 +66 @@
 {
     PPATMGCSTATE pPATMGCState;
-    bool         fPatchCode = PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip);
+    bool         fPatchCode = PATMIsPatchGCAddr(pVM, (RTGCPTR32)pRegFrame->eip);
     int          rc;
 
@@ -103 +103 @@
     if (cpl != 3)
     {
-        rc = PATMGCHandleWriteToPatchPage(pVM, pRegFrame, (RTGCPTR)((RTGCUINTPTR)pvRange + offRange), 4 /** @todo */);
+        rc = PATMGCHandleWriteToPatchPage(pVM, pRegFrame, (RTGCPTR32)((RTGCUINTPTR)pvRange + offRange), 4 /** @todo */);
         if (rc == VINF_SUCCESS)
             return rc;

trunk/src/VBox/VMM/PATM/VMMGC/PATMGC.cpp

@@ -63 +63 @@
  *                      (If it's a EIP range this's the EIP, if not it's pvFault.)
  */
-PATMGCDECL(int) PATMGCMonitorPage(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, void *pvRange, uintptr_t offRange)
+PATMGCDECL(int) PATMGCMonitorPage(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange)
 {
     pVM->patm.s.pvFaultMonitor = (RTGCPTR32)pvFault;
@@ -81 +81 @@
  *
  */
-PATMGCDECL(int) PATMGCHandleWriteToPatchPage(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR GCPtr, uint32_t cbWrite)
+PATMGCDECL(int) PATMGCHandleWriteToPatchPage(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR32 GCPtr, uint32_t cbWrite)
 {
     RTGCUINTPTR          pWritePageStart, pWritePageEnd;
@@ -97 +97 @@
     pWritePageEnd   = ((RTGCUINTPTR)GCPtr + cbWrite - 1) & PAGE_BASE_GC_MASK;
 
-    pPatchPage = (PPATMPATCHPAGE)RTAvloGCPtrGet(CTXSUFF(&pVM->patm.s.PatchLookupTree)->PatchTreeByPage, (RTGCPTR)pWritePageStart);
+    pPatchPage = (PPATMPATCHPAGE)RTAvloGCPtrGet(CTXSUFF(&pVM->patm.s.PatchLookupTree)->PatchTreeByPage, (RTGCPTR32)pWritePageStart);
     if (    !pPatchPage
         &&  pWritePageStart != pWritePageEnd
        )
     {
-        pPatchPage = (PPATMPATCHPAGE)RTAvloGCPtrGet(CTXSUFF(&pVM->patm.s.PatchLookupTree)->PatchTreeByPage, (RTGCPTR)pWritePageEnd);
+        pPatchPage = (PPATMPATCHPAGE)RTAvloGCPtrGet(CTXSUFF(&pVM->patm.s.PatchLookupTree)->PatchTreeByPage, (RTGCPTR32)pWritePageEnd);
     }
 
@@ -162 +162 @@
     /* Very important check -> otherwise we have a security leak. */
     AssertReturn(!pRegFrame->eflags.Bits.u1VM && (pRegFrame->ss & X86_SEL_RPL) == 1, VERR_ACCESS_DENIED);
-    Assert(PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip));
+    Assert(PATMIsPatchGCAddr(pVM, (RTGCPTR32)pRegFrame->eip));
 
     /* OP_ILLUD2 in PATM generated code? */
@@ -188 +188 @@
                  *  edi = PATCHJUMPTABLE ptr
                  */
-                AssertMsg(!pRegFrame->edi || PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->edi), ("edx = %VGv\n", pRegFrame->edi));
+                AssertMsg(!pRegFrame->edi || PATMIsPatchGCAddr(pVM, (RTGCPTR32)pRegFrame->edi), ("edx = %VGv\n", pRegFrame->edi));
 
                 Log(("PATMGC: lookup %VGv jump table=%VGv\n", pRegFrame->edx, pRegFrame->edi));
 
-                pRec = PATMQueryFunctionPatch(pVM, (RTGCPTR)(pRegFrame->edx));
+                pRec = PATMQueryFunctionPatch(pVM, (RTGCPTR32)(pRegFrame->edx));
                 if (pRec)
                 {
@@ -198 +198 @@
                     {
                         RTGCUINTPTR pRelAddr = pRec->patch.pPatchBlockOffset;   /* make it relative */
-                        rc = PATMAddBranchToLookupCache(pVM, (RTGCPTR)pRegFrame->edi, (RTGCPTR)pRegFrame->edx, pRelAddr);
+                        rc = PATMAddBranchToLookupCache(pVM, (RTGCPTR32)pRegFrame->edi, (RTGCPTR32)pRegFrame->edx, pRelAddr);
                         if (rc == VINF_SUCCESS)
                         {
@@ -457 +457 @@
 
     /* Int 3 in PATM generated code? (most common case) */
-    if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
+    if (PATMIsPatchGCAddr(pVM, (RTGCPTR32)pRegFrame->eip))
     {
         /* @note hardcoded assumption about it being a single byte int 3 instruction. */
@@ -465 +465 @@
 
     /** @todo could use simple caching here to speed things up. */
-    pRec = (PPATMPATCHREC)RTAvloGCPtrGet(&CTXSUFF(pVM->patm.s.PatchLookupTree)->PatchTree, (RTGCPTR)(pRegFrame->eip - 1));  /* eip is pointing to the instruction *after* 'int 3' already */
+    pRec = (PPATMPATCHREC)RTAvloGCPtrGet(&CTXSUFF(pVM->patm.s.PatchLookupTree)->PatchTree, (RTGCPTR32)(pRegFrame->eip - 1));  /* eip is pointing to the instruction *after* 'int 3' already */
     if (pRec && pRec->patch.uState == PATCH_ENABLED)
     {