Index: trunk/include/VBox/patm.h
===================================================================
--- trunk/include/VBox/patm.h	(revision 9223)
+++ trunk/include/VBox/patm.h	(revision 9228)
@@ -95,9 +95,9 @@
     uint32_t  fPIF;
     /* PATM inhibit irq address (used by sti) */
-    RTGCPTR32   GCPtrInhibitInterrupts;
+    RTRCPTR   GCPtrInhibitInterrupts;
 
     /* Scratch room for call patch */
-    RTGCPTR32   GCCallPatchTargetAddr;
-    RTGCPTR32   GCCallReturnAddr;
+    RTRCPTR   GCCallPatchTargetAddr;
+    RTRCPTR   GCCallReturnAddr;
 
     /* Temporary storage for guest registers. */
@@ -116,9 +116,9 @@
 {
     // pointer to original guest code instruction (for emulation)
-    RTGCPTR32 pNewEIP;
+    RTRCPTR pNewEIP;
     // pointer to the next guest code instruction
-    RTGCPTR32 pNextInstr;
+    RTRCPTR pNextInstr;
     //pointer to the corresponding next instruction in the patch block
-    RTGCPTR32 pNextPatchInstr;
+    RTRCPTR pNextPatchInstr;
 } PATMTRAPREC, *PPATMTRAPREC;
 
@@ -195,5 +195,5 @@
  * @param   pAddr       Guest context address
  */
-PATMDECL(bool) PATMIsPatchGCAddr(PVM pVM, RTGCPTR32 pAddr);
+PATMDECL(bool) PATMIsPatchGCAddr(PVM pVM, RTRCPTR pAddr);
 
 /**
@@ -203,5 +203,5 @@
  * @param   pAddrGC     Guest context address
  */
-PATMDECL(bool) PATMShouldUseRawMode(PVM pVM, RTGCPTR32 pAddrGC);
+PATMDECL(bool) PATMShouldUseRawMode(PVM pVM, RTRCPTR pAddrGC);
 
 /**
@@ -221,5 +221,5 @@
  * @param   pCachedData     GC pointer to cached data
  */
-PATMDECL(int) PATMSetMMIOPatchInfo(PVM pVM, RTGCPHYS GCPhys, RTGCPTR32 pCachedData);
+PATMDECL(int) PATMSetMMIOPatchInfo(PVM pVM, RTGCPHYS GCPhys, RTRCPTR pCachedData);
 
 
@@ -233,5 +233,5 @@
  * @param   pRelBranchPatch     Relative duplicated function address
  */
-PATMDECL(int) PATMAddBranchToLookupCache(PVM pVM, RTGCPTR32 pJumpTableGC, RTGCPTR32 pBranchTarget, RTGCUINTPTR pRelBranchPatch);
+PATMDECL(int) PATMAddBranchToLookupCache(PVM pVM, RTRCPTR pJumpTableGC, RTRCPTR pBranchTarget, RTGCUINTPTR pRelBranchPatch);
 
 
@@ -256,5 +256,5 @@
  * @param   pSize       Original instruction size (out, optional)
  */
-PATMDECL(bool) PATMIsInt3Patch(PVM pVM, RTGCPTR32 pInstrGC, uint32_t *pOpcode, uint32_t *pSize);
+PATMDECL(bool) PATMIsInt3Patch(PVM pVM, RTRCPTR pInstrGC, uint32_t *pOpcode, uint32_t *pSize);
 
 
@@ -310,5 +310,5 @@
  *
  */
-PATMGCDECL(int) PATMGCHandleWriteToPatchPage(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR32 GCPtr, uint32_t cbWrite);
+PATMGCDECL(int) PATMGCHandleWriteToPatchPage(PVM pVM, PCPUMCTXCORE pRegFrame, RTRCPTR GCPtr, uint32_t cbWrite);
 
 /**
@@ -402,5 +402,5 @@
  * @param   pcb         Size of the patch memory block
  */
-PATMR3DECL(RTGCPTR32) PATMR3QueryPatchMemGC(PVM pVM, uint32_t *pcb);
+PATMR3DECL(RTRCPTR) PATMR3QueryPatchMemGC(PVM pVM, uint32_t *pcb);
 
 /**
@@ -412,5 +412,5 @@
  * @param   pPatchAddr  Guest context patch address (if true)
  */
-PATMR3DECL(bool) PATMR3IsInsidePatchJump(PVM pVM, RTGCPTR32 pAddr, PRTGCPTR32 pPatchAddr);
+PATMR3DECL(bool) PATMR3IsInsidePatchJump(PVM pVM, RTRCPTR pAddr, PRTGCPTR32 pPatchAddr);
 
 
@@ -422,5 +422,5 @@
  * @param   pAddrGC     Guest context address
  */
-PATMR3DECL(RTGCPTR32) PATMR3QueryPatchGCPtr(PVM pVM, RTGCPTR32 pAddrGC);
+PATMR3DECL(RTRCPTR) PATMR3QueryPatchGCPtr(PVM pVM, RTRCPTR pAddrGC);
 
 /**
@@ -440,5 +440,5 @@
  * @param   pAddrGC     GC pointer
  */
-PATMR3DECL(R3PTRTYPE(void *)) PATMR3GCPtrToHCPtr(PVM pVM, RTGCPTR32 pAddrGC);
+PATMR3DECL(R3PTRTYPE(void *)) PATMR3GCPtrToHCPtr(PVM pVM, RTRCPTR pAddrGC);
 
 
@@ -460,5 +460,5 @@
  * @param   pNewEip     GC pointer to new instruction
  */
-PATMR3DECL(int) PATMR3HandleTrap(PVM pVM, PCPUMCTX pCtx, RTGCPTR32 pEip, RTGCPTR *ppNewEip);
+PATMR3DECL(int) PATMR3HandleTrap(PVM pVM, PCPUMCTX pCtx, RTRCPTR pEip, RTGCPTR *ppNewEip);
 
 /**
@@ -479,5 +479,5 @@
  *
  */
-PATMR3DECL(int) PATMR3PatchWrite(PVM pVM, RTGCPTR32 GCPtr, uint32_t cbWrite);
+PATMR3DECL(int) PATMR3PatchWrite(PVM pVM, RTRCPTR GCPtr, uint32_t cbWrite);
 
 /**
@@ -488,5 +488,5 @@
  * @param   addr        GC address of the page to flush
  */
-PATMR3DECL(int) PATMR3FlushPage(PVM pVM, RTGCPTR32 addr);
+PATMR3DECL(int) PATMR3FlushPage(PVM pVM, RTRCPTR addr);
 
 /**
@@ -509,5 +509,5 @@
  * @note    returns failure if patching is not allowed or possible
  */
-PATMR3DECL(int) PATMR3InstallPatch(PVM pVM, RTGCPTR32 pInstrGC, uint64_t flags);
+PATMR3DECL(int) PATMR3InstallPatch(PVM pVM, RTRCPTR pInstrGC, uint64_t flags);
 
 /**
@@ -519,5 +519,5 @@
  * @param   flags       Patch flags
  */
-PATMR3DECL(int) PATMR3AddHint(PVM pVM, RTGCPTR32 pInstrGC, uint32_t flags);
+PATMR3DECL(int) PATMR3AddHint(PVM pVM, RTRCPTR pInstrGC, uint32_t flags);
 
 /**
@@ -541,5 +541,5 @@
  *
  */
-PATMR3DECL(RTGCPTR32) PATMR3PatchToGCPtr(PVM pVM, RTGCPTR32 pPatchGC, PATMTRANSSTATE *pEnmState);
+PATMR3DECL(RTRCPTR) PATMR3PatchToGCPtr(PVM pVM, RTRCPTR pPatchGC, PATMTRANSSTATE *pEnmState);
 
 /**
@@ -551,5 +551,5 @@
  *
  */
-PATMR3DECL(RTGCPTR32) PATMR3GuestGCPtrToPatchGCPtr(PVM pVM, RCPTRTYPE(uint8_t*) pInstrGC);
+PATMR3DECL(RTRCPTR) PATMR3GuestGCPtrToPatchGCPtr(PVM pVM, RCPTRTYPE(uint8_t*) pInstrGC);
 
 /**
@@ -563,5 +563,5 @@
  *
  */
-PATMR3DECL(int) PATMR3QueryOpcode(PVM pVM, RTGCPTR32 pInstrGC, uint8_t *pByte);
+PATMR3DECL(int) PATMR3QueryOpcode(PVM pVM, RTRCPTR pInstrGC, uint8_t *pByte);
 
 /**
@@ -575,5 +575,5 @@
  *
  */
-PATMR3DECL(int) PATMR3DisablePatch(PVM pVM, RTGCPTR32 pInstrGC);
+PATMR3DECL(int) PATMR3DisablePatch(PVM pVM, RTRCPTR pInstrGC);
 
 
@@ -588,5 +588,5 @@
  *
  */
-PATMR3DECL(int) PATMR3EnablePatch(PVM pVM, RTGCPTR32 pInstrGC);
+PATMR3DECL(int) PATMR3EnablePatch(PVM pVM, RTRCPTR pInstrGC);
 
 
@@ -601,5 +601,5 @@
  *
  */
-PATMR3DECL(int) PATMR3RemovePatch(PVM pVM, RTGCPTR32 pInstrGC);
+PATMR3DECL(int) PATMR3RemovePatch(PVM pVM, RTRCPTR pInstrGC);
 
 
@@ -612,5 +612,5 @@
  * @param   pConflictGC Guest context pointer to check
  */
-PATMR3DECL(int) PATMR3DetectConflict(PVM pVM, RTGCPTR32 pInstrGC, RTGCPTR32 pConflictGC);
+PATMR3DECL(int) PATMR3DetectConflict(PVM pVM, RTRCPTR pInstrGC, RTRCPTR pConflictGC);
 
 
@@ -622,5 +622,5 @@
  * @param   pInstrGC    Guest context pointer to instruction
  */
-PATMR3DECL(bool) PATMR3HasBeenPatched(PVM pVM, RTGCPTR32 pInstrGC);
+PATMR3DECL(bool) PATMR3HasBeenPatched(PVM pVM, RTRCPTR pInstrGC);
 
 
@@ -634,5 +634,5 @@
  *
  */
-PATMR3DECL(int) PATMInstallSpinlockPatch(PVM pVM, RTGCPTR32 pCallAcquireSpinlockGC, uint32_t cbAcquireSpinlockCall);
+PATMR3DECL(int) PATMInstallSpinlockPatch(PVM pVM, RTRCPTR pCallAcquireSpinlockGC, uint32_t cbAcquireSpinlockCall);
 
 
@@ -645,5 +645,5 @@
  *
  */
-PATMR3DECL(bool) PATMIsSpinlockAcquire(PVM pVM, RTGCPTR32 pCallTargetGC);
+PATMR3DECL(bool) PATMIsSpinlockAcquire(PVM pVM, RTRCPTR pCallTargetGC);
 
 /**
@@ -655,5 +655,5 @@
  *
  */
-PATMR3DECL(bool) PATMIsSpinlockRelease(PVM pVM, RTGCPTR32 pCallTargetGC);
+PATMR3DECL(bool) PATMIsSpinlockRelease(PVM pVM, RTRCPTR pCallTargetGC);
 
 /**
@@ -665,5 +665,5 @@
  *
  */
-PATMR3DECL(bool) PATMIsSpinlockReleasePatch(PVM pVM, RTGCPTR32 pCallTargetGC);
+PATMR3DECL(bool) PATMIsSpinlockReleasePatch(PVM pVM, RTRCPTR pCallTargetGC);
 
 /** @} */
