Changeset 9228 in vbox for trunk/src/VBox
- Timestamp:
- May 29, 2008 3:23:15 PM (17 years ago)
- Location:
- trunk/src/VBox
- Files:
-
- 11 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Runtime/Makefile.kmk
r9166 r9228 207 207 common/table/avlhcphys.cpp \ 208 208 common/table/avllu32.cpp \ 209 common/table/avlou32.cpp \ 209 210 common/table/avlogcphys.cpp \ 210 211 common/table/avlogcptr.cpp \ … … 1270 1271 common/string/strprintf.cpp \ 1271 1272 common/table/avllu32.cpp \ 1273 common/table/avlou32.cpp \ 1272 1274 common/table/avlogcphys.cpp \ 1273 1275 common/table/avlogcptr.cpp \ -
trunk/src/VBox/VMM/PATM/CSAM.cpp
r9220 r9228 578 578 if (rc != VINF_SUCCESS) 579 579 { 580 //// AssertMsgRC(rc, ("MMR3PhysGCVirt2HCVirtEx failed for %V Gv\n", pGCPtr));580 //// AssertMsgRC(rc, ("MMR3PhysGCVirt2HCVirtEx failed for %VRv\n", pGCPtr)); 581 581 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeAddrConv, a); 582 582 return NULL; … … 738 738 if (pCurInstrHC == NULL) 739 739 { 740 Log(("CSAMGCVirtToHCVirt failed for %V Gv\n", pCurInstrGC));740 Log(("CSAMGCVirtToHCVirt failed for %VRv\n", pCurInstrGC)); 741 741 break; 742 742 } … … 772 772 { 773 773 case OP_STR: 774 Log(("Privileged instruction at %V Gv: str!!\n", pCurInstrGC));774 Log(("Privileged instruction at %VRv: str!!\n", pCurInstrGC)); 775 775 break; 776 776 case OP_LSL: 777 Log(("Privileged instruction at %V Gv: lsl!!\n", pCurInstrGC));777 Log(("Privileged instruction at %VRv: lsl!!\n", pCurInstrGC)); 778 778 break; 779 779 case OP_LAR: 780 Log(("Privileged instruction at %V Gv: lar!!\n", pCurInstrGC));780 Log(("Privileged instruction at %VRv: lar!!\n", pCurInstrGC)); 781 781 break; 782 782 case OP_SGDT: 783 Log(("Privileged instruction at %V Gv: sgdt!!\n", pCurInstrGC));783 Log(("Privileged instruction at %VRv: sgdt!!\n", pCurInstrGC)); 784 784 break; 785 785 case OP_SLDT: 786 Log(("Privileged instruction at %V Gv: sldt!!\n", pCurInstrGC));786 Log(("Privileged instruction at %VRv: sldt!!\n", pCurInstrGC)); 787 787 break; 788 788 case OP_SIDT: 789 Log(("Privileged instruction at %V Gv: sidt!!\n", pCurInstrGC));789 Log(("Privileged instruction at %VRv: sidt!!\n", pCurInstrGC)); 790 790 break; 791 791 case OP_SMSW: 792 Log(("Privileged instruction at %V Gv: smsw!!\n", pCurInstrGC));792 Log(("Privileged instruction at %VRv: smsw!!\n", pCurInstrGC)); 793 793 break; 794 794 case OP_VERW: 795 Log(("Privileged instruction at %V Gv: verw!!\n", pCurInstrGC));795 Log(("Privileged instruction at %VRv: verw!!\n", pCurInstrGC)); 796 796 break; 797 797 case OP_VERR: 798 Log(("Privileged instruction at %V Gv: verr!!\n", pCurInstrGC));798 Log(("Privileged instruction at %VRv: verr!!\n", pCurInstrGC)); 799 799 break; 800 800 case OP_CPUID: 801 Log(("Privileged instruction at %V Gv: cpuid!!\n", pCurInstrGC));801 Log(("Privileged instruction at %VRv: cpuid!!\n", pCurInstrGC)); 802 802 break; 803 803 case OP_PUSH: 804 Log(("Privileged instruction at %V Gv: push cs!!\n", pCurInstrGC));804 Log(("Privileged instruction at %VRv: push cs!!\n", pCurInstrGC)); 805 805 break; 806 806 case OP_IRET: 807 Log(("Privileged instruction at %V Gv: iret!!\n", pCurInstrGC));807 Log(("Privileged instruction at %VRv: iret!!\n", pCurInstrGC)); 808 808 break; 809 809 } … … 834 834 { 835 835 case OP_JMP: 836 Log(("Control Flow instruction at %V Gv: jmp!!\n", pCurInstrGC));836 Log(("Control Flow instruction at %VRv: jmp!!\n", pCurInstrGC)); 837 837 break; 838 838 case OP_CALL: 839 Log(("Control Flow instruction at %V Gv: call!!\n", pCurInstrGC));839 Log(("Control Flow instruction at %VRv: call!!\n", pCurInstrGC)); 840 840 break; 841 841 } … … 919 919 if (pCurInstrHC == NULL) 920 920 { 921 Log(("CSAMGCVirtToHCVirt failed for %V Gv\n", pCurInstrGC));921 Log(("CSAMGCVirtToHCVirt failed for %VRv\n", pCurInstrGC)); 922 922 goto done; 923 923 } … … 935 935 if (VBOX_FAILURE(rc2)) 936 936 { 937 Log(("Disassembly failed at %V Gv with %Vrc (probably page not present) -> return to caller\n", pCurInstrGC, rc2));937 Log(("Disassembly failed at %VRv with %Vrc (probably page not present) -> return to caller\n", pCurInstrGC, rc2)); 938 938 goto done; 939 939 } … … 949 949 { 950 950 /// @todo fault in the page 951 Log(("Page for current instruction %V Gv is not present!!\n", pCurInstrGC));951 Log(("Page for current instruction %VRv is not present!!\n", pCurInstrGC)); 952 952 goto done; 953 953 } … … 1003 1003 1004 1004 /* Analyse the function. */ 1005 Log(("Found new function at %V Gv\n", pCurInstrGC));1005 Log(("Found new function at %VRv\n", pCurInstrGC)); 1006 1006 STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunction); 1007 1007 csamAnalyseCallCodeStream(pVM, pInstrGC, pCurInstrGC, fCode32, pfnCSAMR3Analyse, pUserData, pCacheRec); … … 1029 1029 1030 1030 /* Analyse the function. */ 1031 Log(("Found new function at %V Gv\n", pCurInstrGC));1031 Log(("Found new function at %VRv\n", pCurInstrGC)); 1032 1032 STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunction); 1033 1033 csamAnalyseCallCodeStream(pVM, pInstrGC, pCurInstrGC, fCode32, pfnCSAMR3Analyse, pUserData, pCacheRec); … … 1082 1082 #endif 1083 1083 1084 LogFlow(("csamAnalyseCodeStream: code at %V Gv depth=%d\n", pCurInstrGC, pCacheRec->depth));1084 LogFlow(("csamAnalyseCodeStream: code at %VRv depth=%d\n", pCurInstrGC, pCacheRec->depth)); 1085 1085 1086 1086 pVM->csam.s.fScanningStarted = true; … … 1095 1095 if (pCacheRec->depth > 512) 1096 1096 { 1097 LogFlow(("CSAM: maximum calldepth reached for %V Gv\n", pCurInstrGC));1097 LogFlow(("CSAM: maximum calldepth reached for %VRv\n", pCurInstrGC)); 1098 1098 pCacheRec->depth--; 1099 1099 return VINF_SUCCESS; //let's not go on forever … … 1120 1120 else 1121 1121 { 1122 LogFlow(("Code at %V Gv has been scanned before\n", pCurInstrGC));1122 LogFlow(("Code at %VRv has been scanned before\n", pCurInstrGC)); 1123 1123 rc = VINF_SUCCESS; 1124 1124 goto done; … … 1128 1128 if (pCurInstrHC == NULL) 1129 1129 { 1130 Log(("CSAMGCVirtToHCVirt failed for %V Gv\n", pCurInstrGC));1130 Log(("CSAMGCVirtToHCVirt failed for %VRv\n", pCurInstrGC)); 1131 1131 rc = VERR_PATCHING_REFUSED; 1132 1132 goto done; … … 1145 1145 if (VBOX_FAILURE(rc2)) 1146 1146 { 1147 Log(("Disassembly failed at %V Gv with %Vrc (probably page not present) -> return to caller\n", pCurInstrGC, rc2));1147 Log(("Disassembly failed at %VRv with %Vrc (probably page not present) -> return to caller\n", pCurInstrGC, rc2)); 1148 1148 rc = VINF_SUCCESS; 1149 1149 goto done; … … 1162 1162 { 1163 1163 /// @todo fault in the page 1164 Log(("Page for current instruction %V Gv is not present!!\n", pCurInstrGC));1164 Log(("Page for current instruction %VRv is not present!!\n", pCurInstrGC)); 1165 1165 rc = VWRN_CONTINUE_ANALYSIS; 1166 1166 goto next_please; … … 1224 1224 if (!PGMGstIsPagePresent(pVM, addr)) 1225 1225 { 1226 Log(("Page for current instruction %V Gv is not present!!\n", addr));1226 Log(("Page for current instruction %VRv is not present!!\n", addr)); 1227 1227 rc = VWRN_CONTINUE_ANALYSIS; 1228 1228 goto next_please; … … 1297 1297 break; 1298 1298 1299 Log(("Jump to %V Gv\n", addr));1299 Log(("Jump to %VRv\n", addr)); 1300 1300 1301 1301 pJmpPage = NULL; … … 1358 1358 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT) 1359 1359 { 1360 Log(("csamR3CalcPageHash: page %V Gv not present!!\n", pInstr));1360 Log(("csamR3CalcPageHash: page %VRv not present!!\n", pInstr)); 1361 1361 return ~0ULL; 1362 1362 } … … 1366 1366 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT) 1367 1367 { 1368 Log(("csamR3CalcPageHash: page %V Gv not present!!\n", pInstr));1368 Log(("csamR3CalcPageHash: page %VRv not present!!\n", pInstr)); 1369 1369 return ~0ULL; 1370 1370 } … … 1374 1374 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT) 1375 1375 { 1376 Log(("csamR3CalcPageHash: page %V Gv not present!!\n", pInstr));1376 Log(("csamR3CalcPageHash: page %VRv not present!!\n", pInstr)); 1377 1377 return ~0ULL; 1378 1378 } … … 1382 1382 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT) 1383 1383 { 1384 Log(("csamR3CalcPageHash: page %V Gv not present!!\n", pInstr));1384 Log(("csamR3CalcPageHash: page %VRv not present!!\n", pInstr)); 1385 1385 return ~0ULL; 1386 1386 } … … 1390 1390 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT) 1391 1391 { 1392 Log(("csamR3CalcPageHash: page %V Gv not present!!\n", pInstr));1392 Log(("csamR3CalcPageHash: page %VRv not present!!\n", pInstr)); 1393 1393 return ~0ULL; 1394 1394 } … … 1456 1456 else 1457 1457 if (rc != VERR_PAGE_NOT_PRESENT && rc != VERR_PAGE_TABLE_NOT_PRESENT) 1458 AssertMsgFailed(("PGMR3GetPage %V Gv failed with %Vrc\n", addr, rc));1458 AssertMsgFailed(("PGMR3GetPage %VRv failed with %Vrc\n", addr, rc)); 1459 1459 1460 1460 pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)addr); … … 1469 1469 } 1470 1470 1471 Log(("CSAMR3FlushPage: page %V Gv has changed -> FLUSH (rc=%Vrc) (Phys: %VGp vs %VGp)\n", addr, rc, GCPhys, pPageRec->page.GCPhys));1471 Log(("CSAMR3FlushPage: page %VRv has changed -> FLUSH (rc=%Vrc) (Phys: %VGp vs %VGp)\n", addr, rc, GCPhys, pPageRec->page.GCPhys)); 1472 1472 1473 1473 STAM_COUNTER_ADD(&pVM->csam.s.StatNrFlushes, 1); … … 1608 1608 bool ret; 1609 1609 1610 Log(("New page record for %V Gv\n", GCPtr & PAGE_BASE_GC_MASK));1610 Log(("New page record for %VRv\n", GCPtr & PAGE_BASE_GC_MASK)); 1611 1611 1612 1612 pPage = (PCSAMPAGEREC)MMR3HeapAllocZ(pVM, MM_TAG_CSAM_PATCH, sizeof(CSAMPAGEREC)); … … 1646 1646 (fMonitorInvalidation) ? CSAMCodePageInvalidate : 0, CSAMCodePageWriteHandler, "CSAMGCCodePageWriteHandler", 0, 1647 1647 csamGetMonitorDescription(enmTag)); 1648 AssertMsg(VBOX_SUCCESS(rc) || rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT, ("PGMR3HandlerVirtualRegisterEx %V Gv failed with %Vrc\n", GCPtr, rc));1648 AssertMsg(VBOX_SUCCESS(rc) || rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT, ("PGMR3HandlerVirtualRegisterEx %VRv failed with %Vrc\n", GCPtr, rc)); 1649 1649 if (VBOX_FAILURE(rc)) 1650 Log(("PGMR3HandlerVirtualRegisterEx for %V Gv failed with %Vrc\n", GCPtr, rc));1650 Log(("PGMR3HandlerVirtualRegisterEx for %VRv failed with %Vrc\n", GCPtr, rc)); 1651 1651 1652 1652 /* Could fail, because it's already monitored. Don't treat that condition as fatal. */ … … 1667 1667 } 1668 1668 1669 Log(("csamCreatePageRecord %V Gv HCPhys=%VGp\n", GCPtr, pPage->page.GCPhys));1669 Log(("csamCreatePageRecord %VRv HCPhys=%VGp\n", GCPtr, pPage->page.GCPhys)); 1670 1670 1671 1671 #ifdef VBOX_WITH_STATISTICS … … 1717 1717 pPageAddrGC &= PAGE_BASE_GC_MASK; 1718 1718 1719 Log(("CSAMR3MonitorPage %V Gv %d\n", pPageAddrGC, enmTag));1719 Log(("CSAMR3MonitorPage %VRv %d\n", pPageAddrGC, enmTag)); 1720 1720 1721 1721 /** @todo implicit assumption */ … … 1751 1751 if (!pPageRec->page.fMonitorActive) 1752 1752 { 1753 Log(("CSAMR3MonitorPage: activate monitoring for %V Gv\n", pPageAddrGC));1753 Log(("CSAMR3MonitorPage: activate monitoring for %VRv\n", pPageAddrGC)); 1754 1754 1755 1755 rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, pPageAddrGC, pPageAddrGC + (PAGE_SIZE - 1) /* inclusive! */, 1756 1756 (fMonitorInvalidation) ? CSAMCodePageInvalidate : 0, CSAMCodePageWriteHandler, "CSAMGCCodePageWriteHandler", 0, 1757 1757 csamGetMonitorDescription(enmTag)); 1758 AssertMsg(VBOX_SUCCESS(rc) || rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT, ("PGMR3HandlerVirtualRegisterEx %V Gv failed with %Vrc\n", pPageAddrGC, rc));1758 AssertMsg(VBOX_SUCCESS(rc) || rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT, ("PGMR3HandlerVirtualRegisterEx %VRv failed with %Vrc\n", pPageAddrGC, rc)); 1759 1759 if (VBOX_FAILURE(rc)) 1760 Log(("PGMR3HandlerVirtualRegisterEx for %V Gv failed with %Vrc\n", pPageAddrGC, rc));1760 Log(("PGMR3HandlerVirtualRegisterEx for %VRv failed with %Vrc\n", pPageAddrGC, rc)); 1761 1761 1762 1762 /* Could fail, because it's already monitored. Don't treat that condition as fatal. */ … … 1800 1800 // AssertMsg( (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT) 1801 1801 // || !(fPageShw & X86_PTE_RW) 1802 // || (pPageRec->page.GCPhys == 0), ("Shadow page flags for %V Gv (%VHp) aren't readonly (%VX64)!!\n", pPageAddrGC, GCPhys, fPageShw));1802 // || (pPageRec->page.GCPhys == 0), ("Shadow page flags for %VRv (%VHp) aren't readonly (%VX64)!!\n", pPageAddrGC, GCPhys, fPageShw)); 1803 1803 } 1804 1804 #endif … … 1829 1829 pPageAddrGC &= PAGE_BASE_GC_MASK; 1830 1830 1831 Log(("CSAMR3UnmonitorPage %V Gv %d\n", pPageAddrGC, enmTag));1831 Log(("CSAMR3UnmonitorPage %VRv %d\n", pPageAddrGC, enmTag)); 1832 1832 1833 1833 Assert(enmTag == CSAM_TAG_REM); … … 1853 1853 PCSAMPAGEREC pPageRec; 1854 1854 1855 Log(("csamRemovePageRecord %V Gv\n", GCPtr));1855 Log(("csamRemovePageRecord %VRv\n", GCPtr)); 1856 1856 pPageRec = (PCSAMPAGEREC)RTAvlPVRemove(&pVM->csam.s.pPageTree, (AVLPVKEY)GCPtr); 1857 1857 … … 2038 2038 static void csamMarkCode(PVM pVM, PCSAMPAGE pPage, RTGCPTR32 pInstr, uint32_t opsize, bool fScanned) 2039 2039 { 2040 LogFlow(("csamMarkCodeAsScanned %V Gv opsize=%d\n", pInstr, opsize));2040 LogFlow(("csamMarkCodeAsScanned %VRv opsize=%d\n", pInstr, opsize)); 2041 2041 CSAMMarkPage(pVM, pInstr, fScanned); 2042 2042 … … 2055 2055 if (pPage->uSize >= PAGE_SIZE) 2056 2056 { 2057 Log(("Scanned full page (%V Gv) -> free bitmap\n", pInstr & PAGE_BASE_GC_MASK));2057 Log(("Scanned full page (%VRv) -> free bitmap\n", pInstr & PAGE_BASE_GC_MASK)); 2058 2058 MMR3HeapFree(pPage->pBitmap); 2059 2059 pPage->pBitmap = NULL; … … 2088 2088 } 2089 2089 2090 Log(("CSAMR3MarkCode: %V Gv size=%d fScanned=%d\n", pInstr, opsize, fScanned));2090 Log(("CSAMR3MarkCode: %VRv size=%d fScanned=%d\n", pInstr, opsize, fScanned)); 2091 2091 csamMarkCode(pVM, pPage, pInstr, opsize, fScanned); 2092 2092 return VINF_SUCCESS; … … 2190 2190 Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT); 2191 2191 2192 Log(("CSAMR3FlushDirtyPages: flush %V Gv (modifypage rc=%Vrc)\n", pVM->csam.s.pvDirtyBasePage[i], rc));2192 Log(("CSAMR3FlushDirtyPages: flush %VRv (modifypage rc=%Vrc)\n", pVM->csam.s.pvDirtyBasePage[i], rc)); 2193 2193 2194 2194 pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)GCPtr); … … 2227 2227 GCPtr = GCPtr & PAGE_BASE_GC_MASK; 2228 2228 2229 Log(("csamR3FlushCodePages: %V Gv\n", GCPtr));2229 Log(("csamR3FlushCodePages: %VRv\n", GCPtr)); 2230 2230 PGMShwSetPage(pVM, GCPtr, 1, 0); 2231 2231 /* Resync the page to make sure instruction fetch will fault */ … … 2302 2302 PCSAMPAGE pPage = NULL; 2303 2303 2304 Log(("CSAMCheckGates: checking previous call instruction %V Gv\n", pHandler));2304 Log(("CSAMCheckGates: checking previous call instruction %VRv\n", pHandler)); 2305 2305 STAM_PROFILE_START(&pVM->csam.s.StatTime, a); 2306 2306 rc = csamAnalyseCodeStream(pVM, pHandler, pHandler, true, CSAMR3AnalyseCallback, pPage, &cacheRec); … … 2384 2384 { 2385 2385 /* Refuse to patch a handler whose idt cs selector isn't wide open. */ 2386 Log(("CSAMCheckGates: check gate %d failed due to rc %Vrc GCPtrBase=%V Gv limit=%x\n", iGate, rc, selInfo.GCPtrBase, selInfo.cbLimit));2386 Log(("CSAMCheckGates: check gate %d failed due to rc %Vrc GCPtrBase=%VRv limit=%x\n", iGate, rc, selInfo.GCPtrBase, selInfo.cbLimit)); 2387 2387 continue; 2388 2388 } … … 2391 2391 if (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32) 2392 2392 { 2393 Log(("CSAMCheckGates: check trap gate %d at %04X:%08X (flat %V Gv)\n", iGate, pGuestIdte->Gen.u16SegSel, (pGuestIdte->Gen.u16OffsetHigh << 16) | pGuestIdte->Gen.u16OffsetLow, pHandler));2393 Log(("CSAMCheckGates: check trap gate %d at %04X:%08X (flat %VRv)\n", iGate, pGuestIdte->Gen.u16SegSel, (pGuestIdte->Gen.u16OffsetHigh << 16) | pGuestIdte->Gen.u16OffsetLow, pHandler)); 2394 2394 } 2395 2395 else 2396 2396 { 2397 Log(("CSAMCheckGates: check interrupt gate %d at %04X:%08X (flat %V Gv)\n", iGate, pGuestIdte->Gen.u16SegSel, (pGuestIdte->Gen.u16OffsetHigh << 16) | pGuestIdte->Gen.u16OffsetLow, pHandler));2397 Log(("CSAMCheckGates: check interrupt gate %d at %04X:%08X (flat %VRv)\n", iGate, pGuestIdte->Gen.u16SegSel, (pGuestIdte->Gen.u16OffsetHigh << 16) | pGuestIdte->Gen.u16OffsetLow, pHandler)); 2398 2398 } 2399 2399 … … 2455 2455 } 2456 2456 2457 Log(("Installing %s gate handler for 0x%X at %V Gv\n", (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32) ? "trap" : "intr", iGate, pHandler));2457 Log(("Installing %s gate handler for 0x%X at %VRv\n", (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32) ? "trap" : "intr", iGate, pHandler)); 2458 2458 2459 2459 rc = PATMR3InstallPatch(pVM, pHandler, fPatchFlags); … … 2491 2491 } 2492 2492 2493 Log(("CSAMR3RecordCallAddress %V Gv\n", GCPtrCall));2493 Log(("CSAMR3RecordCallAddress %VRv\n", GCPtrCall)); 2494 2494 2495 2495 pVM->csam.s.pvCallInstruction[pVM->csam.s.iCallInstruction++] = GCPtrCall; -
trunk/src/VBox/VMM/PATM/PATM.cpp
r9220 r9228 64 64 *******************************************************************************/ 65 65 66 static int patmDisableUnusablePatch(PVM pVM, RT GCPTR32 pInstrGC, RTGCPTR32pConflictAddr, PPATCHINFO pPatch);66 static int patmDisableUnusablePatch(PVM pVM, RTRCPTR pInstrGC, RTRCPTR pConflictAddr, PPATCHINFO pPatch); 67 67 static int patmActivateInt3Patch(PVM pVM, PPATCHINFO pPatch); 68 68 static int patmDeactivateInt3Patch(PVM pVM, PPATCHINFO pPatch); 69 69 70 70 #ifdef LOG_ENABLED // keep gcc quiet 71 static bool patmIsCommonIDTHandlerPatch(PVM pVM, RT GCPTR32pInstrGC);71 static bool patmIsCommonIDTHandlerPatch(PVM pVM, RTRCPTR pInstrGC); 72 72 #endif 73 73 #ifdef VBOX_WITH_STATISTICS … … 81 81 82 82 static int patmReinit(PVM pVM); 83 static DECLCALLBACK(int) RelocatePatches(PAVLO GCPTRNODECORE pNode, void *pParam);83 static DECLCALLBACK(int) RelocatePatches(PAVLOU32NODECORE pNode, void *pParam); 84 84 static DECLCALLBACK(int) patmVirtPageHandler(PVM pVM, RTGCPTR GCPtr, void *pvPtr, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser); 85 85 86 86 #ifdef VBOX_WITH_DEBUGGER 87 static DECLCALLBACK(int) DisableAllPatches(PAVLO GCPTRNODECORE pNode, void *pVM);87 static DECLCALLBACK(int) DisableAllPatches(PAVLOU32NODECORE pNode, void *pVM); 88 88 static DECLCALLBACK(int) patmr3CmdOn(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs, PDBGCVAR pResult); 89 89 static DECLCALLBACK(int) patmr3CmdOff(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs, PDBGCVAR pResult); … … 126 126 127 127 /* PATM stack page for call instruction execution. (2 parts: one for our private stack and one to store the original return address */ 128 pVM->patm.s.pGCStackHC = (RT GCPTR32*)(pVM->patm.s.pPatchMemHC + PATCH_MEMORY_SIZE + PAGE_SIZE);128 pVM->patm.s.pGCStackHC = (RTRCPTR *)(pVM->patm.s.pPatchMemHC + PATCH_MEMORY_SIZE + PAGE_SIZE); 129 129 pVM->patm.s.pGCStackGC = MMHyperHC2GC(pVM, pVM->patm.s.pGCStackHC); 130 130 … … 324 324 memset(pVM->patm.s.pGCStateHC, 0, PAGE_SIZE); 325 325 AssertReleaseMsg(pVM->patm.s.pGCStateGC, ("Impossible! MMHyperHC2GC(%p) failed!\n", pVM->patm.s.pGCStateGC)); 326 Log(("Patch memory allocated at %p - %VGv\n", pVM->patm.s.pPatchMemHC, pVM->patm.s.pPatchMemGC)); 326 327 Log(("Patch memory allocated at %p - %VRv\n", pVM->patm.s.pPatchMemHC, pVM->patm.s.pPatchMemGC)); 327 328 pVM->patm.s.pGCStateHC->uVMFlags = X86_EFL_IF; 328 329 … … 409 410 PATMR3DECL(void) PATMR3Relocate(PVM pVM) 410 411 { 411 RT GCPTR32GCPtrNew = MMHyperHC2GC(pVM, pVM->patm.s.pGCStateHC);412 RT GCINTPTRdelta = GCPtrNew - pVM->patm.s.pGCStateGC;413 414 Log(("PATMR3Relocate from %V Gv to %VGv - delta %08X\n", pVM->patm.s.pGCStateGC, GCPtrNew, delta));412 RTRCPTR GCPtrNew = MMHyperHC2GC(pVM, pVM->patm.s.pGCStateHC); 413 RTRCINTPTR delta = GCPtrNew - pVM->patm.s.pGCStateGC; 414 415 Log(("PATMR3Relocate from %VRv to %VRv - delta %08X\n", pVM->patm.s.pGCStateGC, GCPtrNew, delta)); 415 416 if (delta) 416 417 { … … 423 424 pVM->patm.s.deltaReloc = delta; 424 425 425 RTAvlo GCPtrDoWithAll(&pVM->patm.s.PatchLookupTreeHC->PatchTree, true, RelocatePatches, (void *)pVM);426 RTAvloU32DoWithAll(&pVM->patm.s.PatchLookupTreeHC->PatchTree, true, RelocatePatches, (void *)pVM); 426 427 427 428 rc = CPUMQueryGuestCtxPtr(pVM, &pCtx); … … 484 485 while (true) 485 486 { 486 PPATMPATCHREC pPatchRec = (PPATMPATCHREC)RTAvlo GCPtrRemoveBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTree, 0, true);487 PPATMPATCHREC pPatchRec = (PPATMPATCHREC)RTAvloU32RemoveBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTree, 0, true); 487 488 if (pPatchRec) 488 489 { … … 533 534 for (int i=0;i<orgsize;i++) 534 535 { 535 int rc = PATMR3QueryOpcode(pDisInfo->pVM, (RT GCPTR32)pSrc, pDest);536 int rc = PATMR3QueryOpcode(pDisInfo->pVM, (RTRCPTR)pSrc, pDest); 536 537 if (VBOX_SUCCESS(rc)) 537 538 { … … 575 576 576 577 /** 577 * Callback function for RTAvlo GCPtrDoWithAll578 * Callback function for RTAvloU32DoWithAll 578 579 * 579 580 * Updates all fixups in the patches … … 583 584 * @param pParam The VM to operate on. 584 585 */ 585 static DECLCALLBACK(int) RelocatePatches(PAVLO GCPTRNODECORE pNode, void *pParam)586 static DECLCALLBACK(int) RelocatePatches(PAVLOU32NODECORE pNode, void *pParam) 586 587 { 587 588 PPATMPATCHREC pPatch = (PPATMPATCHREC)pNode; 588 589 PVM pVM = (PVM)pParam; 589 RT GCINTPTR delta;590 RTRCINTPTR delta; 590 591 #ifdef LOG_ENABLED 591 592 DISCPUSTATE cpu; … … 615 616 616 617 Log(("Nr of fixups %d\n", pPatch->patch.nrFixups)); 617 delta = (RT GCINTPTR)pVM->patm.s.deltaReloc;618 delta = (RTRCINTPTR)pVM->patm.s.deltaReloc; 618 619 619 620 /* … … 635 636 { 636 637 case FIXUP_ABSOLUTE: 637 Log(("Absolute fixup at %V Gv %VHv -> %VHv at %VGv\n", pRec->pSource, *(RTGCUINTPTR32*)pRec->pRelocPos, *(RTGCINTPTR*)pRec->pRelocPos + delta, pRec->pRelocPos));638 Log(("Absolute fixup at %VRv %VHv -> %VHv at %VRv\n", pRec->pSource, *(RTRCUINTPTR *)pRec->pRelocPos, *(RTRCINTPTR*)pRec->pRelocPos + delta, pRec->pRelocPos)); 638 639 if (!pRec->pSource || PATMIsPatchGCAddr(pVM, pRec->pSource)) 639 640 { 640 *(RT GCUINTPTR32*)pRec->pRelocPos += delta;641 *(RTRCUINTPTR *)pRec->pRelocPos += delta; 641 642 } 642 643 else … … 649 650 650 651 memcpy(oldInstr, pPatch->patch.aPrivInstr, pPatch->patch.cbPrivInstr); 651 *(RT GCPTR32 *)&oldInstr[pPatch->patch.cbPrivInstr - sizeof(RTGCPTR32)] = pRec->pDest;652 *(RTRCPTR *)&oldInstr[pPatch->patch.cbPrivInstr - sizeof(RTRCPTR)] = pRec->pDest; 652 653 653 654 rc = PGMPhysReadGCPtr(pVM, curInstr, pPatch->patch.pPrivInstrGC, pPatch->patch.cbPrivInstr); 654 655 Assert(VBOX_SUCCESS(rc) || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT); 655 656 656 pRec->pDest = (RT GCPTR32)((RTGCUINTPTR32)pRec->pDest + delta);657 pRec->pDest = (RTRCPTR)((RTRCUINTPTR)pRec->pDest + delta); 657 658 658 659 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT) 659 660 { 660 RT GCPTR32pPage = pPatch->patch.pPrivInstrGC & PAGE_BASE_GC_MASK;661 RTRCPTR pPage = pPatch->patch.pPrivInstrGC & PAGE_BASE_GC_MASK; 661 662 662 663 Log(("PATM: Patch page not present -> check later!\n")); … … 677 678 if (VBOX_SUCCESS(rc)) 678 679 { 679 *(RT GCPTR32 *)&curInstr[pPatch->patch.cbPrivInstr - sizeof(RTGCPTR32)] = pRec->pDest;680 *(RTRCPTR *)&curInstr[pPatch->patch.cbPrivInstr - sizeof(RTRCPTR)] = pRec->pDest; 680 681 rc = PGMPhysWriteGCPtrDirty(pVM, pRec->pSource, curInstr, pPatch->patch.cbPrivInstr); 681 682 AssertRC(rc); … … 686 687 case FIXUP_REL_JMPTOPATCH: 687 688 { 688 RT GCPTR32 pTarget = (RTGCPTR32)((RTGCINTPTR)pRec->pDest + delta);689 RTRCPTR pTarget = (RTRCPTR)((RTRCINTPTR)pRec->pDest + delta); 689 690 690 691 if ( pPatch->patch.uState == PATCH_ENABLED … … 693 694 uint8_t oldJump[SIZEOF_NEAR_COND_JUMP32]; 694 695 uint8_t temp[SIZEOF_NEAR_COND_JUMP32]; 695 RT GCPTR32pJumpOffGC;696 RT GCINTPTR displ = (RTGCINTPTR)pTarget - (RTGCINTPTR)pRec->pSource;697 RT GCINTPTR displOld= (RTGCINTPTR)pRec->pDest - (RTGCINTPTR)pRec->pSource;696 RTRCPTR pJumpOffGC; 697 RTRCINTPTR displ = (RTRCINTPTR)pTarget - (RTRCINTPTR)pRec->pSource; 698 RTRCINTPTR displOld= (RTRCINTPTR)pRec->pDest - (RTRCINTPTR)pRec->pSource; 698 699 699 700 Log(("Relative fixup (g2p) %08X -> %08X at %08X (source=%08x, target=%08x)\n", *(int32_t*)pRec->pRelocPos, displ, pRec->pRelocPos, pRec->pSource, pRec->pDest)); … … 708 709 oldJump[0] = pPatch->patch.aPrivInstr[0]; 709 710 oldJump[1] = pPatch->patch.aPrivInstr[1]; 710 *(RT GCUINTPTR32*)&oldJump[2] = displOld;711 *(RTRCUINTPTR *)&oldJump[2] = displOld; 711 712 } 712 713 else … … 716 717 pJumpOffGC = pPatch->patch.pPrivInstrGC + 1; //one byte opcode 717 718 oldJump[0] = 0xE9; 718 *(RT GCUINTPTR32*)&oldJump[1] = displOld;719 *(RTRCUINTPTR *)&oldJump[1] = displOld; 719 720 } 720 721 else … … 733 734 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT) 734 735 { 735 RT GCPTR32pPage = pPatch->patch.pPrivInstrGC & PAGE_BASE_GC_MASK;736 RTRCPTR pPage = pPatch->patch.pPrivInstrGC & PAGE_BASE_GC_MASK; 736 737 737 738 rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_ALL, pPage, pPage + (PAGE_SIZE - 1) /* inclusive! */, 0, patmVirtPageHandler, "PATMGCMonitorPage", 0, "PATMMonitorPatchJump"); … … 770 771 case FIXUP_REL_JMPTOGUEST: 771 772 { 772 RT GCPTR32 pSource = (RTGCPTR32)((RTGCINTPTR)pRec->pSource + delta);773 RT GCINTPTR displ = (RTGCINTPTR)pRec->pDest - (RTGCINTPTR)pSource;773 RTRCPTR pSource = (RTRCPTR)((RTRCINTPTR)pRec->pSource + delta); 774 RTRCINTPTR displ = (RTRCINTPTR)pRec->pDest - (RTRCINTPTR)pSource; 774 775 775 776 Assert(!(pPatch->patch.flags & PATMFL_GLOBAL_FUNCTIONS)); 776 777 Log(("Relative fixup (p2g) %08X -> %08X at %08X (source=%08x, target=%08x)\n", *(int32_t*)pRec->pRelocPos, displ, pRec->pRelocPos, pRec->pSource, pRec->pDest)); 777 *(RT GCUINTPTR32*)pRec->pRelocPos = displ;778 *(RTRCUINTPTR *)pRec->pRelocPos = displ; 778 779 pRec->pSource = pSource; 779 780 break; … … 830 831 #ifdef VBOX_WITH_DEBUGGER 831 832 /** 832 * Callback function for RTAvlo GCPtrDoWithAll833 * Callback function for RTAvloU32DoWithAll 833 834 * 834 835 * Enables the patch that's being enumerated … … 838 839 * @param pVM The VM to operate on. 839 840 */ 840 static DECLCALLBACK(int) EnableAllPatches(PAVLO GCPTRNODECORE pNode, void *pVM)841 static DECLCALLBACK(int) EnableAllPatches(PAVLOU32NODECORE pNode, void *pVM) 841 842 { 842 843 PPATMPATCHREC pPatch = (PPATMPATCHREC)pNode; 843 844 844 PATMR3EnablePatch((PVM)pVM, (RT GCPTR32)pPatch->Core.Key);845 PATMR3EnablePatch((PVM)pVM, (RTRCPTR)pPatch->Core.Key); 845 846 return 0; 846 847 } … … 850 851 #ifdef VBOX_WITH_DEBUGGER 851 852 /** 852 * Callback function for RTAvlo GCPtrDoWithAll853 * Callback function for RTAvloU32DoWithAll 853 854 * 854 855 * Disables the patch that's being enumerated … … 858 859 * @param pVM The VM to operate on. 859 860 */ 860 static DECLCALLBACK(int) DisableAllPatches(PAVLO GCPTRNODECORE pNode, void *pVM)861 static DECLCALLBACK(int) DisableAllPatches(PAVLOU32NODECORE pNode, void *pVM) 861 862 { 862 863 PPATMPATCHREC pPatch = (PPATMPATCHREC)pNode; 863 864 864 PATMR3DisablePatch((PVM)pVM, (RT GCPTR32)pPatch->Core.Key);865 PATMR3DisablePatch((PVM)pVM, (RTRCPTR)pPatch->Core.Key); 865 866 return 0; 866 867 } … … 891 892 * @param pcb Size of the patch memory block 892 893 */ 893 PATMR3DECL(RT GCPTR32) PATMR3QueryPatchMemGC(PVM pVM, uint32_t *pcb)894 PATMR3DECL(RTRCPTR) PATMR3QueryPatchMemGC(PVM pVM, uint32_t *pcb) 894 895 { 895 896 if (pcb) … … 946 947 * @param pAddrGC GC pointer 947 948 */ 948 PATMR3DECL(R3PTRTYPE(void *)) PATMR3GCPtrToHCPtr(PVM pVM, RT GCPTR32pAddrGC)949 PATMR3DECL(R3PTRTYPE(void *)) PATMR3GCPtrToHCPtr(PVM pVM, RTRCPTR pAddrGC) 949 950 { 950 951 if (pVM->patm.s.pPatchMemGC <= pAddrGC && pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem > pAddrGC) … … 1057 1058 { 1058 1059 uint8_t *pPatchHC; 1059 RT GCPTR32pPatchGC;1060 RT GCPTR32pOrgInstrGC;1060 RTRCPTR pPatchGC; 1061 RTRCPTR pOrgInstrGC; 1061 1062 1062 1063 pOrgInstrGC = PATMR3PatchToGCPtr(pVM, pInstrGC, 0); … … 1090 1091 } 1091 1092 /* Our jumps *always* have a dword displacement (to make things easier). */ 1092 Assert(sizeof(uint32_t) == sizeof(RT GCPTR32));1093 displ = pBranchTargetGC - (pInstrGC + pRec->offDispl + sizeof(RT GCPTR32));1094 *(RT GCPTR32*)(pRec->pJumpHC + pRec->offDispl) = displ;1095 Log(("Set branch target %d to %08X : %08x - (%08x + %d + %d)\n", nrJumpRecs, displ, pBranchTargetGC, pInstrGC, pRec->offDispl, sizeof(RT GCPTR32)));1093 Assert(sizeof(uint32_t) == sizeof(RTRCPTR)); 1094 displ = pBranchTargetGC - (pInstrGC + pRec->offDispl + sizeof(RTRCPTR)); 1095 *(RTRCPTR *)(pRec->pJumpHC + pRec->offDispl) = displ; 1096 Log(("Set branch target %d to %08X : %08x - (%08x + %d + %d)\n", nrJumpRecs, displ, pBranchTargetGC, pInstrGC, pRec->offDispl, sizeof(RTRCPTR))); 1096 1097 } 1097 1098 Assert(nrJumpRecs == pPatch->nrJumpRecs); … … 1107 1108 * 1108 1109 */ 1109 static void patmAddIllegalInstrRecord(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pInstrGC)1110 static void patmAddIllegalInstrRecord(PVM pVM, PPATCHINFO pPatch, RTRCPTR pInstrGC) 1110 1111 { 1111 1112 PAVLPVNODECORE pRec; … … 1120 1121 } 1121 1122 1122 static bool patmIsIllegalInstr(PPATCHINFO pPatch, RT GCPTR32pInstrGC)1123 static bool patmIsIllegalInstr(PPATCHINFO pPatch, RTRCPTR pInstrGC) 1123 1124 { 1124 1125 PAVLPVNODECORE pRec; … … 1142 1143 */ 1143 1144 /** @note Be extremely careful with this function. Make absolutely sure the guest address is correct! (to avoid executing instructions twice!) */ 1144 void patmr3AddP2GLookupRecord(PVM pVM, PPATCHINFO pPatch, uint8_t *pPatchInstrHC, RT GCPTR32pInstrGC, PATM_LOOKUP_TYPE enmType, bool fDirty)1145 void patmr3AddP2GLookupRecord(PVM pVM, PPATCHINFO pPatch, uint8_t *pPatchInstrHC, RTRCPTR pInstrGC, PATM_LOOKUP_TYPE enmType, bool fDirty) 1145 1146 { 1146 1147 bool ret; … … 1178 1179 if (enmType == PATM_LOOKUP_BOTHDIR) 1179 1180 { 1180 pGuestToPatchRec = (PRECGUESTTOPATCH)RTAvl GCPtrGet(&pPatch->Guest2PatchAddrTree, pInstrGC);1181 pGuestToPatchRec = (PRECGUESTTOPATCH)RTAvlU32Get(&pPatch->Guest2PatchAddrTree, pInstrGC); 1181 1182 if (!pGuestToPatchRec) 1182 1183 { … … 1185 1186 pGuestToPatchRec->PatchOffset = PatchOffset; 1186 1187 1187 ret = RTAvl GCPtrInsert(&pPatch->Guest2PatchAddrTree, &pGuestToPatchRec->Core);1188 ret = RTAvlU32Insert(&pPatch->Guest2PatchAddrTree, &pGuestToPatchRec->Core); 1188 1189 Assert(ret); 1189 1190 } … … 1201 1202 * @param pPatchInstrGC Guest context pointer to patch block 1202 1203 */ 1203 void patmr3RemoveP2GLookupRecord(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pPatchInstrGC)1204 void patmr3RemoveP2GLookupRecord(PVM pVM, PPATCHINFO pPatch, RTRCPTR pPatchInstrGC) 1204 1205 { 1205 1206 PAVLU32NODECORE pNode; 1206 PAVL GCPTRNODECOREpNode2;1207 PAVLU32NODECORE pNode2; 1207 1208 PRECPATCHTOGUEST pPatchToGuestRec; 1208 1209 uint32_t PatchOffset = pPatchInstrGC - pVM->patm.s.pPatchMemGC; /* Offset in memory reserved for PATM. */ … … 1217 1218 1218 1219 Assert(pGuestToPatchRec->Core.Key); 1219 pNode2 = RTAvl GCPtrRemove(&pPatch->Guest2PatchAddrTree, pGuestToPatchRec->Core.Key);1220 pNode2 = RTAvlU32Remove(&pPatch->Guest2PatchAddrTree, pGuestToPatchRec->Core.Key); 1220 1221 Assert(pNode2); 1221 1222 } … … 1299 1300 if (pPatch->cbPatchBlockSize >= MAX_PATCH_SIZE) 1300 1301 { 1301 Log(("Code block too big (%x) for patch at %V Gv!!\n", pPatch->cbPatchBlockSize, pCurInstrGC));1302 Log(("Code block too big (%x) for patch at %VRv!!\n", pPatch->cbPatchBlockSize, pCurInstrGC)); 1302 1303 fIllegalInstr = true; 1303 1304 patmAddIllegalInstrRecord(pVM, pPatch, pCurInstrGC); … … 1423 1424 { 1424 1425 // The end marker for this kind of patch is any instruction at a location outside our patch jump 1425 Log(("End of block at %V Gv size %d\n", pCurInstrGC, pCpu->opsize));1426 Log(("End of block at %VRv size %d\n", pCurInstrGC, pCpu->opsize)); 1426 1427 return VINF_SUCCESS; 1427 1428 } … … 1455 1456 if (pPatch->cbPatchBlockSize >= MAX_PATCH_SIZE) 1456 1457 { 1457 Log(("Code block too big (%x) for function patch at %V Gv!!\n", pPatch->cbPatchBlockSize, pCurInstrGC));1458 Log(("Code block too big (%x) for function patch at %VRv!!\n", pPatch->cbPatchBlockSize, pCurInstrGC)); 1458 1459 fIllegalInstr = true; 1459 1460 patmAddIllegalInstrRecord(pVM, pPatch, pCurInstrGC); … … 1552 1553 bool fInhibitIRQInstr = false; /* did the instruction cause PATMFL_INHIBITIRQS to be set? */ 1553 1554 1554 LogFlow(("patmRecompileCallback %V Gv %VGv\n", pInstrGC, pCurInstrGC));1555 LogFlow(("patmRecompileCallback %VRv %VRv\n", pInstrGC, pCurInstrGC)); 1555 1556 1556 1557 if ( patmGuestGCPtrToPatchGCPtr(pVM, pPatch, pCurInstrGC) != 0 … … 1561 1562 * no need to record this instruction as it's glue code that never crashes (it had better not!) 1562 1563 */ 1563 Log(("patmRecompileCallback: jump to code we've recompiled before %V Gv!\n", pCurInstrGC));1564 Log(("patmRecompileCallback: jump to code we've recompiled before %VRv!\n", pCurInstrGC)); 1564 1565 return patmPatchGenRelJump(pVM, pPatch, pCurInstrGC, OP_JMP, !!(pCpu->prefix & PREFIX_OPSIZE)); 1565 1566 } … … 1594 1595 if (patmIsIllegalInstr(pPatch, pCurInstrGC)) 1595 1596 { 1596 Log(("Illegal instruction at %V Gv -> mark with int 3\n", pCurInstrGC));1597 Log(("Illegal instruction at %VRv -> mark with int 3\n", pCurInstrGC)); 1597 1598 rc = patmPatchGenIllegalInstr(pVM, pPatch); 1598 1599 goto end; … … 1659 1660 && (pCpu->param1.base.reg_seg == USE_REG_SS)) 1660 1661 { 1661 Log(("Force recompilation of next instruction for OP_MOV at %V Gv\n", pCurInstrGC));1662 Log(("Force recompilation of next instruction for OP_MOV at %VRv\n", pCurInstrGC)); 1662 1663 pPatch->flags |= PATMFL_RECOMPILE_NEXT; 1663 1664 /** @todo this could cause a fault (ring 0 selector being loaded in ring 1) */ … … 1684 1685 Assert(pCpu->pCurInstr->optype & OPTYPE_INHIBIT_IRQS); 1685 1686 1686 Log(("Force recompilation of next instruction for OP_MOV at %V Gv\n", pCurInstrGC));1687 Log(("Force recompilation of next instruction for OP_MOV at %VRv\n", pCurInstrGC)); 1687 1688 pPatch->flags |= PATMFL_RECOMPILE_NEXT; 1688 1689 } … … 1691 1692 case OP_STI: 1692 1693 { 1693 RT GCPTR32pNextInstrGC = 0; /* by default no inhibit irq */1694 RTRCPTR pNextInstrGC = 0; /* by default no inhibit irq */ 1694 1695 1695 1696 /** In a sequence of instructions that inhibit irqs, only the first one actually inhibits irqs. */ … … 1699 1700 fInhibitIRQInstr = true; 1700 1701 pNextInstrGC = pCurInstrGC + pCpu->opsize; 1701 Log(("Inhibit irqs for instruction OP_STI at %V Gv\n", pCurInstrGC));1702 Log(("Inhibit irqs for instruction OP_STI at %VRv\n", pCurInstrGC)); 1702 1703 } 1703 1704 rc = patmPatchGenSti(pVM, pPatch, pCurInstrGC, pNextInstrGC); … … 1796 1797 1797 1798 case OP_IRET: 1798 Log(("IRET at %V Gv\n", pCurInstrGC));1799 Log(("IRET at %VRv\n", pCurInstrGC)); 1799 1800 rc = patmPatchGenIret(pVM, pPatch, pCurInstrGC, !!(pCpu->prefix & PREFIX_OPSIZE)); 1800 1801 if (VBOX_SUCCESS(rc)) … … 1855 1856 if (pPatch->flags & PATMFL_SUPPORT_INDIRECT_CALLS && pCpu->param1.size == 4 /* no far calls! */) 1856 1857 { 1857 rc = patmPatchGenCall(pVM, pPatch, pCpu, pCurInstrGC, (RT GCPTR32)0xDEADBEEF, true);1858 rc = patmPatchGenCall(pVM, pPatch, pCpu, pCurInstrGC, (RTRCPTR)0xDEADBEEF, true); 1858 1859 if (VBOX_SUCCESS(rc)) 1859 1860 { … … 1931 1932 { 1932 1933 int rc2; 1933 RT GCPTR32pNextInstrGC = pCurInstrGC + pCpu->opsize;1934 RTRCPTR pNextInstrGC = pCurInstrGC + pCpu->opsize; 1934 1935 1935 1936 pPatch->flags &= ~PATMFL_INHIBIT_IRQS; 1936 Log(("Clear inhibit IRQ flag at %V Gv\n", pCurInstrGC));1937 Log(("Clear inhibit IRQ flag at %VRv\n", pCurInstrGC)); 1937 1938 if (pPatch->flags & PATMFL_GENERATE_JUMPTOGUEST) 1938 1939 { 1939 Log(("patmRecompileCallback: generate jump back to guest (%V Gv) after fused instruction\n", pNextInstrGC));1940 Log(("patmRecompileCallback: generate jump back to guest (%VRv) after fused instruction\n", pNextInstrGC)); 1940 1941 1941 1942 rc2 = patmPatchGenJumpToGuest(pVM, pPatch, pNextInstrGC, true /* clear inhibit irq flag */); … … 1960 1961 ) 1961 1962 { 1962 RT GCPTR32pNextInstrGC = pCurInstrGC + pCpu->opsize;1963 RTRCPTR pNextInstrGC = pCurInstrGC + pCpu->opsize; 1963 1964 1964 1965 // The end marker for this kind of patch is any instruction at a location outside our patch jump 1965 Log(("patmRecompileCallback: end found for single instruction patch at %V Gv opsize %d\n", pNextInstrGC, pCpu->opsize));1966 Log(("patmRecompileCallback: end found for single instruction patch at %VRv opsize %d\n", pNextInstrGC, pCpu->opsize)); 1966 1967 1967 1968 rc = patmPatchGenJumpToGuest(pVM, pPatch, pNextInstrGC); … … 1982 1983 * 1983 1984 */ 1984 static void patmPatchAddDisasmJump(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pInstrGC)1985 static void patmPatchAddDisasmJump(PVM pVM, PPATCHINFO pPatch, RTRCPTR pInstrGC) 1985 1986 { 1986 1987 PAVLPVNODECORE pRec; … … 2002 2003 * 2003 2004 */ 2004 static bool patmIsKnownDisasmJump(PPATCHINFO pPatch, RT GCPTR32pInstrGC)2005 static bool patmIsKnownDisasmJump(PPATCHINFO pPatch, RTRCPTR pInstrGC) 2005 2006 { 2006 2007 PAVLPVNODECORE pRec; … … 2032 2033 DISCPUSTATE cpu; 2033 2034 uint8_t *pOrgJumpHC; 2034 RT GCPTR32pOrgJumpGC;2035 RTRCPTR pOrgJumpGC; 2035 2036 uint32_t dummy; 2036 2037 … … 2110 2111 if (PATMIsPatchGCAddr(pVM, pCurInstrGC)) 2111 2112 { 2112 RT GCPTR32pOrgInstrGC = patmPatchGCPtr2GuestGCPtr(pVM, pPatch, pCurInstrGC);2113 RTRCPTR pOrgInstrGC = patmPatchGCPtr2GuestGCPtr(pVM, pPatch, pCurInstrGC); 2113 2114 2114 2115 if (pOrgInstrGC != pPatch->pTempInfo->pLastDisasmInstrGC) 2115 Log(("DIS %V Gv<-%s", pOrgInstrGC, szOutput));2116 Log(("DIS %VRv<-%s", pOrgInstrGC, szOutput)); 2116 2117 else 2117 2118 Log(("DIS %s", szOutput)); … … 2145 2146 ) 2146 2147 { 2147 RT GCPTR32pTargetGC = PATMResolveBranch(&cpu, pCurInstrGC);2148 RT GCPTR32pOrgTargetGC;2148 RTRCPTR pTargetGC = PATMResolveBranch(&cpu, pCurInstrGC); 2149 RTRCPTR pOrgTargetGC; 2149 2150 2150 2151 if (pTargetGC == 0) … … 2231 2232 * 2232 2233 */ 2233 PATMR3DECL(int) PATMR3DetectConflict(PVM pVM, RT GCPTR32 pInstrGC, RTGCPTR32pConflictGC)2234 PATMR3DECL(int) PATMR3DetectConflict(PVM pVM, RTRCPTR pInstrGC, RTRCPTR pConflictGC) 2234 2235 { 2235 2236 PPATCHINFO pTargetPatch = PATMFindActivePatchByEntrypoint(pVM, pConflictGC, true /* include patch hints */); … … 2268 2269 cpu.mode = (pPatch->flags & PATMFL_CODE32) ? CPUMODE_32BIT : CPUMODE_16BIT; 2269 2270 2270 ////Log(("patmRecompileCodeStream %V Gv %VGv\n", pInstrGC, pCurInstrGC));2271 ////Log(("patmRecompileCodeStream %VRv %VRv\n", pInstrGC, pCurInstrGC)); 2271 2272 2272 2273 pCurInstrHC = PATMGCVirtToHCVirt(pVM, pPatch, pCurInstrGC); … … 2303 2304 uint32_t opsizenext; 2304 2305 uint8_t *pNextInstrHC; 2305 RT GCPTR32pNextInstrGC = pCurInstrGC + opsize;2306 2307 Log(("patmRecompileCodeStream: irqs inhibited by instruction %V Gv\n", pNextInstrGC));2306 RTRCPTR pNextInstrGC = pCurInstrGC + opsize; 2307 2308 Log(("patmRecompileCodeStream: irqs inhibited by instruction %VRv\n", pNextInstrGC)); 2308 2309 2309 2310 /* Certain instructions (e.g. sti) force the next instruction to be executed before any interrupts can occur. … … 2378 2379 } 2379 2380 2380 Log(("Jump encountered target %V Gv\n", addr));2381 Log(("Jump encountered target %VRv\n", addr)); 2381 2382 2382 2383 /* We don't check if the branch target lies in a valid page as we've already done that in the analysis phase. */ … … 2407 2408 if(pTargetPatch) 2408 2409 { 2409 Log(("Found active patch at target %V Gv (%VGv) -> temporarily disabling it!!\n", addr, pTargetPatch->pPrivInstrGC));2410 Log(("Found active patch at target %VRv (%VRv) -> temporarily disabling it!!\n", addr, pTargetPatch->pPrivInstrGC)); 2410 2411 PATMR3DisablePatch(pVM, pTargetPatch->pPrivInstrGC); 2411 2412 } … … 2520 2521 } 2521 2522 temp[0] = 0xE9; //jmp 2522 *(uint32_t *)&temp[1] = (RT GCUINTPTR32)PATCHCODE_PTR_GC(pPatch) - ((RTGCUINTPTR32)pPatch->pPrivInstrGC + SIZEOF_NEARJUMP32); //return address2523 *(uint32_t *)&temp[1] = (RTRCUINTPTR)PATCHCODE_PTR_GC(pPatch) - ((RTRCUINTPTR)pPatch->pPrivInstrGC + SIZEOF_NEARJUMP32); //return address 2523 2524 } 2524 2525 rc = PGMPhysWriteGCPtrDirty(pVM, pPatch->pPrivInstrGC, temp, pPatch->cbPatchJump); … … 2593 2594 * @param pPatch Patch record 2594 2595 */ 2595 static int patmGenCallToPatch(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pTargetGC, bool fAddFixup = true)2596 static int patmGenCallToPatch(PVM pVM, PPATCHINFO pPatch, RTRCPTR pTargetGC, bool fAddFixup = true) 2596 2597 { 2597 2598 uint8_t temp[8]; … … 2640 2641 * 2641 2642 */ 2642 PATMR3DECL(int) PATMR3PatchBlock(PVM pVM, RT GCPTR32pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC,2643 PATMR3DECL(int) PATMR3PatchBlock(PVM pVM, RTRCPTR pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, 2643 2644 uint32_t uOpcode, uint32_t uOpSize, PPATMPATCHREC pPatchRec) 2644 2645 { … … 2647 2648 DISCPUSTATE cpu; 2648 2649 uint32_t orgOffsetPatchMem = ~0; 2649 RT GCPTR32pInstrStart;2650 RTRCPTR pInstrStart; 2650 2651 #ifdef LOG_ENABLED 2651 2652 uint32_t opsize; … … 2758 2759 * Insert into patch to guest lookup tree 2759 2760 */ 2760 LogFlow(("Insert %V Gv patch offset %VGv\n", pPatchRec->patch.pPrivInstrGC, pPatch->pPatchBlockOffset));2761 LogFlow(("Insert %VRv patch offset %VRv\n", pPatchRec->patch.pPrivInstrGC, pPatch->pPatchBlockOffset)); 2761 2762 pPatchRec->CoreOffset.Key = pPatch->pPatchBlockOffset; 2762 rc = RTAvlo GCPtrInsert(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, &pPatchRec->CoreOffset);2763 rc = RTAvloU32Insert(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, &pPatchRec->CoreOffset); 2763 2764 AssertMsg(rc, ("RTAvlULInsert failed for %x\n", pPatchRec->CoreOffset.Key)); 2764 2765 if (!rc) … … 2792 2793 /*uint8_t ASMInt3 = 0xCC; - unused */ 2793 2794 2794 Log(("PATMR3PatchBlock %V Gv -> int 3 callable patch.\n", pPatch->pPrivInstrGC));2795 Log(("PATMR3PatchBlock %VRv -> int 3 callable patch.\n", pPatch->pPrivInstrGC)); 2795 2796 /* Replace first opcode byte with 'int 3'. */ 2796 2797 rc = patmActivateInt3Patch(pVM, pPatch); … … 2825 2826 pPatch->pTempInfo->nrIllegalInstr = 0; 2826 2827 2827 Log(("Successfully installed %s patch at %V Gv\n", patmGetInstructionString(pPatch->opcode, pPatch->flags), pInstrGC));2828 Log(("Successfully installed %s patch at %VRv\n", patmGetInstructionString(pPatch->opcode, pPatch->flags), pInstrGC)); 2828 2829 2829 2830 pPatch->uState = PATCH_ENABLED; … … 2832 2833 failure: 2833 2834 if (pPatchRec->CoreOffset.Key) 2834 RTAvlo GCPtrRemove(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, pPatchRec->CoreOffset.Key);2835 RTAvloU32Remove(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, pPatchRec->CoreOffset.Key); 2835 2836 2836 2837 patmEmptyTree(pVM, &pPatch->FixupTree); … … 2867 2868 * 2868 2869 */ 2869 static int patmIdtHandler(PVM pVM, RT GCPTR32pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC,2870 static int patmIdtHandler(PVM pVM, RTRCPTR pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, 2870 2871 uint32_t uOpSize, PPATMPATCHREC pPatchRec) 2871 2872 { … … 2874 2875 DISCPUSTATE cpuPush, cpuJmp; 2875 2876 uint32_t opsize; 2876 RT GCPTR32pCurInstrGC = pInstrGC;2877 RTRCPTR pCurInstrGC = pInstrGC; 2877 2878 uint8_t *pCurInstrHC = pInstrHC; 2878 2879 uint32_t orgOffsetPatchMem = ~0; … … 2888 2889 if (disret && cpuPush.pCurInstr->opcode == OP_PUSH) 2889 2890 { 2890 RT GCPTR32pJmpInstrGC;2891 RTRCPTR pJmpInstrGC; 2891 2892 int rc; 2892 2893 … … 2901 2902 ) 2902 2903 { 2903 PPATMPATCHREC pJmpPatch = (PPATMPATCHREC)RTAvlo GCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pJmpInstrGC);2904 PPATMPATCHREC pJmpPatch = (PPATMPATCHREC)RTAvloU32Get(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pJmpInstrGC); 2904 2905 if (pJmpPatch == 0) 2905 2906 { … … 2908 2909 if (rc != VINF_SUCCESS) 2909 2910 goto failure; 2910 pJmpPatch = (PPATMPATCHREC)RTAvlo GCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pJmpInstrGC);2911 pJmpPatch = (PPATMPATCHREC)RTAvloU32Get(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pJmpInstrGC); 2911 2912 Assert(pJmpPatch); 2912 2913 } … … 2962 2963 Log(("Patch code ends -----------------------------------------------------\n")); 2963 2964 #endif 2964 Log(("Successfully installed IDT handler patch at %V Gv\n", pInstrGC));2965 Log(("Successfully installed IDT handler patch at %VRv\n", pInstrGC)); 2965 2966 2966 2967 /* 2967 2968 * Insert into patch to guest lookup tree 2968 2969 */ 2969 LogFlow(("Insert %V Gv patch offset %VGv\n", pPatchRec->patch.pPrivInstrGC, pPatch->pPatchBlockOffset));2970 LogFlow(("Insert %VRv patch offset %VRv\n", pPatchRec->patch.pPrivInstrGC, pPatch->pPatchBlockOffset)); 2970 2971 pPatchRec->CoreOffset.Key = pPatch->pPatchBlockOffset; 2971 rc = RTAvlo GCPtrInsert(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, &pPatchRec->CoreOffset);2972 rc = RTAvloU32Insert(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, &pPatchRec->CoreOffset); 2972 2973 AssertMsg(rc, ("RTAvlULInsert failed for %x\n", pPatchRec->CoreOffset.Key)); 2973 2974 … … 2994 2995 * 2995 2996 */ 2996 static int patmInstallTrapTrampoline(PVM pVM, RT GCPTR32pInstrGC, PPATMPATCHREC pPatchRec)2997 static int patmInstallTrapTrampoline(PVM pVM, RTRCPTR pInstrGC, PPATMPATCHREC pPatchRec) 2997 2998 { 2998 2999 PPATCHINFO pPatch = &pPatchRec->patch; … … 3045 3046 Log(("TRAP handler patch: %s", szOutput)); 3046 3047 #endif 3047 Log(("Successfully installed Trap Trampoline patch at %V Gv\n", pInstrGC));3048 Log(("Successfully installed Trap Trampoline patch at %VRv\n", pInstrGC)); 3048 3049 3049 3050 /* 3050 3051 * Insert into patch to guest lookup tree 3051 3052 */ 3052 LogFlow(("Insert %V Gv patch offset %VGv\n", pPatchRec->patch.pPrivInstrGC, pPatch->pPatchBlockOffset));3053 LogFlow(("Insert %VRv patch offset %VRv\n", pPatchRec->patch.pPrivInstrGC, pPatch->pPatchBlockOffset)); 3053 3054 pPatchRec->CoreOffset.Key = pPatch->pPatchBlockOffset; 3054 rc = RTAvlo GCPtrInsert(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, &pPatchRec->CoreOffset);3055 rc = RTAvloU32Insert(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, &pPatchRec->CoreOffset); 3055 3056 AssertMsg(rc, ("RTAvlULInsert failed for %x\n", pPatchRec->CoreOffset.Key)); 3056 3057 … … 3082 3083 * 3083 3084 */ 3084 static bool patmIsCommonIDTHandlerPatch(PVM pVM, RT GCPTR32pInstrGC)3085 static bool patmIsCommonIDTHandlerPatch(PVM pVM, RTRCPTR pInstrGC) 3085 3086 { 3086 3087 PPATMPATCHREC pRec; 3087 3088 3088 pRec = (PPATMPATCHREC)RTAvlo GCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC);3089 pRec = (PPATMPATCHREC)RTAvloU32Get(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC); 3089 3090 if (pRec && pRec->patch.flags & PATMFL_IDTHANDLER_WITHOUT_ENTRYPOINT) 3090 3091 return true; … … 3103 3104 * 3104 3105 */ 3105 static int patmDuplicateFunction(PVM pVM, RT GCPTR32pInstrGC, PPATMPATCHREC pPatchRec)3106 static int patmDuplicateFunction(PVM pVM, RTRCPTR pInstrGC, PPATMPATCHREC pPatchRec) 3106 3107 { 3107 3108 PPATCHINFO pPatch = &pPatchRec->patch; … … 3110 3111 uint32_t orgOffsetPatchMem = ~0; 3111 3112 3112 Log(("patmDuplicateFunction %V Gv\n", pInstrGC));3113 Log(("patmDuplicateFunction %VRv\n", pInstrGC)); 3113 3114 /* Save original offset (in case of failures later on). */ 3114 3115 orgOffsetPatchMem = pVM->patm.s.offPatchMem; … … 3165 3166 * Insert into patch to guest lookup tree 3166 3167 */ 3167 LogFlow(("Insert %V Gv patch offset %VGv\n", pPatchRec->patch.pPrivInstrGC, pPatch->pPatchBlockOffset));3168 LogFlow(("Insert %VRv patch offset %VRv\n", pPatchRec->patch.pPrivInstrGC, pPatch->pPatchBlockOffset)); 3168 3169 pPatchRec->CoreOffset.Key = pPatch->pPatchBlockOffset; 3169 rc = RTAvlo GCPtrInsert(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, &pPatchRec->CoreOffset);3170 AssertMsg(rc, ("RTAvlo GCPtrInsert failed for %x\n", pPatchRec->CoreOffset.Key));3170 rc = RTAvloU32Insert(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, &pPatchRec->CoreOffset); 3171 AssertMsg(rc, ("RTAvloU32Insert failed for %x\n", pPatchRec->CoreOffset.Key)); 3171 3172 if (!rc) 3172 3173 { … … 3189 3190 #endif 3190 3191 3191 Log(("Successfully installed function duplication patch at %V Gv\n", pInstrGC));3192 Log(("Successfully installed function duplication patch at %VRv\n", pInstrGC)); 3192 3193 3193 3194 patmEmptyTree(pVM, &pPatch->pTempInfo->IllegalInstrTree); … … 3200 3201 failure: 3201 3202 if (pPatchRec->CoreOffset.Key) 3202 RTAvlo GCPtrRemove(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, pPatchRec->CoreOffset.Key);3203 RTAvloU32Remove(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, pPatchRec->CoreOffset.Key); 3203 3204 3204 3205 patmEmptyTree(pVM, &pPatch->FixupTree); … … 3220 3221 3221 3222 pVM->patm.s.ulCallDepth--; 3222 Log(("patmDupicateFunction %V Gv failed!!\n", pInstrGC));3223 Log(("patmDupicateFunction %VRv failed!!\n", pInstrGC)); 3223 3224 return rc; 3224 3225 } … … 3233 3234 * 3234 3235 */ 3235 static int patmCreateTrampoline(PVM pVM, RT GCPTR32pInstrGC, PPATMPATCHREC pPatchRec)3236 static int patmCreateTrampoline(PVM pVM, RTRCPTR pInstrGC, PPATMPATCHREC pPatchRec) 3236 3237 { 3237 3238 PPATCHINFO pPatch = &pPatchRec->patch; 3238 RT GCPTR32pPage, pPatchTargetGC = 0;3239 RTRCPTR pPage, pPatchTargetGC = 0; 3239 3240 uint32_t orgOffsetPatchMem = ~0; 3240 3241 int rc = VERR_PATCHING_REFUSED; 3241 3242 3242 Log(("patmCreateTrampoline %V Gv\n", pInstrGC));3243 Log(("patmCreateTrampoline %VRv\n", pInstrGC)); 3243 3244 /* Save original offset (in case of failures later on). */ 3244 3245 orgOffsetPatchMem = pVM->patm.s.offPatchMem; … … 3248 3249 pPage = pInstrGC & PAGE_BASE_GC_MASK; 3249 3250 3250 PPATMPATCHPAGE pPatchPage = (PPATMPATCHPAGE)RTAvlo GCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, (RTGCPTR32)pPage);3251 PPATMPATCHPAGE pPatchPage = (PPATMPATCHPAGE)RTAvloU32Get(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, (RTRCPTR)pPage); 3251 3252 if (pPatchPage) 3252 3253 { … … 3271 3272 pPatchToGuestRec->fJumpTarget = true; 3272 3273 Assert(pPatchTargetGC != pPatch->pPrivInstrGC); 3273 Log(("patmCreateTrampoline: generating jump to code inside patch at %V Gv\n", pPatch->pPrivInstrGC));3274 Log(("patmCreateTrampoline: generating jump to code inside patch at %VRv\n", pPatch->pPrivInstrGC)); 3274 3275 pPatch->flags |= PATMFL_EXTERNAL_JUMP_INSIDE; 3275 3276 break; … … 3303 3304 * Insert into patch to guest lookup tree 3304 3305 */ 3305 LogFlow(("Insert %V Gv patch offset %VGv\n", pPatchRec->patch.pPrivInstrGC, pPatch->pPatchBlockOffset));3306 LogFlow(("Insert %VRv patch offset %VRv\n", pPatchRec->patch.pPrivInstrGC, pPatch->pPatchBlockOffset)); 3306 3307 pPatchRec->CoreOffset.Key = pPatch->pPatchBlockOffset; 3307 rc = RTAvlo GCPtrInsert(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, &pPatchRec->CoreOffset);3308 AssertMsg(rc, ("RTAvlo GCPtrInsert failed for %x\n", pPatchRec->CoreOffset.Key));3308 rc = RTAvloU32Insert(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, &pPatchRec->CoreOffset); 3309 AssertMsg(rc, ("RTAvloU32Insert failed for %x\n", pPatchRec->CoreOffset.Key)); 3309 3310 if (!rc) 3310 3311 { … … 3333 3334 failure: 3334 3335 if (pPatchRec->CoreOffset.Key) 3335 RTAvlo GCPtrRemove(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, pPatchRec->CoreOffset.Key);3336 RTAvloU32Remove(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, pPatchRec->CoreOffset.Key); 3336 3337 3337 3338 patmEmptyTree(pVM, &pPatch->FixupTree); … … 3367 3368 PATMR3DECL(int) PATMR3DuplicateFunctionRequest(PVM pVM, PCPUMCTX pCtx) 3368 3369 { 3369 RT GCPTR32pBranchTarget, pPage;3370 RTRCPTR pBranchTarget, pPage; 3370 3371 int rc; 3371 RT GCPTR32pPatchTargetGC = 0;3372 RTRCPTR pPatchTargetGC = 0; 3372 3373 3373 3374 pBranchTarget = pCtx->edx; … … 3377 3378 pPage = pBranchTarget & PAGE_BASE_GC_MASK; 3378 3379 3379 PPATMPATCHPAGE pPatchPage = (PPATMPATCHPAGE)RTAvlo GCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, (RTGCPTR32)pPage);3380 PPATMPATCHPAGE pPatchPage = (PPATMPATCHPAGE)RTAvloU32Get(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, (RTRCPTR)pPage); 3380 3381 if (pPatchPage) 3381 3382 { … … 3421 3422 { 3422 3423 pCtx->eax = pPatchTargetGC; 3423 pCtx->eax = pCtx->eax - (RT GCUINTPTR32)pVM->patm.s.pPatchMemGC; /* make it relative */3424 pCtx->eax = pCtx->eax - (RTRCUINTPTR)pVM->patm.s.pPatchMemGC; /* make it relative */ 3424 3425 } 3425 3426 else … … 3448 3449 * 3449 3450 */ 3450 static int patmReplaceFunctionCall(PVM pVM, DISCPUSTATE *pCpu, RT GCPTR32pInstrGC, PPATCHINFO pPatch)3451 static int patmReplaceFunctionCall(PVM pVM, DISCPUSTATE *pCpu, RTRCPTR pInstrGC, PPATCHINFO pPatch) 3451 3452 { 3452 3453 int rc = VERR_PATCHING_REFUSED; 3453 3454 DISCPUSTATE cpu; 3454 RT GCPTR32pTargetGC;3455 RTRCPTR pTargetGC; 3455 3456 PPATMPATCHREC pPatchFunction; 3456 3457 uint32_t opsize; … … 3477 3478 } 3478 3479 3479 pPatchFunction = (PPATMPATCHREC)RTAvlo GCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pTargetGC);3480 pPatchFunction = (PPATMPATCHREC)RTAvloU32Get(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pTargetGC); 3480 3481 if (pPatchFunction == NULL) 3481 3482 { … … 3503 3504 } 3504 3505 3505 pPatchFunction = (PPATMPATCHREC)RTAvlo GCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pTargetGC);3506 pPatchFunction = (PPATMPATCHREC)RTAvloU32Get(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pTargetGC); 3506 3507 break; 3507 3508 } 3508 3509 if (pPatchFunction == 0) 3509 3510 { 3510 AssertMsgFailed(("Unable to find duplicate function %V Gv\n", pTargetGC));3511 AssertMsgFailed(("Unable to find duplicate function %VRv\n", pTargetGC)); 3511 3512 rc = VERR_PATCHING_REFUSED; 3512 3513 goto failure; … … 3536 3537 #endif 3537 3538 3538 Log(("Successfully installed function replacement patch at %V Gv\n", pInstrGC));3539 Log(("Successfully installed function replacement patch at %VRv\n", pInstrGC)); 3539 3540 3540 3541 pPatch->uState = PATCH_ENABLED; … … 3560 3561 * 3561 3562 */ 3562 static int patmPatchMMIOInstr(PVM pVM, RT GCPTR32pInstrGC, DISCPUSTATE *pCpu, PPATCHINFO pPatch)3563 static int patmPatchMMIOInstr(PVM pVM, RTRCPTR pInstrGC, DISCPUSTATE *pCpu, PPATCHINFO pPatch) 3563 3564 { 3564 3565 uint8_t *pPB; … … 3581 3582 3582 3583 /* Add relocation record for cached data access. */ 3583 if (patmPatchAddReloc32(pVM, pPatch, &pPB[pCpu->opsize - sizeof(RT GCPTR32)], FIXUP_ABSOLUTE, pPatch->pPrivInstrGC, pVM->patm.s.mmio.pCachedData) != VINF_SUCCESS)3584 if (patmPatchAddReloc32(pVM, pPatch, &pPB[pCpu->opsize - sizeof(RTRCPTR)], FIXUP_ABSOLUTE, pPatch->pPrivInstrGC, pVM->patm.s.mmio.pCachedData) != VINF_SUCCESS) 3584 3585 { 3585 3586 Log(("Relocation failed for cached mmio address!!\n")); … … 3599 3600 3600 3601 /* Replace address with that of the cached item. */ 3601 rc = PGMPhysWriteGCPtrDirty(pVM, pInstrGC + pCpu->opsize - sizeof(RT GCPTR32), &pVM->patm.s.mmio.pCachedData, sizeof(RTGCPTR32));3602 rc = PGMPhysWriteGCPtrDirty(pVM, pInstrGC + pCpu->opsize - sizeof(RTRCPTR), &pVM->patm.s.mmio.pCachedData, sizeof(RTRCPTR)); 3602 3603 AssertRC(rc); 3603 3604 if (VBOX_FAILURE(rc)) … … 3635 3636 * 3636 3637 */ 3637 static int patmPatchPATMMMIOInstr(PVM pVM, RT GCPTR32pInstrGC, PPATCHINFO pPatch)3638 static int patmPatchPATMMMIOInstr(PVM pVM, RTRCPTR pInstrGC, PPATCHINFO pPatch) 3638 3639 { 3639 3640 DISCPUSTATE cpu; … … 3667 3668 3668 3669 /* Add relocation record for cached data access. */ 3669 if (patmPatchAddReloc32(pVM, pPatch, &pInstrHC[cpu.opsize - sizeof(RT GCPTR32)], FIXUP_ABSOLUTE) != VINF_SUCCESS)3670 if (patmPatchAddReloc32(pVM, pPatch, &pInstrHC[cpu.opsize - sizeof(RTRCPTR)], FIXUP_ABSOLUTE) != VINF_SUCCESS) 3670 3671 { 3671 3672 Log(("Relocation failed for cached mmio address!!\n")); … … 3673 3674 } 3674 3675 /* Replace address with that of the cached item. */ 3675 *(RT GCPTR32 *)&pInstrHC[cpu.opsize - sizeof(RTGCPTR32)] = pVM->patm.s.mmio.pCachedData;3676 *(RTRCPTR *)&pInstrHC[cpu.opsize - sizeof(RTRCPTR)] = pVM->patm.s.mmio.pCachedData; 3676 3677 3677 3678 /* Lowest and highest address for write monitoring. */ … … 3748 3749 * 3749 3750 */ 3750 PATMR3DECL(int) PATMR3PatchInstrInt3(PVM pVM, RT GCPTR32pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, DISCPUSTATE *pCpu, PPATCHINFO pPatch)3751 PATMR3DECL(int) PATMR3PatchInstrInt3(PVM pVM, RTRCPTR pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, DISCPUSTATE *pCpu, PPATCHINFO pPatch) 3751 3752 { 3752 3753 uint8_t ASMInt3 = 0xCC; … … 3803 3804 * 3804 3805 */ 3805 int patmPatchJump(PVM pVM, RT GCPTR32pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, DISCPUSTATE *pCpu, PPATMPATCHREC pPatchRec)3806 int patmPatchJump(PVM pVM, RTRCPTR pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, DISCPUSTATE *pCpu, PPATMPATCHREC pPatchRec) 3806 3807 { 3807 3808 PPATCHINFO pPatch = &pPatchRec->patch; … … 3878 3879 * references the target instruction in the conflict patch. 3879 3880 */ 3880 RT GCPTR32pJmpDest = PATMR3GuestGCPtrToPatchGCPtr(pVM, pInstrGC + pCpu->opsize + (int32_t)pCpu->param1.parval);3881 3882 AssertMsg(pJmpDest, ("PATMR3GuestGCPtrToPatchGCPtr failed for %V Gv\n", pInstrGC + pCpu->opsize + (int32_t)pCpu->param1.parval));3881 RTRCPTR pJmpDest = PATMR3GuestGCPtrToPatchGCPtr(pVM, pInstrGC + pCpu->opsize + (int32_t)pCpu->param1.parval); 3882 3883 AssertMsg(pJmpDest, ("PATMR3GuestGCPtrToPatchGCPtr failed for %VRv\n", pInstrGC + pCpu->opsize + (int32_t)pCpu->param1.parval)); 3883 3884 pPatch->pPatchJumpDestGC = pJmpDest; 3884 3885 … … 3896 3897 #endif 3897 3898 3898 Log(("Successfully installed %s patch at %V Gv\n", patmGetInstructionString(pPatch->opcode, pPatch->flags), pInstrGC));3899 Log(("Successfully installed %s patch at %VRv\n", patmGetInstructionString(pPatch->opcode, pPatch->flags), pInstrGC)); 3899 3900 3900 3901 STAM_COUNTER_INC(&pVM->patm.s.StatInstalledJump); … … 3924 3925 * @param flags Patch flags 3925 3926 */ 3926 PATMR3DECL(int) PATMR3AddHint(PVM pVM, RT GCPTR32pInstrGC, uint32_t flags)3927 PATMR3DECL(int) PATMR3AddHint(PVM pVM, RTRCPTR pInstrGC, uint32_t flags) 3927 3928 { 3928 3929 Assert(pInstrGC); 3929 3930 Assert(flags == PATMFL_CODE32); 3930 3931 3931 Log(("PATMR3AddHint %V Gv\n", pInstrGC));3932 Log(("PATMR3AddHint %VRv\n", pInstrGC)); 3932 3933 return PATMR3InstallPatch(pVM, pInstrGC, PATMFL_CODE32 | PATMFL_INSTR_HINT); 3933 3934 } … … 3943 3944 * @note returns failure if patching is not allowed or possible 3944 3945 */ 3945 PATMR3DECL(int) PATMR3InstallPatch(PVM pVM, RT GCPTR32pInstrGC, uint64_t flags)3946 PATMR3DECL(int) PATMR3InstallPatch(PVM pVM, RTRCPTR pInstrGC, uint64_t flags) 3946 3947 { 3947 3948 DISCPUSTATE cpu; … … 3966 3967 { 3967 3968 PPATCHINFO pConflictPatch = PATMFindActivePatchByEntrypoint(pVM, pInstrGC); 3968 AssertReleaseMsg(pConflictPatch == 0, ("Unable to patch overwritten instruction at %V Gv (%VGv)\n", pInstrGC, pConflictPatch->pPrivInstrGC));3969 AssertReleaseMsg(pConflictPatch == 0, ("Unable to patch overwritten instruction at %VRv (%VRv)\n", pInstrGC, pConflictPatch->pPrivInstrGC)); 3969 3970 if (pConflictPatch != 0) 3970 3971 return VERR_PATCHING_REFUSED; … … 3986 3987 if (CPUMGetGuestCPL(pVM, CPUMCTX2CORE(pCtx)) == 0) 3987 3988 { 3988 RT GCPTR32pInstrGCFlat = SELMToFlat(pVM, pCtx->eflags, pCtx->cs, &pCtx->csHid, pInstrGC);3989 RTRCPTR pInstrGCFlat = SELMToFlat(pVM, pCtx->eflags, pCtx->cs, &pCtx->csHid, pInstrGC); 3989 3990 if (pInstrGCFlat != pInstrGC) 3990 3991 { 3991 Log(("PATMR3InstallPatch: code selector not wide open: %04x:%V Gv != %VGv eflags=%08x\n", pCtx->cs, pInstrGCFlat, pInstrGC, pCtx->eflags.u32));3992 Log(("PATMR3InstallPatch: code selector not wide open: %04x:%VRv != %VRv eflags=%08x\n", pCtx->cs, pInstrGCFlat, pInstrGC, pCtx->eflags.u32)); 3992 3993 return VERR_PATCHING_REFUSED; 3993 3994 } … … 4005 4006 && (flags & PATMFL_MMIO_ACCESS)) 4006 4007 { 4007 RT GCUINTPTR32offset;4008 RTRCUINTPTR offset; 4008 4009 void *pvPatchCoreOffset; 4009 4010 4010 4011 /* Find the patch record. */ 4011 4012 offset = pInstrGC - pVM->patm.s.pPatchMemGC; 4012 pvPatchCoreOffset = RTAvlo GCPtrGetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, offset, false);4013 pvPatchCoreOffset = RTAvloU32GetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, offset, false); 4013 4014 if (pvPatchCoreOffset == NULL) 4014 4015 { 4015 AssertMsgFailed(("PATMR3InstallPatch: patch not found at address %V Gv!!\n", pInstrGC));4016 AssertMsgFailed(("PATMR3InstallPatch: patch not found at address %VRv!!\n", pInstrGC)); 4016 4017 return VERR_PATCH_NOT_FOUND; //fatal error 4017 4018 } … … 4023 4024 AssertReturn(!PATMIsPatchGCAddr(pVM, pInstrGC), VERR_PATCHING_REFUSED); 4024 4025 4025 pPatchRec = (PPATMPATCHREC)RTAvlo GCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC);4026 pPatchRec = (PPATMPATCHREC)RTAvloU32Get(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC); 4026 4027 if (pPatchRec) 4027 4028 { … … 4034 4035 if (pPatchRec->patch.uState == PATCH_DISABLE_PENDING) 4035 4036 { 4036 Log(("PATMR3InstallPatch: disable operation is pending for patch at %V Gv\n", pPatchRec->patch.pPrivInstrGC));4037 Log(("PATMR3InstallPatch: disable operation is pending for patch at %VRv\n", pPatchRec->patch.pPrivInstrGC)); 4037 4038 PATMR3DisablePatch(pVM, pPatchRec->patch.pPrivInstrGC); 4038 4039 Assert(pPatchRec->patch.uState == PATCH_DISABLED); … … 4044 4045 if (pPatchRec->patch.flags & PATMFL_INSTR_HINT) 4045 4046 { 4046 Log(("Enabling HINTED patch %V Gv\n", pInstrGC));4047 Log(("Enabling HINTED patch %VRv\n", pInstrGC)); 4047 4048 pPatchRec->patch.flags &= ~PATMFL_INSTR_HINT; 4048 4049 } 4049 4050 else 4050 Log(("Enabling patch %V Gv again\n", pInstrGC));4051 Log(("Enabling patch %VRv again\n", pInstrGC)); 4051 4052 4052 4053 /** @todo we shouldn't disable and enable patches too often (it's relatively cheap, but pointless if it always happens) */ … … 4067 4068 { 4068 4069 /* Patch must have been overwritten; remove it and pretend nothing happened. */ 4069 Log(("Patch an existing patched instruction?!? (%V Gv)\n", pInstrGC));4070 Log(("Patch an existing patched instruction?!? (%VRv)\n", pInstrGC)); 4070 4071 if (pPatchRec->patch.flags & (PATMFL_DUPLICATE_FUNCTION|PATMFL_IDTHANDLER|PATMFL_MMIO_ACCESS|PATMFL_INT3_REPLACEMENT|PATMFL_INT3_REPLACEMENT_BLOCK)) 4071 4072 { … … 4080 4081 else 4081 4082 { 4082 AssertMsg(pPatchRec->patch.uState == PATCH_REFUSED || pPatchRec->patch.uState == PATCH_UNUSABLE, ("Patch an existing patched instruction?!? (%V Gv, state=%d)\n", pInstrGC, pPatchRec->patch.uState));4083 AssertMsg(pPatchRec->patch.uState == PATCH_REFUSED || pPatchRec->patch.uState == PATCH_UNUSABLE, ("Patch an existing patched instruction?!? (%VRv, state=%d)\n", pInstrGC, pPatchRec->patch.uState)); 4083 4084 /* already tried it once! */ 4084 4085 return VERR_PATCHING_REFUSED; … … 4094 4095 pPatchRec->Core.Key = pInstrGC; 4095 4096 pPatchRec->patch.uState = PATCH_REFUSED; //default 4096 rc = RTAvlo GCPtrInsert(&pVM->patm.s.PatchLookupTreeHC->PatchTree, &pPatchRec->Core);4097 rc = RTAvloU32Insert(&pVM->patm.s.PatchLookupTreeHC->PatchTree, &pPatchRec->Core); 4097 4098 Assert(rc); 4098 4099 … … 4128 4129 * Close proximity to an unusable patch is a possible hint that this patch would turn out to be dangerous too! 4129 4130 */ 4130 PPATMPATCHREC pPatchNear = (PPATMPATCHREC)RTAvlo GCPtrGetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTree, (pInstrGC + SIZEOF_NEARJUMP32 - 1), false);4131 PPATMPATCHREC pPatchNear = (PPATMPATCHREC)RTAvloU32GetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTree, (pInstrGC + SIZEOF_NEARJUMP32 - 1), false); 4131 4132 if (pPatchNear) 4132 4133 { 4133 4134 if (pPatchNear->patch.uState == PATCH_UNUSABLE && pInstrGC < pPatchNear->patch.pPrivInstrGC && pInstrGC + SIZEOF_NEARJUMP32 > pPatchNear->patch.pPrivInstrGC) 4134 4135 { 4135 Log(("Dangerous patch; would overwrite the ususable patch at %V Gv\n", pPatchNear->patch.pPrivInstrGC));4136 Log(("Dangerous patch; would overwrite the ususable patch at %VRv\n", pPatchNear->patch.pPrivInstrGC)); 4136 4137 4137 4138 pPatchRec->patch.uState = PATCH_UNUSABLE; … … 4237 4238 { 4238 4239 if (rc == VINF_SUCCESS) 4239 Log(("PATMR3InstallPatch GUEST: %s %V Gv code32=%d\n", patmGetInstructionString(pPatchRec->patch.opcode, pPatchRec->patch.flags), pInstrGC, (flags & PATMFL_CODE32) ? 1 : 0));4240 Log(("PATMR3InstallPatch GUEST: %s %VRv code32=%d\n", patmGetInstructionString(pPatchRec->patch.opcode, pPatchRec->patch.flags), pInstrGC, (flags & PATMFL_CODE32) ? 1 : 0)); 4240 4241 return rc; 4241 4242 } … … 4255 4256 if (rc == VINF_SUCCESS) 4256 4257 { 4257 Log(("PATMR3InstallPatch GUEST: %s %V Gv code32=%d\n", patmGetInstructionString(pPatchRec->patch.opcode, pPatchRec->patch.flags), pInstrGC, (flags & PATMFL_CODE32) ? 1 : 0));4258 Log(("PATMR3InstallPatch GUEST: %s %VRv code32=%d\n", patmGetInstructionString(pPatchRec->patch.opcode, pPatchRec->patch.flags), pInstrGC, (flags & PATMFL_CODE32) ? 1 : 0)); 4258 4259 return VINF_SUCCESS; 4259 4260 } … … 4292 4293 case OP_PUSHF: 4293 4294 case OP_CLI: 4294 Log(("PATMR3InstallPatch %s %V Gv code32=%d\n", patmGetInstructionString(pPatchRec->patch.opcode, pPatchRec->patch.flags), pInstrGC, (flags & PATMFL_CODE32) ? 1 : 0));4295 Log(("PATMR3InstallPatch %s %VRv code32=%d\n", patmGetInstructionString(pPatchRec->patch.opcode, pPatchRec->patch.flags), pInstrGC, (flags & PATMFL_CODE32) ? 1 : 0)); 4295 4296 rc = PATMR3PatchBlock(pVM, pInstrGC, pInstrHC, cpu.pCurInstr->opcode, opsize, pPatchRec); 4296 4297 break; … … 4335 4336 pVM->patm.s.pPatchedInstrGCHighest = pPatchRec->patch.pInstrGCHighest; 4336 4337 4337 Log(("Patch lowest %V Gv highest %VGv\n", pPatchRec->patch.pInstrGCLowest, pPatchRec->patch.pInstrGCHighest));4338 Log(("Global lowest %V Gv highest %VGv\n", pVM->patm.s.pPatchedInstrGCLowest, pVM->patm.s.pPatchedInstrGCHighest));4338 Log(("Patch lowest %VRv highest %VRv\n", pPatchRec->patch.pInstrGCLowest, pPatchRec->patch.pInstrGCHighest)); 4339 Log(("Global lowest %VRv highest %VRv\n", pVM->patm.s.pPatchedInstrGCLowest, pVM->patm.s.pPatchedInstrGCHighest)); 4339 4340 4340 4341 STAM_COUNTER_ADD(&pVM->patm.s.StatInstalled, 1); … … 4355 4356 { 4356 4357 STAMR3RegisterCallback(pVM, &pPatchRec->patch, STAMVISIBILITY_NOT_GUI, STAMUNIT_GOOD_BAD, patmResetStat, patmPrintStat, "Patch statistics", 4357 "/PATM/Stats/Patch/0x%V Gv", pPatchRec->patch.pPrivInstrGC);4358 "/PATM/Stats/Patch/0x%VRv", pPatchRec->patch.pPrivInstrGC); 4358 4359 #ifndef DEBUG_sandervl 4359 4360 /* Full breakdown for the GUI. */ 4360 4361 STAMR3RegisterF(pVM, &pVM->patm.s.pStatsHC[pPatchRec->patch.uPatchIdx], STAMTYPE_RATIO_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_GOOD_BAD, PATMPatchType(pVM, &pPatchRec->patch), 4361 "/PATM/Stats/PatchBD/0x%V Gv", pPatchRec->patch.pPrivInstrGC);4362 STAMR3RegisterF(pVM, &pPatchRec->patch.cbPatchBlockSize,STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, NULL, "/PATM/Stats/PatchBD/0x%V Gv/cbPatchBlockSize", pPatchRec->patch.pPrivInstrGC);4363 STAMR3RegisterF(pVM, &pPatchRec->patch.cbPatchJump, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, NULL, "/PATM/Stats/PatchBD/0x%V Gv/cbPatchJump", pPatchRec->patch.pPrivInstrGC);4364 STAMR3RegisterF(pVM, &pPatchRec->patch.cbPrivInstr, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, NULL, "/PATM/Stats/PatchBD/0x%V Gv/cbPrivInstr", pPatchRec->patch.pPrivInstrGC);4365 STAMR3RegisterF(pVM, &pPatchRec->patch.cCodeWrites, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, NULL, "/PATM/Stats/PatchBD/0x%V Gv/cCodeWrites", pPatchRec->patch.pPrivInstrGC);4366 STAMR3RegisterF(pVM, &pPatchRec->patch.cInvalidWrites, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, NULL, "/PATM/Stats/PatchBD/0x%V Gv/cInvalidWrites", pPatchRec->patch.pPrivInstrGC);4367 STAMR3RegisterF(pVM, &pPatchRec->patch.cTraps, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, NULL, "/PATM/Stats/PatchBD/0x%V Gv/cTraps", pPatchRec->patch.pPrivInstrGC);4368 STAMR3RegisterF(pVM, &pPatchRec->patch.flags, STAMTYPE_X32, STAMVISIBILITY_ALWAYS, STAMUNIT_NONE, NULL, "/PATM/Stats/PatchBD/0x%V Gv/flags", pPatchRec->patch.pPrivInstrGC);4369 STAMR3RegisterF(pVM, &pPatchRec->patch.nrJumpRecs, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, NULL, "/PATM/Stats/PatchBD/0x%V Gv/nrJumpRecs", pPatchRec->patch.pPrivInstrGC);4370 STAMR3RegisterF(pVM, &pPatchRec->patch.nrFixups, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, NULL, "/PATM/Stats/PatchBD/0x%V Gv/nrFixups", pPatchRec->patch.pPrivInstrGC);4371 STAMR3RegisterF(pVM, &pPatchRec->patch.opcode, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, NULL, "/PATM/Stats/PatchBD/0x%V Gv/opcode", pPatchRec->patch.pPrivInstrGC);4372 STAMR3RegisterF(pVM, &pPatchRec->patch.uOldState, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_NONE, NULL, "/PATM/Stats/PatchBD/0x%V Gv/uOldState", pPatchRec->patch.pPrivInstrGC);4373 STAMR3RegisterF(pVM, &pPatchRec->patch.uOpMode, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_NONE, NULL, "/PATM/Stats/PatchBD/0x%V Gv/uOpMode", pPatchRec->patch.pPrivInstrGC);4362 "/PATM/Stats/PatchBD/0x%VRv", pPatchRec->patch.pPrivInstrGC); 4363 STAMR3RegisterF(pVM, &pPatchRec->patch.cbPatchBlockSize,STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, NULL, "/PATM/Stats/PatchBD/0x%VRv/cbPatchBlockSize", pPatchRec->patch.pPrivInstrGC); 4364 STAMR3RegisterF(pVM, &pPatchRec->patch.cbPatchJump, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, NULL, "/PATM/Stats/PatchBD/0x%VRv/cbPatchJump", pPatchRec->patch.pPrivInstrGC); 4365 STAMR3RegisterF(pVM, &pPatchRec->patch.cbPrivInstr, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, NULL, "/PATM/Stats/PatchBD/0x%VRv/cbPrivInstr", pPatchRec->patch.pPrivInstrGC); 4366 STAMR3RegisterF(pVM, &pPatchRec->patch.cCodeWrites, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, NULL, "/PATM/Stats/PatchBD/0x%VRv/cCodeWrites", pPatchRec->patch.pPrivInstrGC); 4367 STAMR3RegisterF(pVM, &pPatchRec->patch.cInvalidWrites, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, NULL, "/PATM/Stats/PatchBD/0x%VRv/cInvalidWrites", pPatchRec->patch.pPrivInstrGC); 4368 STAMR3RegisterF(pVM, &pPatchRec->patch.cTraps, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, NULL, "/PATM/Stats/PatchBD/0x%VRv/cTraps", pPatchRec->patch.pPrivInstrGC); 4369 STAMR3RegisterF(pVM, &pPatchRec->patch.flags, STAMTYPE_X32, STAMVISIBILITY_ALWAYS, STAMUNIT_NONE, NULL, "/PATM/Stats/PatchBD/0x%VRv/flags", pPatchRec->patch.pPrivInstrGC); 4370 STAMR3RegisterF(pVM, &pPatchRec->patch.nrJumpRecs, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, NULL, "/PATM/Stats/PatchBD/0x%VRv/nrJumpRecs", pPatchRec->patch.pPrivInstrGC); 4371 STAMR3RegisterF(pVM, &pPatchRec->patch.nrFixups, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, NULL, "/PATM/Stats/PatchBD/0x%VRv/nrFixups", pPatchRec->patch.pPrivInstrGC); 4372 STAMR3RegisterF(pVM, &pPatchRec->patch.opcode, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, NULL, "/PATM/Stats/PatchBD/0x%VRv/opcode", pPatchRec->patch.pPrivInstrGC); 4373 STAMR3RegisterF(pVM, &pPatchRec->patch.uOldState, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_NONE, NULL, "/PATM/Stats/PatchBD/0x%VRv/uOldState", pPatchRec->patch.pPrivInstrGC); 4374 STAMR3RegisterF(pVM, &pPatchRec->patch.uOpMode, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_NONE, NULL, "/PATM/Stats/PatchBD/0x%VRv/uOpMode", pPatchRec->patch.pPrivInstrGC); 4374 4375 /// @todo change the state to be a callback so we can get a state mnemonic instead. 4375 STAMR3RegisterF(pVM, &pPatchRec->patch.uState, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_NONE, NULL, "/PATM/Stats/PatchBD/0x%V Gv/uState", pPatchRec->patch.pPrivInstrGC);4376 STAMR3RegisterF(pVM, &pPatchRec->patch.uState, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_NONE, NULL, "/PATM/Stats/PatchBD/0x%VRv/uState", pPatchRec->patch.pPrivInstrGC); 4376 4377 #endif 4377 4378 } … … 4389 4390 * @param pInstrGC Instruction address 4390 4391 */ 4391 static uint32_t patmGetInstrSize(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pInstrGC)4392 static uint32_t patmGetInstrSize(PVM pVM, PPATCHINFO pPatch, RTRCPTR pInstrGC) 4392 4393 { 4393 4394 uint8_t *pInstrHC; … … 4416 4417 * @param pPatch Patch record 4417 4418 */ 4418 int patmAddPatchToPage(PVM pVM, RT GCUINTPTR32pPage, PPATCHINFO pPatch)4419 int patmAddPatchToPage(PVM pVM, RTRCUINTPTR pPage, PPATCHINFO pPatch) 4419 4420 { 4420 4421 PPATMPATCHPAGE pPatchPage; 4421 4422 int rc; 4422 4423 4423 Log(("patmAddPatchToPage: insert patch %VHv to page %V Gv\n", pPatch, pPage));4424 4425 pPatchPage = (PPATMPATCHPAGE)RTAvlo GCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, pPage);4424 Log(("patmAddPatchToPage: insert patch %VHv to page %VRv\n", pPatch, pPage)); 4425 4426 pPatchPage = (PPATMPATCHPAGE)RTAvloU32Get(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, pPage); 4426 4427 if (pPatchPage) 4427 4428 { … … 4466 4467 pPatchPage->aPatch[0] = pPatch; 4467 4468 4468 rc = RTAvlo GCPtrInsert(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, &pPatchPage->Core);4469 rc = RTAvloU32Insert(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, &pPatchPage->Core); 4469 4470 Assert(rc); 4470 4471 pVM->patm.s.cPageRecords++; … … 4475 4476 4476 4477 /* Get the closest guest instruction (from below) */ 4477 PRECGUESTTOPATCH pGuestToPatchRec = (PRECGUESTTOPATCH)RTAvl GCPtrGetBestFit(&pPatch->Guest2PatchAddrTree, pPage, true);4478 PRECGUESTTOPATCH pGuestToPatchRec = (PRECGUESTTOPATCH)RTAvlU32GetBestFit(&pPatch->Guest2PatchAddrTree, pPage, true); 4478 4479 Assert(pGuestToPatchRec); 4479 4480 if (pGuestToPatchRec) 4480 4481 { 4481 LogFlow(("patmAddPatchToPage: lowest patch page address %V Gv current lowest %VGv\n", pGuestToPatchRec->Core.Key, pPatchPage->pLowestAddrGC));4482 LogFlow(("patmAddPatchToPage: lowest patch page address %VRv current lowest %VRv\n", pGuestToPatchRec->Core.Key, pPatchPage->pLowestAddrGC)); 4482 4483 if ( pPatchPage->pLowestAddrGC == 0 4483 || pPatchPage->pLowestAddrGC > (RT GCPTR32)pGuestToPatchRec->Core.Key)4484 { 4485 RT GCUINTPTR32offset;4486 4487 pPatchPage->pLowestAddrGC = (RT GCPTR32)pGuestToPatchRec->Core.Key;4484 || pPatchPage->pLowestAddrGC > (RTRCPTR)pGuestToPatchRec->Core.Key) 4485 { 4486 RTRCUINTPTR offset; 4487 4488 pPatchPage->pLowestAddrGC = (RTRCPTR)pGuestToPatchRec->Core.Key; 4488 4489 4489 4490 offset = pPatchPage->pLowestAddrGC & PAGE_OFFSET_MASK; … … 4492 4493 { 4493 4494 /* Get the closest guest instruction (from above) */ 4494 pGuestToPatchRec = (PRECGUESTTOPATCH)RTAvl GCPtrGetBestFit(&pPatch->Guest2PatchAddrTree, pPage-1, false);4495 pGuestToPatchRec = (PRECGUESTTOPATCH)RTAvlU32GetBestFit(&pPatch->Guest2PatchAddrTree, pPage-1, false); 4495 4496 4496 4497 if (pGuestToPatchRec) 4497 4498 { 4498 uint32_t size = patmGetInstrSize(pVM, pPatch, (RT GCPTR32)pGuestToPatchRec->Core.Key);4499 if ((RT GCUINTPTR32)pGuestToPatchRec->Core.Key + size > pPage)4499 uint32_t size = patmGetInstrSize(pVM, pPatch, (RTRCPTR)pGuestToPatchRec->Core.Key); 4500 if ((RTRCUINTPTR)pGuestToPatchRec->Core.Key + size > pPage) 4500 4501 { 4501 4502 pPatchPage->pLowestAddrGC = pPage; 4502 LogFlow(("patmAddPatchToPage: new lowest %V Gv\n", pPatchPage->pLowestAddrGC));4503 LogFlow(("patmAddPatchToPage: new lowest %VRv\n", pPatchPage->pLowestAddrGC)); 4503 4504 } 4504 4505 } … … 4508 4509 4509 4510 /* Get the closest guest instruction (from above) */ 4510 pGuestToPatchRec = (PRECGUESTTOPATCH)RTAvl GCPtrGetBestFit(&pPatch->Guest2PatchAddrTree, pPage+PAGE_SIZE-1, false);4511 pGuestToPatchRec = (PRECGUESTTOPATCH)RTAvlU32GetBestFit(&pPatch->Guest2PatchAddrTree, pPage+PAGE_SIZE-1, false); 4511 4512 Assert(pGuestToPatchRec); 4512 4513 if (pGuestToPatchRec) 4513 4514 { 4514 LogFlow(("patmAddPatchToPage: highest patch page address %V Gv current lowest %VGv\n", pGuestToPatchRec->Core.Key, pPatchPage->pHighestAddrGC));4515 LogFlow(("patmAddPatchToPage: highest patch page address %VRv current lowest %VRv\n", pGuestToPatchRec->Core.Key, pPatchPage->pHighestAddrGC)); 4515 4516 if ( pPatchPage->pHighestAddrGC == 0 4516 || pPatchPage->pHighestAddrGC <= (RT GCPTR32)pGuestToPatchRec->Core.Key)4517 { 4518 pPatchPage->pHighestAddrGC = (RT GCPTR32)pGuestToPatchRec->Core.Key;4517 || pPatchPage->pHighestAddrGC <= (RTRCPTR)pGuestToPatchRec->Core.Key) 4518 { 4519 pPatchPage->pHighestAddrGC = (RTRCPTR)pGuestToPatchRec->Core.Key; 4519 4520 /* Increase by instruction size. */ 4520 4521 uint32_t size = patmGetInstrSize(pVM, pPatch, pPatchPage->pHighestAddrGC); 4521 4522 //// Assert(size); 4522 4523 pPatchPage->pHighestAddrGC += size; 4523 LogFlow(("patmAddPatchToPage: new highest %V Gv\n", pPatchPage->pHighestAddrGC));4524 LogFlow(("patmAddPatchToPage: new highest %VRv\n", pPatchPage->pHighestAddrGC)); 4524 4525 } 4525 4526 } … … 4536 4537 * @param pPatch Patch record 4537 4538 */ 4538 int patmRemovePatchFromPage(PVM pVM, RT GCUINTPTR32pPage, PPATCHINFO pPatch)4539 int patmRemovePatchFromPage(PVM pVM, RTRCUINTPTR pPage, PPATCHINFO pPatch) 4539 4540 { 4540 4541 PPATMPATCHPAGE pPatchPage; 4541 4542 int rc; 4542 4543 4543 pPatchPage = (PPATMPATCHPAGE)RTAvlo GCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, pPage);4544 pPatchPage = (PPATMPATCHPAGE)RTAvloU32Get(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, pPage); 4544 4545 Assert(pPatchPage); 4545 4546 … … 4549 4550 Assert(pPatchPage->cCount <= pPatchPage->cMaxPatches); 4550 4551 4551 Log(("patmRemovePatchPage: remove patch %VHv from page %V Gv\n", pPatch, pPage));4552 Log(("patmRemovePatchPage: remove patch %VHv from page %VRv\n", pPatch, pPage)); 4552 4553 if (pPatchPage->cCount > 1) 4553 4554 { … … 4568 4569 memcpy(&pPatchPage->aPatch[i], &pPatchPage->aPatch[i+1], sizeof(PPATCHINFO)*(pPatchPage->cCount - (i+1))); 4569 4570 } 4570 AssertMsg(i < pPatchPage->cCount, ("Unable to find patch %VHv in page %V Gv\n", pPatch, pPage));4571 AssertMsg(i < pPatchPage->cCount, ("Unable to find patch %VHv in page %VRv\n", pPatch, pPage)); 4571 4572 4572 4573 pPatchPage->cCount--; … … 4576 4577 PPATMPATCHPAGE pPatchNode; 4577 4578 4578 Log(("patmRemovePatchFromPage %V Gv\n", pPage));4579 Log(("patmRemovePatchFromPage %VRv\n", pPage)); 4579 4580 4580 4581 STAM_COUNTER_INC(&pVM->patm.s.StatPatchPageRemoved); 4581 pPatchNode = (PPATMPATCHPAGE)RTAvlo GCPtrRemove(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, pPage);4582 pPatchNode = (PPATMPATCHPAGE)RTAvloU32Remove(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, pPage); 4582 4583 Assert(pPatchNode && pPatchNode == pPatchPage); 4583 4584 … … 4602 4603 { 4603 4604 int rc; 4604 RT GCUINTPTR32pPatchPageStart, pPatchPageEnd, pPage;4605 RTRCUINTPTR pPatchPageStart, pPatchPageEnd, pPage; 4605 4606 4606 4607 /* Insert the pages that contain patched instructions into a lookup tree for detecting self-modifying code. */ 4607 pPatchPageStart = (RT GCUINTPTR32)pPatch->pInstrGCLowest & PAGE_BASE_GC_MASK;4608 pPatchPageEnd = (RT GCUINTPTR32)pPatch->pInstrGCHighest & PAGE_BASE_GC_MASK;4608 pPatchPageStart = (RTRCUINTPTR)pPatch->pInstrGCLowest & PAGE_BASE_GC_MASK; 4609 pPatchPageEnd = (RTRCUINTPTR)pPatch->pInstrGCHighest & PAGE_BASE_GC_MASK; 4609 4610 4610 4611 /** @todo optimize better (large gaps between current and next used page) */ … … 4612 4613 { 4613 4614 /* Get the closest guest instruction (from above) */ 4614 PRECGUESTTOPATCH pGuestToPatchRec = (PRECGUESTTOPATCH)RTAvl GCPtrGetBestFit(&pPatch->Guest2PatchAddrTree, pPage, true);4615 PRECGUESTTOPATCH pGuestToPatchRec = (PRECGUESTTOPATCH)RTAvlU32GetBestFit(&pPatch->Guest2PatchAddrTree, pPage, true); 4615 4616 if ( pGuestToPatchRec 4616 4617 && PAGE_ADDRESS(pGuestToPatchRec->Core.Key) == PAGE_ADDRESS(pPage) … … 4636 4637 { 4637 4638 int rc; 4638 RT GCUINTPTR32pPatchPageStart, pPatchPageEnd, pPage;4639 RTRCUINTPTR pPatchPageStart, pPatchPageEnd, pPage; 4639 4640 4640 4641 /* Insert the pages that contain patched instructions into a lookup tree for detecting self-modifying code. */ 4641 pPatchPageStart = (RT GCUINTPTR32)pPatch->pInstrGCLowest & PAGE_BASE_GC_MASK;4642 pPatchPageEnd = (RT GCUINTPTR32)pPatch->pInstrGCHighest & PAGE_BASE_GC_MASK;4642 pPatchPageStart = (RTRCUINTPTR)pPatch->pInstrGCLowest & PAGE_BASE_GC_MASK; 4643 pPatchPageEnd = (RTRCUINTPTR)pPatch->pInstrGCHighest & PAGE_BASE_GC_MASK; 4643 4644 4644 4645 for(pPage = pPatchPageStart; pPage <= pPatchPageEnd; pPage += PAGE_SIZE) 4645 4646 { 4646 4647 /* Get the closest guest instruction (from above) */ 4647 PRECGUESTTOPATCH pGuestToPatchRec = (PRECGUESTTOPATCH)RTAvl GCPtrGetBestFit(&pPatch->Guest2PatchAddrTree, pPage, true);4648 PRECGUESTTOPATCH pGuestToPatchRec = (PRECGUESTTOPATCH)RTAvlU32GetBestFit(&pPatch->Guest2PatchAddrTree, pPage, true); 4648 4649 if ( pGuestToPatchRec 4649 4650 && PAGE_ADDRESS(pGuestToPatchRec->Core.Key) == PAGE_ADDRESS(pPage) /** @todo bird: PAGE_ADDRESS is for the current context really. check out these. */ … … 4668 4669 * 4669 4670 */ 4670 PATMR3DECL(int) PATMR3PatchWrite(PVM pVM, RT GCPTR32GCPtr, uint32_t cbWrite)4671 { 4672 RT GCUINTPTR32pWritePageStart, pWritePageEnd, pPage;4673 4674 Log(("PATMR3PatchWrite %V Gv %x\n", GCPtr, cbWrite));4671 PATMR3DECL(int) PATMR3PatchWrite(PVM pVM, RTRCPTR GCPtr, uint32_t cbWrite) 4672 { 4673 RTRCUINTPTR pWritePageStart, pWritePageEnd, pPage; 4674 4675 Log(("PATMR3PatchWrite %VRv %x\n", GCPtr, cbWrite)); 4675 4676 4676 4677 Assert(VM_IS_EMT(pVM)); … … 4684 4685 STAM_PROFILE_ADV_START(&pVM->patm.s.StatPatchWrite, a); 4685 4686 4686 pWritePageStart = (RT GCUINTPTR32)GCPtr & PAGE_BASE_GC_MASK;4687 pWritePageEnd = ((RT GCUINTPTR32)GCPtr + cbWrite - 1) & PAGE_BASE_GC_MASK;4687 pWritePageStart = (RTRCUINTPTR)GCPtr & PAGE_BASE_GC_MASK; 4688 pWritePageEnd = ((RTRCUINTPTR)GCPtr + cbWrite - 1) & PAGE_BASE_GC_MASK; 4688 4689 4689 4690 for (pPage = pWritePageStart; pPage <= pWritePageEnd; pPage += PAGE_SIZE) 4690 4691 { 4691 4692 loop_start: 4692 PPATMPATCHPAGE pPatchPage = (PPATMPATCHPAGE)RTAvlo GCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, (RTGCPTR32)pPage);4693 PPATMPATCHPAGE pPatchPage = (PPATMPATCHPAGE)RTAvloU32Get(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, (RTRCPTR)pPage); 4693 4694 if (pPatchPage) 4694 4695 { … … 4697 4698 4698 4699 /* Quick check to see if the write is in the patched part of the page */ 4699 if ( pPatchPage->pLowestAddrGC > (RT GCPTR32)((RTGCUINTPTR32)GCPtr + cbWrite - 1)4700 if ( pPatchPage->pLowestAddrGC > (RTRCPTR)((RTRCUINTPTR)GCPtr + cbWrite - 1) 4700 4701 || pPatchPage->pHighestAddrGC < GCPtr) 4701 4702 { … … 4708 4709 { 4709 4710 PPATCHINFO pPatch = pPatchPage->aPatch[i]; 4710 RT GCPTR32pPatchInstrGC;4711 RTRCPTR pPatchInstrGC; 4711 4712 //unused: bool fForceBreak = false; 4712 4713 … … 4715 4716 for (uint32_t j=0; j<cbWrite; j++) 4716 4717 { 4717 RT GCPTR32 pGuestPtrGC = (RTGCPTR32)((RTGCUINTPTR32)GCPtr + j);4718 RTRCPTR pGuestPtrGC = (RTRCPTR)((RTRCUINTPTR)GCPtr + j); 4718 4719 4719 4720 if ( pPatch->cbPatchJump … … 4734 4735 if (!pPatchInstrGC) 4735 4736 { 4736 RT GCPTR32pClosestInstrGC;4737 RTRCPTR pClosestInstrGC; 4737 4738 uint32_t size; 4738 4739 … … 4758 4759 if (pPatchToGuestRec && !pPatchToGuestRec->fDirty) 4759 4760 { 4760 Log(("PATMR3PatchWrite: Found patched instruction %V Gv -> %VGv\n", pGuestPtrGC, pPatchInstrGC));4761 Log(("PATMR3PatchWrite: Found patched instruction %VRv -> %VRv\n", pGuestPtrGC, pPatchInstrGC)); 4761 4762 4762 4763 if (++pPatch->cCodeWrites > PATM_MAX_CODE_WRITES) 4763 4764 { 4764 LogRel(("PATM: Disable block at %V Gv - write %VGv-%VGv\n", pPatch->pPrivInstrGC, pGuestPtrGC, pGuestPtrGC+cbWrite));4765 LogRel(("PATM: Disable block at %VRv - write %VRv-%VRv\n", pPatch->pPrivInstrGC, pGuestPtrGC, pGuestPtrGC+cbWrite)); 4765 4766 4766 4767 PATMR3MarkDirtyPatch(pVM, pPatch); … … 4795 4796 */ 4796 4797 invalid_write_loop_start: 4797 pPatchPage = (PPATMPATCHPAGE)RTAvlo GCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, (RTGCPTR32)pPage);4798 pPatchPage = (PPATMPATCHPAGE)RTAvloU32Get(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, (RTRCPTR)pPage); 4798 4799 4799 4800 if (pPatchPage) … … 4808 4809 if (pPatch->flags & PATMFL_IDTHANDLER) 4809 4810 { 4810 LogRel(("PATM: Stop monitoring IDT handler pages at %V Gv - invalid write %VGv-%VGv (this is not a fatal error)\n", pPatch->pPrivInstrGC, GCPtr, GCPtr+cbWrite));4811 LogRel(("PATM: Stop monitoring IDT handler pages at %VRv - invalid write %VRv-%VRv (this is not a fatal error)\n", pPatch->pPrivInstrGC, GCPtr, GCPtr+cbWrite)); 4811 4812 4812 4813 Assert(pPatch->flags & PATMFL_CODE_MONITORED); … … 4816 4817 else 4817 4818 { 4818 LogRel(("PATM: Disable block at %V Gv - invalid write %VGv-%VGv \n", pPatch->pPrivInstrGC, GCPtr, GCPtr+cbWrite));4819 LogRel(("PATM: Disable block at %VRv - invalid write %VRv-%VRv \n", pPatch->pPrivInstrGC, GCPtr, GCPtr+cbWrite)); 4819 4820 PATMR3MarkDirtyPatch(pVM, pPatch); 4820 4821 } … … 4841 4842 /** @note Currently only called by CSAMR3FlushPage; optimization to avoid having to double check if the physical address has changed 4842 4843 */ 4843 PATMR3DECL(int) PATMR3FlushPage(PVM pVM, RT GCPTR32addr)4844 PATMR3DECL(int) PATMR3FlushPage(PVM pVM, RTRCPTR addr) 4844 4845 { 4845 4846 addr &= PAGE_BASE_GC_MASK; 4846 4847 4847 PPATMPATCHPAGE pPatchPage = (PPATMPATCHPAGE)RTAvlo GCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, addr);4848 PPATMPATCHPAGE pPatchPage = (PPATMPATCHPAGE)RTAvloU32Get(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPage, addr); 4848 4849 if (pPatchPage) 4849 4850 { … … 4857 4858 PPATCHINFO pPatch = pPatchPage->aPatch[i]; 4858 4859 4859 Log(("PATMR3FlushPage %V Gv remove patch at %VGv\n", addr, pPatch->pPrivInstrGC));4860 Log(("PATMR3FlushPage %VRv remove patch at %VRv\n", addr, pPatch->pPrivInstrGC)); 4860 4861 PATMR3MarkDirtyPatch(pVM, pPatch); 4861 4862 } … … 4873 4874 * @param pInstrGC Guest context pointer to instruction 4874 4875 */ 4875 PATMR3DECL(bool) PATMR3HasBeenPatched(PVM pVM, RT GCPTR32pInstrGC)4876 PATMR3DECL(bool) PATMR3HasBeenPatched(PVM pVM, RTRCPTR pInstrGC) 4876 4877 { 4877 4878 PPATMPATCHREC pPatchRec; 4878 pPatchRec = (PPATMPATCHREC)RTAvlo GCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC);4879 pPatchRec = (PPATMPATCHREC)RTAvloU32Get(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC); 4879 4880 if (pPatchRec && pPatchRec->patch.uState == PATCH_ENABLED) 4880 4881 return true; … … 4891 4892 * 4892 4893 */ 4893 PATMR3DECL(int) PATMR3QueryOpcode(PVM pVM, RT GCPTR32pInstrGC, uint8_t *pByte)4894 PATMR3DECL(int) PATMR3QueryOpcode(PVM pVM, RTRCPTR pInstrGC, uint8_t *pByte) 4894 4895 { 4895 4896 PPATMPATCHREC pPatchRec; … … 4905 4906 } 4906 4907 4907 pPatchRec = (PPATMPATCHREC)RTAvlo GCPtrGetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC, false);4908 pPatchRec = (PPATMPATCHREC)RTAvloU32GetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC, false); 4908 4909 // if the patch is enabled and the pointer lies within 5 bytes of this priv instr ptr, then we've got a hit! 4909 4910 if ( pPatchRec … … 4912 4913 && pInstrGC < pPatchRec->patch.pPrivInstrGC + pPatchRec->patch.cbPatchJump) 4913 4914 { 4914 RT GCPTR32offset = pInstrGC - pPatchRec->patch.pPrivInstrGC;4915 RTRCPTR offset = pInstrGC - pPatchRec->patch.pPrivInstrGC; 4915 4916 *pByte = pPatchRec->patch.aPrivInstr[offset]; 4916 4917 4917 4918 if (pPatchRec->patch.cbPatchJump == 1) 4918 4919 { 4919 Log(("PATMR3QueryOpcode: returning opcode %2X for instruction at %V Gv\n", *pByte, pInstrGC));4920 Log(("PATMR3QueryOpcode: returning opcode %2X for instruction at %VRv\n", *pByte, pInstrGC)); 4920 4921 } 4921 4922 STAM_COUNTER_ADD(&pVM->patm.s.StatNrOpcodeRead, 1); … … 4935 4936 * 4936 4937 */ 4937 PATMR3DECL(int) PATMR3DisablePatch(PVM pVM, RT GCPTR32pInstrGC)4938 PATMR3DECL(int) PATMR3DisablePatch(PVM pVM, RTRCPTR pInstrGC) 4938 4939 { 4939 4940 PPATMPATCHREC pPatchRec; 4940 4941 PPATCHINFO pPatch; 4941 4942 4942 Log(("PATMR3DisablePatch: %V Gv\n", pInstrGC));4943 pPatchRec = (PPATMPATCHREC)RTAvlo GCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC);4943 Log(("PATMR3DisablePatch: %VRv\n", pInstrGC)); 4944 pPatchRec = (PPATMPATCHREC)RTAvloU32Get(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC); 4944 4945 if (pPatchRec) 4945 4946 { … … 4963 4964 { 4964 4965 TRPMR3SetGuestTrapHandler(pVM, iGate, TRPM_INVALID_HANDLER); 4965 LogRel(("PATM: Disabling IDT %x patch handler %V Gv\n", iGate, pInstrGC));4966 LogRel(("PATM: Disabling IDT %x patch handler %VRv\n", iGate, pInstrGC)); 4966 4967 } 4967 4968 } … … 4971 4972 && pPatch->uState == PATCH_ENABLED) 4972 4973 { 4973 Log(("Invalidate patch at %V Gv (HC=%VGv)\n", PATCHCODE_PTR_GC(pPatch), PATCHCODE_PTR_HC(pPatch)));4974 Log(("Invalidate patch at %VRv (HC=%VRv)\n", PATCHCODE_PTR_GC(pPatch), PATCHCODE_PTR_HC(pPatch))); 4974 4975 pPatch->bDirtyOpcode = *PATCHCODE_PTR_HC(pPatch); 4975 4976 *PATCHCODE_PTR_HC(pPatch) = 0xCC; … … 4984 4985 if (pPatch->uState != PATCH_REFUSED) 4985 4986 { 4986 AssertMsg(pPatch->pPrivInstrHC, ("Invalid HC pointer?!? (%V Gv)\n", pInstrGC));4987 AssertMsg(pPatch->pPrivInstrHC, ("Invalid HC pointer?!? (%VRv)\n", pInstrGC)); 4987 4988 Assert(pPatch->cbPatchJump); 4988 4989 … … 5000 5001 if (rc == VINF_SUCCESS) 5001 5002 { 5002 RT GCINTPTR displ = (RTGCUINTPTR32)PATCHCODE_PTR_GC(pPatch) - ((RTGCUINTPTR32)pPatch->pPrivInstrGC + SIZEOF_NEARJUMP32);5003 RTRCINTPTR displ = (RTRCUINTPTR)PATCHCODE_PTR_GC(pPatch) - ((RTRCUINTPTR)pPatch->pPrivInstrGC + SIZEOF_NEARJUMP32); 5003 5004 5004 5005 if ( temp[0] != 0xE9 /* jmp opcode */ 5005 || *(RT GCINTPTR *)(&temp[1]) != displ5006 || *(RTRCINTPTR *)(&temp[1]) != displ 5006 5007 ) 5007 5008 { … … 5073 5074 } 5074 5075 5075 Log(("PATMR3DisablePatch: disabled patch at %V Gv\n", pInstrGC));5076 Log(("PATMR3DisablePatch: disabled patch at %VRv\n", pInstrGC)); 5076 5077 return VINF_SUCCESS; 5077 5078 } … … 5090 5091 * 5091 5092 */ 5092 static int patmDisableUnusablePatch(PVM pVM, RT GCPTR32 pInstrGC, RTGCPTR32pConflictAddr, PPATCHINFO pConflictPatch)5093 static int patmDisableUnusablePatch(PVM pVM, RTRCPTR pInstrGC, RTRCPTR pConflictAddr, PPATCHINFO pConflictPatch) 5093 5094 { 5094 5095 #ifdef PATM_RESOLVE_CONFLICTS_WITH_JUMP_PATCHES … … 5116 5117 if (pConflictPatch->flags & PATMFL_INSTR_HINT) 5117 5118 { 5118 Log(("Enabling HINTED patch %V Gv\n", pConflictPatch->pPrivInstrGC));5119 Log(("Enabling HINTED patch %VRv\n", pConflictPatch->pPrivInstrGC)); 5119 5120 pConflictPatch->flags &= ~PATMFL_INSTR_HINT; 5120 5121 rc = PATMR3EnablePatch(pVM, pConflictPatch->pPrivInstrGC); … … 5128 5129 if (VBOX_SUCCESS(rc)) 5129 5130 { 5130 Log(("PATM -> CONFLICT: Installed JMP patch for patch conflict at %V Gv\n", pInstrGC));5131 Log(("PATM -> CONFLICT: Installed JMP patch for patch conflict at %VRv\n", pInstrGC)); 5131 5132 STAM_COUNTER_INC(&pVM->patm.s.StatFixedConflicts); 5132 5133 return VINF_SUCCESS; … … 5138 5139 { 5139 5140 /* Turn it into an int3 patch; our GC trap handler will call the generated code manually. */ 5140 Log(("PATM -> CONFLICT: Found active patch at instruction %V Gv with target %VGv -> turn into int 3 patch!!\n", pInstrGC, pConflictPatch->pPrivInstrGC));5141 Log(("PATM -> CONFLICT: Found active patch at instruction %VRv with target %VRv -> turn into int 3 patch!!\n", pInstrGC, pConflictPatch->pPrivInstrGC)); 5141 5142 int rc = PATMR3DisablePatch(pVM, pConflictPatch->pPrivInstrGC); 5142 5143 if (rc == VWRN_PATCH_REMOVED) … … 5161 5162 else 5162 5163 { 5163 Log(("PATM -> CONFLICT: Found active patch at instruction %V Gv with target %VGv -> DISABLING it!!\n", pInstrGC, pConflictPatch->pPrivInstrGC));5164 Log(("PATM -> CONFLICT: Found active patch at instruction %VRv with target %VRv -> DISABLING it!!\n", pInstrGC, pConflictPatch->pPrivInstrGC)); 5164 5165 int rc = PATMR3DisablePatch(pVM, pConflictPatch->pPrivInstrGC); 5165 5166 if (rc == VWRN_PATCH_REMOVED) … … 5188 5189 * 5189 5190 */ 5190 PATMR3DECL(int) PATMR3EnablePatch(PVM pVM, RT GCPTR32pInstrGC)5191 PATMR3DECL(int) PATMR3EnablePatch(PVM pVM, RTRCPTR pInstrGC) 5191 5192 { 5192 5193 PPATMPATCHREC pPatchRec; 5193 5194 PPATCHINFO pPatch; 5194 5195 5195 Log(("PATMR3EnablePatch %V Gv\n", pInstrGC));5196 pPatchRec = (PPATMPATCHREC)RTAvlo GCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC);5196 Log(("PATMR3EnablePatch %VRv\n", pInstrGC)); 5197 pPatchRec = (PPATMPATCHREC)RTAvloU32Get(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC); 5197 5198 if (pPatchRec) 5198 5199 { … … 5285 5286 } 5286 5287 else 5287 Log(("PATMR3EnablePatch: Unable to enable patch %V Gv with state %d\n", pInstrGC, pPatch->uState));5288 Log(("PATMR3EnablePatch: Unable to enable patch %VRv with state %d\n", pInstrGC, pPatch->uState)); 5288 5289 5289 5290 return rc; … … 5314 5315 if (pPatchRec->patch.pPatchBlockOffset) 5315 5316 { 5316 PAVLO GCPTRNODECORE pNode;5317 5318 pNode = RTAvlo GCPtrRemove(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, pPatchRec->patch.pPatchBlockOffset);5317 PAVLOU32NODECORE pNode; 5318 5319 pNode = RTAvloU32Remove(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, pPatchRec->patch.pPatchBlockOffset); 5319 5320 Assert(pNode); 5320 5321 } … … 5362 5363 5363 5364 /** @note might fail, because it has already been removed (e.g. during reset). */ 5364 RTAvlo GCPtrRemove(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pPatchRec->Core.Key);5365 RTAvloU32Remove(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pPatchRec->Core.Key); 5365 5366 5366 5367 /* Free the patch record */ … … 5380 5381 PPATCHINFO pPatch; 5381 5382 int rc; 5382 RT GCPTR32pInstrGC = pPatchRec->patch.pPrivInstrGC;5383 5384 Log(("patmR3RefreshPatch: attempt to refresh patch at %V Gv\n", pInstrGC));5383 RTRCPTR pInstrGC = pPatchRec->patch.pPrivInstrGC; 5384 5385 Log(("patmR3RefreshPatch: attempt to refresh patch at %VRv\n", pInstrGC)); 5385 5386 5386 5387 pPatch = &pPatchRec->patch; … … 5398 5399 5399 5400 /** Kick it out of the lookup tree to make sure PATMR3InstallPatch doesn't fail (hack alert) */ 5400 RTAvlo GCPtrRemove(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pPatchRec->Core.Key);5401 RTAvloU32Remove(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pPatchRec->Core.Key); 5401 5402 #ifdef VBOX_WITH_STATISTICS 5402 5403 if (PATM_STAT_INDEX_IS_VALID(pPatchRec->patch.uPatchIdx)) … … 5428 5429 if (VBOX_SUCCESS(rc)) 5429 5430 { 5430 RT GCPTR32pPatchTargetGC;5431 RTRCPTR pPatchTargetGC; 5431 5432 PPATMPATCHREC pNewPatchRec; 5432 5433 … … 5448 5449 goto failure; 5449 5450 5450 pNewPatchRec = (PPATMPATCHREC)RTAvlo GCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC);5451 pNewPatchRec = (PPATMPATCHREC)RTAvloU32Get(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC); 5451 5452 Assert(pNewPatchRec); /* can't fail */ 5452 5453 … … 5456 5457 5457 5458 /* Put the new patch back into the tree, because removing the old one kicked this one out. (hack alert) */ 5458 RTAvlo GCPtrInsert(&pVM->patm.s.PatchLookupTreeHC->PatchTree, &pNewPatchRec->Core);5459 5460 LogRel(("PATM: patmR3RefreshPatch: succeeded to refresh patch at %V Gv \n", pInstrGC));5459 RTAvloU32Insert(&pVM->patm.s.PatchLookupTreeHC->PatchTree, &pNewPatchRec->Core); 5460 5461 LogRel(("PATM: patmR3RefreshPatch: succeeded to refresh patch at %VRv \n", pInstrGC)); 5461 5462 STAM_COUNTER_INC(&pVM->patm.s.StatPatchRefreshSuccess); 5462 5463 } … … 5465 5466 if (VBOX_FAILURE(rc)) 5466 5467 { 5467 LogRel(("PATM: patmR3RefreshPatch: failed to refresh patch at %V Gv. Reactiving old one. \n", pInstrGC));5468 LogRel(("PATM: patmR3RefreshPatch: failed to refresh patch at %VRv. Reactiving old one. \n", pInstrGC)); 5468 5469 5469 5470 /* Remove the new inactive patch */ … … 5472 5473 5473 5474 /* Put the old patch back into the tree (or else it won't be saved) (hack alert) */ 5474 RTAvlo GCPtrInsert(&pVM->patm.s.PatchLookupTreeHC->PatchTree, &pPatchRec->Core);5475 RTAvloU32Insert(&pVM->patm.s.PatchLookupTreeHC->PatchTree, &pPatchRec->Core); 5475 5476 5476 5477 /* Enable again in case the dirty instruction is near the end and there are safe code paths. */ … … 5492 5493 * 5493 5494 */ 5494 PPATCHINFO PATMFindActivePatchByEntrypoint(PVM pVM, RT GCPTR32pInstrGC, bool fIncludeHints)5495 { 5496 PPATMPATCHREC pPatchRec = (PPATMPATCHREC)RTAvlo GCPtrGetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC, false);5495 PPATCHINFO PATMFindActivePatchByEntrypoint(PVM pVM, RTRCPTR pInstrGC, bool fIncludeHints) 5496 { 5497 PPATMPATCHREC pPatchRec = (PPATMPATCHREC)RTAvloU32GetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC, false); 5497 5498 /* if the patch is enabled, the pointer is not indentical to the privileged patch ptr and it lies within 5 bytes of this priv instr ptr, then we've got a hit! */ 5498 5499 if (pPatchRec) … … 5503 5504 && pInstrGC < pPatchRec->patch.pPrivInstrGC + pPatchRec->patch.cbPatchJump) 5504 5505 { 5505 Log(("Found active patch at %V Gv (org %VGv)\n", pInstrGC, pPatchRec->patch.pPrivInstrGC));5506 Log(("Found active patch at %VRv (org %VRv)\n", pInstrGC, pPatchRec->patch.pPrivInstrGC)); 5506 5507 return &pPatchRec->patch; 5507 5508 } … … 5513 5514 && pInstrGC < pPatchRec->patch.pPrivInstrGC + pPatchRec->patch.cbPatchJump) 5514 5515 { 5515 Log(("Found HINT patch at %V Gv (org %VGv)\n", pInstrGC, pPatchRec->patch.pPrivInstrGC));5516 Log(("Found HINT patch at %VRv (org %VRv)\n", pInstrGC, pPatchRec->patch.pPrivInstrGC)); 5516 5517 return &pPatchRec->patch; 5517 5518 } … … 5528 5529 * @param pPatchAddr Guest context patch address (if true) 5529 5530 */ 5530 PATMR3DECL(bool) PATMR3IsInsidePatchJump(PVM pVM, RT GCPTR32pAddr, PRTGCPTR32 pPatchAddr)5531 { 5532 RT GCPTR32addr;5531 PATMR3DECL(bool) PATMR3IsInsidePatchJump(PVM pVM, RTRCPTR pAddr, PRTGCPTR32 pPatchAddr) 5532 { 5533 RTRCPTR addr; 5533 5534 PPATCHINFO pPatch; 5534 5535 … … 5559 5560 * 5560 5561 */ 5561 PATMR3DECL(int) PATMR3RemovePatch(PVM pVM, RT GCPTR32pInstrGC)5562 PATMR3DECL(int) PATMR3RemovePatch(PVM pVM, RTRCPTR pInstrGC) 5562 5563 { 5563 5564 PPATMPATCHREC pPatchRec; 5564 5565 5565 pPatchRec = (PPATMPATCHREC)RTAvlo GCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC);5566 pPatchRec = (PPATMPATCHREC)RTAvloU32Get(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC); 5566 5567 if (pPatchRec) 5567 5568 { … … 5589 5590 if (pPatch->pPatchBlockOffset) 5590 5591 { 5591 Log(("Invalidate patch at %V Gv (HC=%VGv)\n", PATCHCODE_PTR_GC(pPatch), PATCHCODE_PTR_HC(pPatch)));5592 Log(("Invalidate patch at %VRv (HC=%VRv)\n", PATCHCODE_PTR_GC(pPatch), PATCHCODE_PTR_HC(pPatch))); 5592 5593 pPatch->bDirtyOpcode = *PATCHCODE_PTR_HC(pPatch); 5593 5594 *PATCHCODE_PTR_HC(pPatch) = 0xCC; … … 5625 5626 * @param pPatchGC GC address in patch block 5626 5627 */ 5627 RT GCPTR32patmPatchGCPtr2GuestGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pPatchGC)5628 RTRCPTR patmPatchGCPtr2GuestGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pPatchGC) 5628 5629 { 5629 5630 Assert(pPatch->Patch2GuestAddrTree); … … 5644 5645 * 5645 5646 */ 5646 RT GCPTR32patmGuestGCPtrToPatchGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t*) pInstrGC)5647 RTRCPTR patmGuestGCPtrToPatchGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t*) pInstrGC) 5647 5648 { 5648 5649 if (pPatch->Guest2PatchAddrTree) 5649 5650 { 5650 PRECGUESTTOPATCH pGuestToPatchRec = (PRECGUESTTOPATCH)RTAvl GCPtrGet(&pPatch->Guest2PatchAddrTree, pInstrGC);5651 PRECGUESTTOPATCH pGuestToPatchRec = (PRECGUESTTOPATCH)RTAvlU32Get(&pPatch->Guest2PatchAddrTree, pInstrGC); 5651 5652 if (pGuestToPatchRec) 5652 5653 return pVM->patm.s.pPatchMemGC + pGuestToPatchRec->PatchOffset; … … 5664 5665 * 5665 5666 */ 5666 RT GCPTR32patmGuestGCPtrToClosestPatchGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t*) pInstrGC)5667 { 5668 PRECGUESTTOPATCH pGuestToPatchRec = (PRECGUESTTOPATCH)RTAvl GCPtrGetBestFit(&pPatch->Guest2PatchAddrTree, pInstrGC, false);5667 RTRCPTR patmGuestGCPtrToClosestPatchGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t*) pInstrGC) 5668 { 5669 PRECGUESTTOPATCH pGuestToPatchRec = (PRECGUESTTOPATCH)RTAvlU32GetBestFit(&pPatch->Guest2PatchAddrTree, pInstrGC, false); 5669 5670 if (pGuestToPatchRec) 5670 5671 return pVM->patm.s.pPatchMemGC + pGuestToPatchRec->PatchOffset; … … 5680 5681 * 5681 5682 */ 5682 PATMR3DECL(RT GCPTR32) PATMR3GuestGCPtrToPatchGCPtr(PVM pVM, RCPTRTYPE(uint8_t*) pInstrGC)5683 { 5684 PPATMPATCHREC pPatchRec = (PPATMPATCHREC)RTAvlo GCPtrGetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC, false);5683 PATMR3DECL(RTRCPTR) PATMR3GuestGCPtrToPatchGCPtr(PVM pVM, RCPTRTYPE(uint8_t*) pInstrGC) 5684 { 5685 PPATMPATCHREC pPatchRec = (PPATMPATCHREC)RTAvloU32GetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC, false); 5685 5686 if (pPatchRec && pPatchRec->patch.uState == PATCH_ENABLED && pInstrGC >= pPatchRec->patch.pPrivInstrGC) 5686 5687 { … … 5699 5700 * 5700 5701 */ 5701 PATMR3DECL(RT GCPTR32) PATMR3PatchToGCPtr(PVM pVM, RTGCPTR32pPatchGC, PATMTRANSSTATE *pEnmState)5702 PATMR3DECL(RTRCPTR) PATMR3PatchToGCPtr(PVM pVM, RTRCPTR pPatchGC, PATMTRANSSTATE *pEnmState) 5702 5703 { 5703 5704 PPATMPATCHREC pPatchRec; 5704 5705 void *pvPatchCoreOffset; 5705 RT GCPTR32pPrivInstrGC;5706 RTRCPTR pPrivInstrGC; 5706 5707 5707 5708 Assert(PATMIsPatchGCAddr(pVM, pPatchGC)); 5708 pvPatchCoreOffset = RTAvlo GCPtrGetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, pPatchGC - pVM->patm.s.pPatchMemGC, false);5709 pvPatchCoreOffset = RTAvloU32GetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, pPatchGC - pVM->patm.s.pPatchMemGC, false); 5709 5710 if (pvPatchCoreOffset == 0) 5710 5711 { 5711 Log(("PATMR3PatchToGCPtr failed for %V Gv offset %x\n", pPatchGC, pPatchGC - pVM->patm.s.pPatchMemGC));5712 Log(("PATMR3PatchToGCPtr failed for %VRv offset %x\n", pPatchGC, pPatchGC - pVM->patm.s.pPatchMemGC)); 5712 5713 return 0; 5713 5714 } … … 5720 5721 || pPatchRec->patch.uState == PATCH_DISABLE_PENDING 5721 5722 || pPatchRec->patch.uState == PATCH_UNUSABLE), 5722 ("pPrivInstrGC=%V Gv uState=%d\n", pPrivInstrGC, pPatchRec->patch.uState));5723 ("pPrivInstrGC=%VRv uState=%d\n", pPrivInstrGC, pPatchRec->patch.uState)); 5723 5724 5724 5725 if ( !pPrivInstrGC … … 5765 5766 * @param pAddrGC Guest context address 5766 5767 */ 5767 PATMR3DECL(RT GCPTR32) PATMR3QueryPatchGCPtr(PVM pVM, RTGCPTR32pAddrGC)5768 PATMR3DECL(RTRCPTR) PATMR3QueryPatchGCPtr(PVM pVM, RTRCPTR pAddrGC) 5768 5769 { 5769 5770 PPATMPATCHREC pPatchRec; 5770 5771 5771 5772 // Find the patch record 5772 pPatchRec = (PPATMPATCHREC)RTAvlo GCPtrGet(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pAddrGC);5773 pPatchRec = (PPATMPATCHREC)RTAvloU32Get(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pAddrGC); 5773 5774 /** @todo we should only use patches that are enabled! always did this, but it's incorrect! */ 5774 5775 if (pPatchRec && (pPatchRec->patch.uState == PATCH_ENABLED || pPatchRec->patch.uState == PATCH_DIRTY)) … … 5788 5789 * @param pEip GC pointer of trapping instruction 5789 5790 */ 5790 static int patmR3HandleDirtyInstr(PVM pVM, PCPUMCTX pCtx, PPATMPATCHREC pPatch, PRECPATCHTOGUEST pPatchToGuestRec, RT GCPTR32pEip)5791 static int patmR3HandleDirtyInstr(PVM pVM, PCPUMCTX pCtx, PPATMPATCHREC pPatch, PRECPATCHTOGUEST pPatchToGuestRec, RTRCPTR pEip) 5791 5792 { 5792 5793 DISCPUSTATE CpuOld, CpuNew; 5793 5794 uint8_t *pPatchInstrHC, *pCurPatchInstrHC; 5794 5795 int rc; 5795 RT GCPTR32pCurInstrGC, pCurPatchInstrGC;5796 RTRCPTR pCurInstrGC, pCurPatchInstrGC; 5796 5797 uint32_t cbDirty; 5797 5798 PRECPATCHTOGUEST pRec; 5798 5799 5799 Log(("patmR3HandleDirtyInstr: dirty instruction at %V Gv (%VGv)\n", pEip, pPatchToGuestRec->pOrgInstrGC));5800 Log(("patmR3HandleDirtyInstr: dirty instruction at %VRv (%VRv)\n", pEip, pPatchToGuestRec->pOrgInstrGC)); 5800 5801 5801 5802 pRec = pPatchToGuestRec; … … 5810 5811 if (pRec->fJumpTarget) 5811 5812 { 5812 LogRel(("PATM: patmR3HandleDirtyInstr: dirty instruction at %V Gv (%VGv) ignored, because instruction in function was reused as target of jump\n", pEip, pPatchToGuestRec->pOrgInstrGC));5813 LogRel(("PATM: patmR3HandleDirtyInstr: dirty instruction at %VRv (%VRv) ignored, because instruction in function was reused as target of jump\n", pEip, pPatchToGuestRec->pOrgInstrGC)); 5813 5814 pRec->fDirty = false; 5814 5815 return VERR_PATCHING_REFUSED; … … 5867 5868 ) 5868 5869 { 5869 RT GCPTR32pTargetGC = PATMResolveBranch(&CpuNew, pCurInstrGC);5870 RTRCPTR pTargetGC = PATMResolveBranch(&CpuNew, pCurInstrGC); 5870 5871 5871 5872 if ( pTargetGC >= pPatchToGuestRec->pOrgInstrGC … … 5938 5939 if (VBOX_FAILURE(rc)) 5939 5940 { 5940 LogRel(("PATM: Failed to refresh dirty patch at %V Gv. Disabling it.\n", pPatch->patch.pPrivInstrGC));5941 LogRel(("PATM: Failed to refresh dirty patch at %VRv. Disabling it.\n", pPatch->patch.pPrivInstrGC)); 5941 5942 } 5942 5943 /* Even if we succeed, we must go back to the original instruction as the patched one could be invalid. */ … … 5956 5957 * @param ppNewEip GC pointer to new instruction 5957 5958 */ 5958 PATMR3DECL(int) PATMR3HandleTrap(PVM pVM, PCPUMCTX pCtx, RT GCPTR32pEip, RTGCPTR *ppNewEip)5959 PATMR3DECL(int) PATMR3HandleTrap(PVM pVM, PCPUMCTX pCtx, RTRCPTR pEip, RTGCPTR *ppNewEip) 5959 5960 { 5960 5961 PPATMPATCHREC pPatch = 0; 5961 5962 void *pvPatchCoreOffset; 5962 RT GCUINTPTR32offset;5963 RT GCPTR32pNewEip;5963 RTRCUINTPTR offset; 5964 RTRCPTR pNewEip; 5964 5965 int rc ; 5965 5966 PRECPATCHTOGUEST pPatchToGuestRec = 0; … … 5973 5974 /** @note there might not be a patch to guest translation record (global function) */ 5974 5975 offset = pEip - pVM->patm.s.pPatchMemGC; 5975 pvPatchCoreOffset = RTAvlo GCPtrGetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, offset, false);5976 pvPatchCoreOffset = RTAvloU32GetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, offset, false); 5976 5977 if (pvPatchCoreOffset) 5977 5978 { … … 5980 5981 if (pPatch->patch.uState == PATCH_DIRTY) 5981 5982 { 5982 Log(("PATMR3HandleTrap: trap in dirty patch at %V Gv\n", pEip));5983 Log(("PATMR3HandleTrap: trap in dirty patch at %VRv\n", pEip)); 5983 5984 if (pPatch->patch.flags & (PATMFL_DUPLICATE_FUNCTION|PATMFL_CALLABLE_AS_FUNCTION)) 5984 5985 { … … 5990 5991 if (pPatch->patch.uState == PATCH_DISABLED) 5991 5992 { 5992 Log(("PATMR3HandleTrap: trap in disabled patch at %V Gv\n", pEip));5993 Log(("PATMR3HandleTrap: trap in disabled patch at %VRv\n", pEip)); 5993 5994 if (pPatch->patch.flags & (PATMFL_DUPLICATE_FUNCTION|PATMFL_CALLABLE_AS_FUNCTION)) 5994 5995 { … … 6000 6001 if (pPatch->patch.uState == PATCH_DISABLE_PENDING) 6001 6002 { 6002 RT GCPTR32pPrivInstrGC = pPatch->patch.pPrivInstrGC;6003 6004 Log(("PATMR3HandleTrap: disable operation is pending for patch at %V Gv\n", pPatch->patch.pPrivInstrGC));6003 RTRCPTR pPrivInstrGC = pPatch->patch.pPrivInstrGC; 6004 6005 Log(("PATMR3HandleTrap: disable operation is pending for patch at %VRv\n", pPatch->patch.pPrivInstrGC)); 6005 6006 rc = PATMR3DisablePatch(pVM, pPatch->patch.pPrivInstrGC); 6006 AssertReleaseMsg(rc != VWRN_PATCH_REMOVED, ("PATMR3DisablePatch removed patch at %V Gv\n", pPrivInstrGC));6007 AssertReleaseMsg(rc != VWRN_PATCH_REMOVED, ("PATMR3DisablePatch removed patch at %VRv\n", pPrivInstrGC)); 6007 6008 AssertMsg(pPatch->patch.uState == PATCH_DISABLED || pPatch->patch.uState == PATCH_UNUSABLE, ("Unexpected failure to disable patch state=%d rc=%Vrc\n", pPatch->patch.uState, rc)); 6008 6009 } 6009 6010 6010 6011 pPatchToGuestRec = (PRECPATCHTOGUEST)RTAvlU32GetBestFit(&pPatch->patch.Patch2GuestAddrTree, offset, false); 6011 AssertReleaseMsg(pPatchToGuestRec, ("PATMR3HandleTrap: Unable to find corresponding guest address for %V Gv (offset %x)\n", pEip, offset));6012 AssertReleaseMsg(pPatchToGuestRec, ("PATMR3HandleTrap: Unable to find corresponding guest address for %VRv (offset %x)\n", pEip, offset)); 6012 6013 6013 6014 pNewEip = pPatchToGuestRec->pOrgInstrGC; … … 6016 6017 } 6017 6018 else 6018 AssertReleaseMsg(pVM->patm.s.pGCStateHC->fPIF == 0, ("PATMR3HandleTrap: Unable to find translation record for %V Gv (PIF=0)\n", pEip));6019 AssertReleaseMsg(pVM->patm.s.pGCStateHC->fPIF == 0, ("PATMR3HandleTrap: Unable to find translation record for %VRv (PIF=0)\n", pEip)); 6019 6020 6020 6021 /* Check if we were interrupted in PATM generated instruction code. */ … … 6081 6082 { 6082 6083 AssertReleaseMsg(pVM->patm.s.pGCStateHC->fPIF == 1, 6083 ("Crash in patch code %V Gv (%VGv) esp=%RX32\nPatch state=%x flags=%x fDirty=%d\n%s\n", pEip, pNewEip, CPUMGetGuestESP(pVM), pPatch->patch.uState, pPatch->patch.flags, pPatchToGuestRec->fDirty, szBuf));6084 ("Crash in patch code %VRv (%VRv) esp=%RX32\nPatch state=%x flags=%x fDirty=%d\n%s\n", pEip, pNewEip, CPUMGetGuestESP(pVM), pPatch->patch.uState, pPatch->patch.flags, pPatchToGuestRec->fDirty, szBuf)); 6084 6085 } 6085 6086 else 6086 6087 AssertReleaseMsg(pVM->patm.s.pGCStateHC->fPIF == 1, 6087 ("Crash in patch code %V Gv (%VGv) esp=%RX32\n%s\n", pEip, pNewEip, CPUMGetGuestESP(pVM), szBuf));6088 ("Crash in patch code %VRv (%VRv) esp=%RX32\n%s\n", pEip, pNewEip, CPUMGetGuestESP(pVM), szBuf)); 6088 6089 EMR3FatalError(pVM, VERR_INTERNAL_ERROR); 6089 6090 } … … 6093 6094 { 6094 6095 STAM_PROFILE_ADV_STOP(&pVM->patm.s.StatHandleTrap, a); 6095 AssertMsgFailed(("PATMR3HandleTrap: patch not found at address %V Gv!!\n", pEip));6096 AssertMsgFailed(("PATMR3HandleTrap: patch not found at address %VRv!!\n", pEip)); 6096 6097 return VERR_PATCH_NOT_FOUND; //fatal error 6097 6098 } … … 6134 6135 if (disret && cpu.pCurInstr->opcode == OP_RETN) 6135 6136 { 6136 RT GCPTR32retaddr;6137 RTRCPTR retaddr; 6137 6138 PCPUMCTX pCtx; 6138 6139 int rc; … … 6144 6145 AssertRC(rc); 6145 6146 6146 Log(("Return failed at %V Gv (%VGv)\n", pEip, pNewEip));6147 Log(("Expected return address %V Gv found address %VGv Psp=%x\n", pVM->patm.s.pGCStackHC[(pVM->patm.s.pGCStateHC->Psp+PATM_STACK_SIZE)/sizeof(RTGCPTR32)], retaddr, pVM->patm.s.pGCStateHC->Psp));6147 Log(("Return failed at %VRv (%VRv)\n", pEip, pNewEip)); 6148 Log(("Expected return address %VRv found address %VRv Psp=%x\n", pVM->patm.s.pGCStackHC[(pVM->patm.s.pGCStateHC->Psp+PATM_STACK_SIZE)/sizeof(RTRCPTR)], retaddr, pVM->patm.s.pGCStateHC->Psp)); 6148 6149 } 6149 6150 } … … 6159 6160 { 6160 6161 /* Must be a faulting instruction after sti; currently only sysexit, hlt or iret */ 6161 Log(("PATMR3HandleTrap %V Gv -> inhibit irqs set!\n", pEip));6162 Log(("PATMR3HandleTrap %VRv -> inhibit irqs set!\n", pEip)); 6162 6163 #ifdef VBOX_STRICT 6163 6164 DISCPUSTATE cpu; … … 6180 6181 } 6181 6182 6182 Log2(("pPatchBlockGC %V Gv - pEip %VGv corresponding GC address %VGv\n", PATCHCODE_PTR_GC(&pPatch->patch), pEip, pNewEip));6183 Log2(("pPatchBlockGC %VRv - pEip %VRv corresponding GC address %VRv\n", PATCHCODE_PTR_GC(&pPatch->patch), pEip, pNewEip)); 6183 6184 6184 6185 if (pNewEip >= pPatch->patch.pPrivInstrGC && pNewEip < pPatch->patch.pPrivInstrGC + pPatch->patch.cbPatchJump) 6185 6186 { 6186 6187 /* We can't jump back to code that we've overwritten with a 5 byte jump! */ 6187 Log(("Disabling patch at location %V Gv due to trap too close to the privileged instruction \n", pPatch->patch.pPrivInstrGC));6188 Log(("Disabling patch at location %VRv due to trap too close to the privileged instruction \n", pPatch->patch.pPrivInstrGC)); 6188 6189 PATMR3DisablePatch(pVM, pPatch->patch.pPrivInstrGC); 6189 6190 STAM_PROFILE_ADV_STOP(&pVM->patm.s.StatHandleTrap, a); … … 6195 6196 if (pPatch->patch.cTraps > MAX_PATCH_TRAPS) 6196 6197 { 6197 Log(("Disabling patch at location %V Gv due to too many traps inside patch code\n", pPatch->patch.pPrivInstrGC));6198 Log(("Disabling patch at location %VRv due to too many traps inside patch code\n", pPatch->patch.pPrivInstrGC)); 6198 6199 //we are only wasting time, back out the patch 6199 6200 PATMR3DisablePatch(pVM, pPatch->patch.pPrivInstrGC); … … 6217 6218 PATMR3DECL(int) PATMR3HandleMonitoredPage(PVM pVM) 6218 6219 { 6219 RT GCPTR32addr = pVM->patm.s.pvFaultMonitor;6220 RTRCPTR addr = pVM->patm.s.pvFaultMonitor; 6220 6221 6221 6222 addr &= PAGE_BASE_GC_MASK; … … 6224 6225 AssertRC(rc); NOREF(rc); 6225 6226 6226 PPATMPATCHREC pPatchRec = (PPATMPATCHREC)RTAvlo GCPtrGetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTree, addr, false);6227 PPATMPATCHREC pPatchRec = (PPATMPATCHREC)RTAvloU32GetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTree, addr, false); 6227 6228 if (pPatchRec && pPatchRec->patch.uState == PATCH_ENABLED && PAGE_ADDRESS(pPatchRec->patch.pPrivInstrGC) == PAGE_ADDRESS(addr)) 6228 6229 { 6229 6230 STAM_COUNTER_INC(&pVM->patm.s.StatMonitored); 6230 Log(("Renewing patch at %V Gv\n", pPatchRec->patch.pPrivInstrGC));6231 Log(("Renewing patch at %VRv\n", pPatchRec->patch.pPrivInstrGC)); 6231 6232 rc = PATMR3DisablePatch(pVM, pPatchRec->patch.pPrivInstrGC); 6232 6233 if (rc == VWRN_PATCH_REMOVED) … … 6241 6242 for(;;) 6242 6243 { 6243 pPatchRec = (PPATMPATCHREC)RTAvlo GCPtrGetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTree, addr, true);6244 pPatchRec = (PPATMPATCHREC)RTAvloU32GetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTree, addr, true); 6244 6245 6245 6246 if (!pPatchRec || PAGE_ADDRESS(pPatchRec->patch.pPrivInstrGC) != PAGE_ADDRESS(addr)) … … 6249 6250 { 6250 6251 STAM_COUNTER_INC(&pVM->patm.s.StatMonitored); 6251 Log(("Renewing patch at %V Gv\n", pPatchRec->patch.pPrivInstrGC));6252 Log(("Renewing patch at %VRv\n", pPatchRec->patch.pPrivInstrGC)); 6252 6253 PATMR3DisablePatch(pVM, pPatchRec->patch.pPrivInstrGC); 6253 6254 PATMR3EnablePatch(pVM, pPatchRec->patch.pPrivInstrGC); … … 6359 6360 * @param pPatch Patch structure 6360 6361 */ 6361 RT GCPTR32patmPatchQueryStatAddress(PVM pVM, PPATCHINFO pPatch)6362 RTRCPTR patmPatchQueryStatAddress(PVM pVM, PPATCHINFO pPatch) 6362 6363 { 6363 6364 Assert(pPatch->uPatchIdx != PATM_STAT_INDEX_NONE); … … 6386 6387 return pCmdHlp->pfnPrintf(pCmdHlp, NULL, "error: The command requires VM to be selected.\n"); 6387 6388 6388 RTAvlo GCPtrDoWithAll(&pVM->patm.s.PatchLookupTreeHC->PatchTree, true, DisableAllPatches, pVM);6389 RTAvloU32DoWithAll(&pVM->patm.s.PatchLookupTreeHC->PatchTree, true, DisableAllPatches, pVM); 6389 6390 PATMR3AllowPatching(pVM, false); 6390 6391 return pCmdHlp->pfnPrintf(pCmdHlp, NULL, "Patching disabled\n"); … … 6410 6411 6411 6412 PATMR3AllowPatching(pVM, true); 6412 RTAvlo GCPtrDoWithAll(&pVM->patm.s.PatchLookupTreeHC->PatchTree, true, EnableAllPatches, pVM);6413 RTAvloU32DoWithAll(&pVM->patm.s.PatchLookupTreeHC->PatchTree, true, EnableAllPatches, pVM); 6413 6414 return pCmdHlp->pfnPrintf(pCmdHlp, NULL, "Patching enabled\n"); 6414 6415 } -
trunk/src/VBox/VMM/PATM/PATMA.h
r9220 r9228 133 133 struct 134 134 { 135 RT GCPTR32pInstrGC;136 RT GCUINTPTR32pRelPatchGC; /* relative to patch base */135 RTRCPTR pInstrGC; 136 RTRCUINTPTR pRelPatchGC; /* relative to patch base */ 137 137 } Slot[1]; 138 138 } PATCHJUMPTABLE, *PPATCHJUMPTABLE; -
trunk/src/VBox/VMM/PATM/PATMInternal.h
r9220 r9228 136 136 uint32_t uType; 137 137 R3PTRTYPE(uint8_t *) pRelocPos; 138 RT GCPTR32pSource;139 RT GCPTR32pDest;138 RTRCPTR pSource; 139 RTRCPTR pDest; 140 140 } RELOCREC, *PRELOCREC; 141 141 … … 176 176 AVLU32NODECORE Core; 177 177 178 RT GCPTR32pOrgInstrGC;178 RTRCPTR pOrgInstrGC; 179 179 PATM_LOOKUP_TYPE enmType; 180 180 bool fDirty; … … 189 189 { 190 190 /** The key is a GC virtual address. */ 191 AVL GCPTRNODECORECore;191 AVLU32NODECORE Core; 192 192 193 193 /** Patch offset (relative to PATM::pPatchMemGC / PATM::pPatchMemHC). */ … … 213 213 214 214 /** Last original guest instruction pointer; used for disassmebly log. */ 215 RT GCPTR32pLastDisasmInstrGC;215 RTRCPTR pLastDisasmInstrGC; 216 216 217 217 /** Keeping track of multiple ret instructions. */ 218 RT GCPTR32pPatchRetInstrGC;218 RTRCPTR pPatchRetInstrGC; 219 219 uint32_t uPatchRetParam1; 220 220 } PATCHINFOTEMP, *PPATCHINFOTEMP; … … 234 234 235 235 /* Only valid for PATMFL_JUMP_CONFLICT patches */ 236 RT GCPTR32pPatchJumpDestGC;236 RTRCPTR pPatchJumpDestGC; 237 237 238 238 RTGCUINTPTR32 pPatchBlockOffset; … … 248 248 * Lowest and highest patched GC instruction address. To optimize searches. 249 249 */ 250 RT GCPTR32pInstrGCLowest;251 RT GCPTR32pInstrGCHighest;250 RTRCPTR pInstrGCLowest; 251 RTRCPTR pInstrGCHighest; 252 252 253 253 /* Tree of fixup records for the patch. */ … … 264 264 */ 265 265 R3PTRTYPE(PAVLU32NODECORE) Patch2GuestAddrTree; 266 R3PTRTYPE(PAVL GCPTRNODECORE) Guest2PatchAddrTree;266 R3PTRTYPE(PAVLU32NODECORE) Guest2PatchAddrTree; 267 267 uint32_t nrPatch2GuestRecs; 268 268 #if HC_ARCH_BITS == 64 … … 293 293 } PATCHINFO, *PPATCHINFO; 294 294 295 #define PATCHCODE_PTR_GC(pPatch) (RT GCPTR32) (pVM->patm.s.pPatchMemGC + (pPatch)->pPatchBlockOffset)295 #define PATCHCODE_PTR_GC(pPatch) (RTRCPTR) (pVM->patm.s.pPatchMemGC + (pPatch)->pPatchBlockOffset) 296 296 #define PATCHCODE_PTR_HC(pPatch) (uint8_t *)(pVM->patm.s.pPatchMemHC + (pPatch)->pPatchBlockOffset) 297 297 … … 302 302 { 303 303 /** The key is a GC virtual address. */ 304 AVLO GCPTRNODECORE Core;304 AVLOU32NODECORE Core; 305 305 /** The key is a patch offset. */ 306 AVLO GCPTRNODECORE CoreOffset;306 AVLOU32NODECORE CoreOffset; 307 307 308 308 PATCHINFO patch; … … 318 318 { 319 319 /** The key is a GC virtual address. */ 320 AVLO GCPTRNODECORE Core;320 AVLOU32NODECORE Core; 321 321 /** Region to monitor. */ 322 RT GCPTR32pLowestAddrGC;323 RT GCPTR32pHighestAddrGC;322 RTRCPTR pLowestAddrGC; 323 RTRCPTR pHighestAddrGC; 324 324 /** Number of patches for this page. */ 325 325 uint32_t cCount; … … 338 338 * AVL tree with all patches (active or disabled) sorted by guest instruction address 339 339 */ 340 AVLO GCPTRTREE PatchTree;340 AVLOU32TREE PatchTree; 341 341 342 342 /** 343 343 * AVL tree with all patches sorted by patch address (offset actually) 344 344 */ 345 AVLO GCPTRTREE PatchTreeByPatchAddr;345 AVLOU32TREE PatchTreeByPatchAddr; 346 346 347 347 /** 348 348 * AVL tree with all pages which were (partly) patched 349 349 */ 350 AVLO GCPTRTREE PatchTreeByPage;350 AVLOU32TREE PatchTreeByPage; 351 351 352 352 uint32_t align[1]; … … 376 376 377 377 /** PATM stack page for call instruction execution. (2 parts: one for our private stack and one to store the original return address */ 378 RCPTRTYPE(RT GCPTR32*) pGCStackGC;379 R3PTRTYPE(RT GCPTR32*) pGCStackHC;378 RCPTRTYPE(RTRCPTR *) pGCStackGC; 379 R3PTRTYPE(RTRCPTR *) pGCStackHC; 380 380 381 381 /** GC pointer to CPUMCTX structure. */ … … 398 398 * Lowest and highest patched GC instruction addresses. To optimize searches. 399 399 */ 400 RT GCPTR32pPatchedInstrGCLowest;401 RT GCPTR32pPatchedInstrGCHighest;400 RTRCPTR pPatchedInstrGCLowest; 401 RTRCPTR pPatchedInstrGCHighest; 402 402 403 403 /** Pointer to the patch tree for instructions replaced by 'int 3'. */ … … 406 406 407 407 /** Global PATM lookup and call function (used by call patches). */ 408 RT GCPTR32pfnHelperCallGC;408 RTRCPTR pfnHelperCallGC; 409 409 /** Global PATM return function (used by ret patches). */ 410 RT GCPTR32pfnHelperRetGC;410 RTRCPTR pfnHelperRetGC; 411 411 /** Global PATM jump function (used by indirect jmp patches). */ 412 RT GCPTR32pfnHelperJumpGC;412 RTRCPTR pfnHelperJumpGC; 413 413 /** Global PATM return function (used by iret patches). */ 414 RT GCPTR32pfnHelperIretGC;414 RTRCPTR pfnHelperIretGC; 415 415 416 416 /** Fake patch record for global functions. */ … … 418 418 419 419 /** Pointer to original sysenter handler */ 420 RT GCPTR32pfnSysEnterGC;420 RTRCPTR pfnSysEnterGC; 421 421 /** Pointer to sysenter handler trampoline */ 422 RT GCPTR32pfnSysEnterPatchGC;422 RTRCPTR pfnSysEnterPatchGC; 423 423 /** Sysenter patch index (for stats only) */ 424 424 uint32_t uSysEnterPatchIdx; 425 425 426 426 // GC address of fault in monitored page (set by PATMGCMonitorPage, used by PATMR3HandleMonitoredPage) 427 RT GCPTR32pvFaultMonitor;427 RTRCPTR pvFaultMonitor; 428 428 429 429 /* Temporary information for pending MMIO patch. Set in GC or R0 context. */ … … 431 431 { 432 432 RTGCPHYS GCPhys; 433 RT GCPTR32pCachedData;433 RTRCPTR pCachedData; 434 434 #if GC_ARCH_BITS == 32 435 RT GCPTR32Alignment0; /**< Align the structure size on a 8-byte boundrary. */435 RTRCPTR Alignment0; /**< Align the structure size on a 8-byte boundrary. */ 436 436 #endif 437 437 } mmio; … … 529 529 530 530 #ifdef IN_RING3 531 RT GCPTR32patmPatchGCPtr2GuestGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pPatchGC);532 RT GCPTR32patmGuestGCPtrToPatchGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t*) pInstrGC);533 RT GCPTR32patmGuestGCPtrToClosestPatchGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t*) pInstrGC);531 RTRCPTR patmPatchGCPtr2GuestGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pPatchGC); 532 RTRCPTR patmGuestGCPtrToPatchGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t*) pInstrGC); 533 RTRCPTR patmGuestGCPtrToClosestPatchGCPtr(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t*) pInstrGC); 534 534 #endif 535 535 … … 544 544 * 545 545 */ 546 void patmr3AddP2GLookupRecord(PVM pVM, PPATCHINFO pPatch, uint8_t *pPatchInstrHC, RT GCPTR32pInstrGC, PATM_LOOKUP_TYPE enmType, bool fDirty=false);546 void patmr3AddP2GLookupRecord(PVM pVM, PPATCHINFO pPatch, uint8_t *pPatchInstrHC, RTRCPTR pInstrGC, PATM_LOOKUP_TYPE enmType, bool fDirty=false); 547 547 548 548 /** … … 571 571 * @param pPatch Patch structure 572 572 */ 573 RT GCPTR32patmPatchQueryStatAddress(PVM pVM, PPATCHINFO pPatch);573 RTRCPTR patmPatchQueryStatAddress(PVM pVM, PPATCHINFO pPatch); 574 574 575 575 /** … … 607 607 * 608 608 */ 609 int PATMInstallGuestSpecificPatch(PVM pVM, PDISCPUSTATE pCpu, RT GCPTR32pInstrGC, uint8_t *pInstrHC, PPATMPATCHREC pPatchRec);609 int PATMInstallGuestSpecificPatch(PVM pVM, PDISCPUSTATE pCpu, RTRCPTR pInstrGC, uint8_t *pInstrHC, PPATMPATCHREC pPatchRec); 610 610 611 611 /** … … 631 631 * 632 632 */ 633 PATMDECL(PPATMPATCHREC) PATMQueryFunctionPatch(PVM pVM, RT GCPTR32pInstrGC);633 PATMDECL(PPATMPATCHREC) PATMQueryFunctionPatch(PVM pVM, RTRCPTR pInstrGC); 634 634 635 635 … … 690 690 PPATCHINFO pPatchInfo; 691 691 R3PTRTYPE(uint8_t *) pInstrHC; 692 RT GCPTR32pInstrGC;692 RTRCPTR pInstrGC; 693 693 uint32_t fReadFlags; 694 694 } PATMDISASM, *PPATMDISASM; 695 695 696 inline bool PATMR3DISInstr(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RT GCPTR32InstrGC,696 inline bool PATMR3DISInstr(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTRCPTR InstrGC, 697 697 uint8_t *InstrHC, uint32_t *pOpsize, char *pszOutput, 698 698 uint32_t fReadFlags = PATMREAD_ORGCODE) … … 734 734 * 735 735 */ 736 PPATCHINFO PATMFindActivePatchByEntrypoint(PVM pVM, RT GCPTR32pInstrGC, bool fIncludeHints=false);736 PPATCHINFO PATMFindActivePatchByEntrypoint(PVM pVM, RTRCPTR pInstrGC, bool fIncludeHints=false); 737 737 738 738 /** … … 750 750 * 751 751 */ 752 PATMR3DECL(int) PATMR3PatchBlock(PVM pVM, RT GCPTR32pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC,752 PATMR3DECL(int) PATMR3PatchBlock(PVM pVM, RTRCPTR pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, 753 753 uint32_t uOpcode, uint32_t uOpSize, PPATMPATCHREC pPatchRec); 754 754 … … 767 767 * 768 768 */ 769 PATMR3DECL(int) PATMR3PatchInstrInt3(PVM pVM, RT GCPTR32pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, DISCPUSTATE *pCpu, PPATCHINFO pPatch);769 PATMR3DECL(int) PATMR3PatchInstrInt3(PVM pVM, RTRCPTR pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, DISCPUSTATE *pCpu, PPATCHINFO pPatch); 770 770 771 771 /** … … 788 788 * @param pBranchInstrGC GC pointer of branch instruction 789 789 */ 790 inline RT GCPTR32 PATMResolveBranch(PDISCPUSTATE pCpu, RTGCPTR32pBranchInstrGC)790 inline RTRCPTR PATMResolveBranch(PDISCPUSTATE pCpu, RTRCPTR pBranchInstrGC) 791 791 { 792 792 uint32_t disp; … … 811 811 } 812 812 #ifdef IN_GC 813 return (RT GCPTR32)((uint8_t *)pBranchInstrGC + pCpu->opsize + disp);813 return (RTRCPTR)((uint8_t *)pBranchInstrGC + pCpu->opsize + disp); 814 814 #else 815 815 return pBranchInstrGC + pCpu->opsize + disp; -
trunk/src/VBox/VMM/PATM/PATMPatch.cpp
r9220 r9228 59 59 typedef struct 60 60 { 61 RT GCPTR32pTargetGC;62 RT GCPTR32pCurInstrGC;63 RT GCPTR32pNextInstrGC;64 RT GCPTR32pReturnGC;61 RTRCPTR pTargetGC; 62 RTRCPTR pCurInstrGC; 63 RTRCPTR pNextInstrGC; 64 RTRCPTR pReturnGC; 65 65 } PATMCALLINFO, *PPATMCALLINFO; 66 66 67 int patmPatchAddReloc32(PVM pVM, PPATCHINFO pPatch, uint8_t *pRelocHC, uint32_t uType, RT GCPTR32 pSource, RTGCPTR32pDest)67 int patmPatchAddReloc32(PVM pVM, PPATCHINFO pPatch, uint8_t *pRelocHC, uint32_t uType, RTRCPTR pSource, RTRCPTR pDest) 68 68 { 69 69 PRELOCREC pRec; … … 88 88 } 89 89 90 int patmPatchAddJump(PVM pVM, PPATCHINFO pPatch, uint8_t *pJumpHC, uint32_t offset, RT GCPTR32pTargetGC, uint32_t opcode)90 int patmPatchAddJump(PVM pVM, PPATCHINFO pPatch, uint8_t *pJumpHC, uint32_t offset, RTRCPTR pTargetGC, uint32_t opcode) 91 91 { 92 92 PJUMPREC pRec; … … 306 306 case PATM_LOOKUP_AND_CALL_FUNCTION: 307 307 { 308 RT GCPTR32 pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR32)(&pPB[j] + sizeof(RTGCPTR32) - pVM->patm.s.pPatchMemHC);308 RTRCPTR pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR32)(&pPB[j] + sizeof(RTRCPTR) - pVM->patm.s.pPatchMemHC); 309 309 Assert(pVM->patm.s.pfnHelperCallGC); 310 Assert(sizeof(uint32_t) == sizeof(RT GCPTR32));310 Assert(sizeof(uint32_t) == sizeof(RTRCPTR)); 311 311 312 312 /* Relative value is target minus address of instruction after the actual call instruction. */ … … 317 317 case PATM_RETURN_FUNCTION: 318 318 { 319 RT GCPTR32 pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR32)(&pPB[j] + sizeof(RTGCPTR32) - pVM->patm.s.pPatchMemHC);319 RTRCPTR pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR32)(&pPB[j] + sizeof(RTRCPTR) - pVM->patm.s.pPatchMemHC); 320 320 Assert(pVM->patm.s.pfnHelperRetGC); 321 Assert(sizeof(uint32_t) == sizeof(RT GCPTR32));321 Assert(sizeof(uint32_t) == sizeof(RTRCPTR)); 322 322 323 323 /* Relative value is target minus address of instruction after the actual call instruction. */ … … 328 328 case PATM_IRET_FUNCTION: 329 329 { 330 RT GCPTR32 pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR32)(&pPB[j] + sizeof(RTGCPTR32) - pVM->patm.s.pPatchMemHC);330 RTRCPTR pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR32)(&pPB[j] + sizeof(RTRCPTR) - pVM->patm.s.pPatchMemHC); 331 331 Assert(pVM->patm.s.pfnHelperIretGC); 332 Assert(sizeof(uint32_t) == sizeof(RT GCPTR32));332 Assert(sizeof(uint32_t) == sizeof(RTRCPTR)); 333 333 334 334 /* Relative value is target minus address of instruction after the actual call instruction. */ … … 339 339 case PATM_LOOKUP_AND_JUMP_FUNCTION: 340 340 { 341 RT GCPTR32 pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR32)(&pPB[j] + sizeof(RTGCPTR32) - pVM->patm.s.pPatchMemHC);341 RTRCPTR pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR32)(&pPB[j] + sizeof(RTRCPTR) - pVM->patm.s.pPatchMemHC); 342 342 Assert(pVM->patm.s.pfnHelperJumpGC); 343 Assert(sizeof(uint32_t) == sizeof(RT GCPTR32));343 Assert(sizeof(uint32_t) == sizeof(RTRCPTR)); 344 344 345 345 /* Relative value is target minus address of instruction after the actual call instruction. */ … … 354 354 } 355 355 356 *(RT GCPTR32*)&pPB[j] = dest;356 *(RTRCPTR *)&pPB[j] = dest; 357 357 if (pAsmRecord->uReloc[i] < PATM_NO_FIXUP) 358 358 { … … 393 393 394 394 /* Read bytes and check for overwritten instructions. */ 395 static int patmPatchReadBytes(PVM pVM, uint8_t *pDest, RT GCPTR32pSrc, uint32_t cb)395 static int patmPatchReadBytes(PVM pVM, uint8_t *pDest, RTRCPTR pSrc, uint32_t cb) 396 396 { 397 397 int rc = PGMPhysReadGCPtr(pVM, pDest, pSrc, cb); … … 426 426 } 427 427 428 int patmPatchGenIret(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pCurInstrGC, bool fSizeOverride)428 int patmPatchGenIret(PVM pVM, PPATCHINFO pPatch, RTRCPTR pCurInstrGC, bool fSizeOverride) 429 429 { 430 430 uint32_t size; … … 457 457 * Generate an STI patch 458 458 */ 459 int patmPatchGenSti(PVM pVM, PPATCHINFO pPatch, RT GCPTR32 pCurInstrGC, RTGCPTR32pNextInstrGC)459 int patmPatchGenSti(PVM pVM, PPATCHINFO pPatch, RTRCPTR pCurInstrGC, RTRCPTR pNextInstrGC) 460 460 { 461 461 PATMCALLINFO callInfo; … … 564 564 } 565 565 566 *(RT GCPTR32*)&pPB[pPatchAsmRec->offRelJump] = 0xDEADBEEF;566 *(RTRCPTR *)&pPB[pPatchAsmRec->offRelJump] = 0xDEADBEEF; 567 567 568 568 patmPatchAddJump(pVM, pPatch, &pPB[pPatchAsmRec->offRelJump - 1], 1, pTargetGC, opcode); … … 657 657 else offset++; 658 658 659 *(RT GCPTR32*)&pPB[offset] = 0xDEADBEEF;659 *(RTRCPTR *)&pPB[offset] = 0xDEADBEEF; 660 660 661 661 patmPatchAddJump(pVM, pPatch, pPB, offset, pTargetGC, opcode); 662 662 663 offset += sizeof(RT GCPTR32);663 offset += sizeof(RTRCPTR); 664 664 665 665 PATCHGEN_EPILOG(pPatch, offset); … … 670 670 * Rewrite call to dynamic or currently unknown function (on-demand patching of function) 671 671 */ 672 int patmPatchGenCall(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RT GCPTR32 pCurInstrGC, RTGCPTR32pTargetGC, bool fIndirect)672 int patmPatchGenCall(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTRCPTR pCurInstrGC, RTRCPTR pTargetGC, bool fIndirect) 673 673 { 674 674 PATMCALLINFO callInfo; … … 710 710 i++; //skip segment prefix 711 711 712 rc = patmPatchReadBytes(pVM, &pPB[offset], (RT GCPTR32)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i);712 rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i); 713 713 AssertRCReturn(rc, rc); 714 714 offset += (pCpu->opsize - i); … … 730 730 offset = 0; 731 731 pPB[offset++] = 0x68; // push %Iv 732 *(RT GCPTR32*)&pPB[offset] = pTargetGC;733 offset += sizeof(RT GCPTR32);732 *(RTRCPTR *)&pPB[offset] = pTargetGC; 733 offset += sizeof(RTRCPTR); 734 734 } 735 735 … … 771 771 * @param pCurInstrGC Current instruction address 772 772 */ 773 int patmPatchGenJump(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RT GCPTR32pCurInstrGC)773 int patmPatchGenJump(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTRCPTR pCurInstrGC) 774 774 { 775 775 PATMCALLINFO callInfo; … … 807 807 i++; //skip segment prefix 808 808 809 rc = patmPatchReadBytes(pVM, &pPB[offset], (RT GCPTR32)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i);809 rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i); 810 810 AssertRCReturn(rc, rc); 811 811 offset += (pCpu->opsize - i); … … 846 846 { 847 847 int size = 0, rc; 848 RT GCPTR32pPatchRetInstrGC;848 RTRCPTR pPatchRetInstrGC; 849 849 850 850 /* Remember start of this patch for below. */ … … 970 970 * 971 971 */ 972 int patmPatchGenCheckIF(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pCurInstrGC)972 int patmPatchGenCheckIF(PVM pVM, PPATCHINFO pPatch, RTRCPTR pCurInstrGC) 973 973 { 974 974 uint32_t size; … … 995 995 * 996 996 */ 997 int patmPatchGenSetPIF(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pInstrGC)997 int patmPatchGenSetPIF(PVM pVM, PPATCHINFO pPatch, RTRCPTR pInstrGC) 998 998 { 999 999 PATCHGEN_PROLOG(pVM, pPatch); … … 1016 1016 * 1017 1017 */ 1018 int patmPatchGenClearPIF(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pInstrGC)1018 int patmPatchGenClearPIF(PVM pVM, PPATCHINFO pPatch, RTRCPTR pInstrGC) 1019 1019 { 1020 1020 PATCHGEN_PROLOG(pVM, pPatch); … … 1037 1037 * @param pNextInstrGC Next guest instruction 1038 1038 */ 1039 int patmPatchGenClearInhibitIRQ(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pNextInstrGC)1039 int patmPatchGenClearInhibitIRQ(PVM pVM, PPATCHINFO pPatch, RTRCPTR pNextInstrGC) 1040 1040 { 1041 1041 int size; … … 1070 1070 ** @todo must check if virtual IF is already cleared on entry!!!!!!!!!!!!!!!!!!!!!!! 1071 1071 */ 1072 int patmPatchGenIntEntry(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pIntHandlerGC)1072 int patmPatchGenIntEntry(PVM pVM, PPATCHINFO pPatch, RTRCPTR pIntHandlerGC) 1073 1073 { 1074 1074 uint32_t size; … … 1102 1102 * @param pTrapHandlerGC IDT handler address 1103 1103 */ 1104 int patmPatchGenTrapEntry(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pTrapHandlerGC)1104 int patmPatchGenTrapEntry(PVM pVM, PPATCHINFO pPatch, RTRCPTR pTrapHandlerGC) 1105 1105 { 1106 1106 uint32_t size; … … 1121 1121 1122 1122 #ifdef VBOX_WITH_STATISTICS 1123 int patmPatchGenStats(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pInstrGC)1123 int patmPatchGenStats(PVM pVM, PPATCHINFO pPatch, RTRCPTR pInstrGC) 1124 1124 { 1125 1125 uint32_t size; … … 1213 1213 break; 1214 1214 } 1215 *(RT GCPTR32*)&pPB[2] = pVM->patm.s.pCPUMCtxGC + offset;1215 *(RTRCPTR *)&pPB[2] = pVM->patm.s.pCPUMCtxGC + offset; 1216 1216 patmPatchAddReloc32(pVM, pPatch, &pPB[2], FIXUP_ABSOLUTE); 1217 1217 1218 PATCHGEN_EPILOG(pPatch, 2 + sizeof(RT GCPTR32));1218 PATCHGEN_EPILOG(pPatch, 2 + sizeof(RTRCPTR)); 1219 1219 return rc; 1220 1220 } … … 1279 1279 break; 1280 1280 } 1281 *(RT GCPTR32*)&pPB[2] = pVM->patm.s.pCPUMCtxGC + offset;1281 *(RTRCPTR *)&pPB[2] = pVM->patm.s.pCPUMCtxGC + offset; 1282 1282 patmPatchAddReloc32(pVM, pPatch, &pPB[2], FIXUP_ABSOLUTE); 1283 1283 1284 PATCHGEN_EPILOG(pPatch, 2 + sizeof(RT GCPTR32));1284 PATCHGEN_EPILOG(pPatch, 2 + sizeof(RTRCPTR)); 1285 1285 return rc; 1286 1286 } … … 1289 1289 * mov GPR, SS 1290 1290 */ 1291 int patmPatchGenMovFromSS(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RT GCPTR32pCurInstrGC)1291 int patmPatchGenMovFromSS(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTRCPTR pCurInstrGC) 1292 1292 { 1293 1293 uint32_t size, offset; … … 1340 1340 * @param pCurInstrGC Guest instruction address 1341 1341 */ 1342 int patmPatchGenSldtStr(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RT GCPTR32pCurInstrGC)1342 int patmPatchGenSldtStr(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTRCPTR pCurInstrGC) 1343 1343 { 1344 1344 // sldt %Ew … … 1365 1365 if (pCpu->pCurInstr->opcode == OP_STR) 1366 1366 { 1367 *(RT GCPTR32*)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, tr);1367 *(RTRCPTR *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, tr); 1368 1368 } 1369 1369 else 1370 1370 { 1371 *(RT GCPTR32*)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, ldtr);1371 *(RTRCPTR *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, ldtr); 1372 1372 } 1373 1373 patmPatchAddReloc32(pVM, pPatch, &pPB[offset], FIXUP_ABSOLUTE); 1374 offset += sizeof(RT GCPTR32);1374 offset += sizeof(RTRCPTR); 1375 1375 } 1376 1376 else … … 1402 1402 i++; //skip segment prefix 1403 1403 1404 rc = patmPatchReadBytes(pVM, &pPB[offset], (RT GCPTR32)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i);1404 rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i); 1405 1405 AssertRCReturn(rc, rc); 1406 1406 offset += (pCpu->opsize - i); … … 1410 1410 if (pCpu->pCurInstr->opcode == OP_STR) 1411 1411 { 1412 *(RT GCPTR32*)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, tr);1412 *(RTRCPTR *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, tr); 1413 1413 } 1414 1414 else 1415 1415 { 1416 *(RT GCPTR32*)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, ldtr);1416 *(RTRCPTR *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, ldtr); 1417 1417 } 1418 1418 patmPatchAddReloc32(pVM, pPatch, &pPB[offset], FIXUP_ABSOLUTE); 1419 offset += sizeof(RT GCPTR32);1419 offset += sizeof(RTRCPTR); 1420 1420 1421 1421 pPB[offset++] = 0x66; // mov word ptr [edx],ax … … 1441 1441 * @param pCurInstrGC Guest instruction address 1442 1442 */ 1443 int patmPatchGenSxDT(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RT GCPTR32pCurInstrGC)1443 int patmPatchGenSxDT(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTRCPTR pCurInstrGC) 1444 1444 { 1445 1445 int rc = VINF_SUCCESS; … … 1496 1496 if (pCpu->prefix == PREFIX_SEG) 1497 1497 i++; //skip segment prefix 1498 rc = patmPatchReadBytes(pVM, &pPB[offset], (RT GCPTR32)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i);1498 rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i); 1499 1499 AssertRCReturn(rc, rc); 1500 1500 offset += (pCpu->opsize - i); … … 1502 1502 pPB[offset++] = 0x66; // mov ax, CPUMCTX.gdtr.limit 1503 1503 pPB[offset++] = 0xA1; 1504 *(RT GCPTR32*)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + offset_limit;1504 *(RTRCPTR *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + offset_limit; 1505 1505 patmPatchAddReloc32(pVM, pPatch, &pPB[offset], FIXUP_ABSOLUTE); 1506 offset += sizeof(RT GCPTR32);1506 offset += sizeof(RTRCPTR); 1507 1507 1508 1508 pPB[offset++] = 0x66; // mov word ptr [edx],ax … … 1511 1511 1512 1512 pPB[offset++] = 0xA1; // mov eax, CPUMCTX.gdtr.base 1513 *(RT GCPTR32*)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + offset_base;1513 *(RTRCPTR *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + offset_base; 1514 1514 patmPatchAddReloc32(pVM, pPatch, &pPB[offset], FIXUP_ABSOLUTE); 1515 offset += sizeof(RT GCPTR32);1515 offset += sizeof(RTRCPTR); 1516 1516 1517 1517 pPB[offset++] = 0x89; // mov dword ptr [edx+2],eax … … 1535 1535 * @param pCurInstrGC Guest instruction address 1536 1536 */ 1537 int patmPatchGenCpuid(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pCurInstrGC)1537 int patmPatchGenCpuid(PVM pVM, PPATCHINFO pPatch, RTRCPTR pCurInstrGC) 1538 1538 { 1539 1539 uint32_t size; … … 1583 1583 * Relative jump from patch code to patch code (no fixup required) 1584 1584 */ 1585 int patmPatchGenPatchJump(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pCurInstrGC, RCPTRTYPE(uint8_t *) pPatchAddrGC, bool fAddLookupRecord)1585 int patmPatchGenPatchJump(PVM pVM, PPATCHINFO pPatch, RTRCPTR pCurInstrGC, RCPTRTYPE(uint8_t *) pPatchAddrGC, bool fAddLookupRecord) 1586 1586 { 1587 1587 int32_t displ; -
trunk/src/VBox/VMM/PATM/PATMPatch.h
r9220 r9228 22 22 #define ___PATMPATCH_H 23 23 24 int patmPatchAddReloc32(PVM pVM, PPATCHINFO pPatch, uint8_t *pRelocHC, uint32_t uType, RT GCPTR32 pSource = 0, RTGCPTR32pDest = 0);25 int patmPatchAddJump(PVM pVM, PPATCHINFO pPatch, uint8_t *pJumpHC, uint32_t offset, RT GCPTR32pTargetGC, uint32_t opcode);24 int patmPatchAddReloc32(PVM pVM, PPATCHINFO pPatch, uint8_t *pRelocHC, uint32_t uType, RTRCPTR pSource = 0, RTRCPTR pDest = 0); 25 int patmPatchAddJump(PVM pVM, PPATCHINFO pPatch, uint8_t *pJumpHC, uint32_t offset, RTRCPTR pTargetGC, uint32_t opcode); 26 26 27 int patmPatchGenCpuid(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pCurInstrGC);28 int patmPatchGenSxDT(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RT GCPTR32pCurInstrGC);29 int patmPatchGenSldtStr(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RT GCPTR32pCurInstrGC);27 int patmPatchGenCpuid(PVM pVM, PPATCHINFO pPatch, RTRCPTR pCurInstrGC); 28 int patmPatchGenSxDT(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTRCPTR pCurInstrGC); 29 int patmPatchGenSldtStr(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTRCPTR pCurInstrGC); 30 30 int patmPatchGenMovControl(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu); 31 31 int patmPatchGenMovDebug(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu); 32 int patmPatchGenMovFromSS(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RT GCPTR32pCurInstrGC);32 int patmPatchGenMovFromSS(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTRCPTR pCurInstrGC); 33 33 int patmPatchGenRelJump(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pTargetGC, uint32_t opcode, bool fSizeOverride); 34 34 int patmPatchGenLoop(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pTargetGC, uint32_t opcode, bool fSizeOverride); 35 35 int patmPatchGenPushf(PVM pVM, PPATCHINFO pPatch, bool fSizeOverride); 36 36 int patmPatchGenPopf(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pReturnAddrGC, bool fSizeOverride, bool fGenJumpBack); 37 int patmPatchGenSti(PVM pVM, PPATCHINFO pPatch, RT GCPTR32 pCurInstrGC, RTGCPTR32pNextInstrGC);37 int patmPatchGenSti(PVM pVM, PPATCHINFO pPatch, RTRCPTR pCurInstrGC, RTRCPTR pNextInstrGC); 38 38 39 39 int patmPatchGenCli(PVM pVM, PPATCHINFO pPatch); 40 int patmPatchGenIret(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pCurInstrGC, bool fSizeOverride);40 int patmPatchGenIret(PVM pVM, PPATCHINFO pPatch, RTRCPTR pCurInstrGC, bool fSizeOverride); 41 41 int patmPatchGenDuplicate(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RCPTRTYPE(uint8_t *) pCurInstrGC); 42 42 int patmPatchGenPushCS(PVM pVM, PPATCHINFO pPatch); 43 43 44 int patmPatchGenStats(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pInstrGC);44 int patmPatchGenStats(PVM pVM, PPATCHINFO pPatch, RTRCPTR pInstrGC); 45 45 46 int patmPatchGenCall(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RT GCPTR32 pInstrGC, RTGCPTR32pTargetGC, bool fIndirect);46 int patmPatchGenCall(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTRCPTR pInstrGC, RTRCPTR pTargetGC, bool fIndirect); 47 47 int patmPatchGenRet(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RCPTRTYPE(uint8_t *) pCurInstrGC); 48 48 49 int patmPatchGenPatchJump(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pCurInstrGC, RCPTRTYPE(uint8_t *) pPatchAddrGC, bool fAddLookupRecord = true);49 int patmPatchGenPatchJump(PVM pVM, PPATCHINFO pPatch, RTRCPTR pCurInstrGC, RCPTRTYPE(uint8_t *) pPatchAddrGC, bool fAddLookupRecord = true); 50 50 51 51 /** … … 58 58 * @param pCurInstrGC Current instruction address 59 59 */ 60 int patmPatchGenJump(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RT GCPTR32pCurInstrGC);60 int patmPatchGenJump(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTRCPTR pCurInstrGC); 61 61 62 62 /** … … 68 68 * @param pTrapHandlerGC IDT handler address 69 69 */ 70 int patmPatchGenTrapEntry(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pTrapHandlerGC);70 int patmPatchGenTrapEntry(PVM pVM, PPATCHINFO pPatch, RTRCPTR pTrapHandlerGC); 71 71 72 72 /** … … 78 78 * @param pIntHandlerGC IDT handler address 79 79 */ 80 int patmPatchGenIntEntry(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pIntHandlerGC);80 int patmPatchGenIntEntry(PVM pVM, PPATCHINFO pPatch, RTRCPTR pIntHandlerGC); 81 81 82 82 /** … … 110 110 * 111 111 */ 112 int patmPatchGenSetPIF(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pInstrGC);112 int patmPatchGenSetPIF(PVM pVM, PPATCHINFO pPatch, RTRCPTR pInstrGC); 113 113 114 114 /** … … 121 121 * 122 122 */ 123 int patmPatchGenClearPIF(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pInstrGC);123 int patmPatchGenClearPIF(PVM pVM, PPATCHINFO pPatch, RTRCPTR pInstrGC); 124 124 125 125 /** … … 131 131 * @param pNextInstrGC Next guest instruction 132 132 */ 133 int patmPatchGenClearInhibitIRQ(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pNextInstrGC);133 int patmPatchGenClearInhibitIRQ(PVM pVM, PPATCHINFO pPatch, RTRCPTR pNextInstrGC); 134 134 135 135 /** … … 142 142 * 143 143 */ 144 int patmPatchGenCheckIF(PVM pVM, PPATCHINFO pPatch, RT GCPTR32pCurInstrGC);144 int patmPatchGenCheckIF(PVM pVM, PPATCHINFO pPatch, RTRCPTR pCurInstrGC); 145 145 146 146 /** -
trunk/src/VBox/VMM/PATM/PATMSSM.cpp
r8155 r9228 89 89 90 90 /** 91 * Callback function for RTAvlo GCPtrDoWithAll91 * Callback function for RTAvloU32DoWithAll 92 92 * 93 93 * Counts the number of patches in the tree … … 97 97 * @param pcPatches Pointer to patch counter 98 98 */ 99 static DECLCALLBACK(int) patmCountPatch(PAVLO GCPTRNODECORE pNode, void *pcPatches)99 static DECLCALLBACK(int) patmCountPatch(PAVLOU32NODECORE pNode, void *pcPatches) 100 100 { 101 101 *(uint32_t *)pcPatches = *(uint32_t *)pcPatches + 1; … … 152 152 153 153 /** 154 * Callback function for RTAvlo GCPtrDoWithAll154 * Callback function for RTAvloU32DoWithAll 155 155 * 156 156 * Saves the state of the patch that's being enumerated … … 160 160 * @param pVM1 VM Handle 161 161 */ 162 static DECLCALLBACK(int) patmSavePatchState(PAVLO GCPTRNODECORE pNode, void *pVM1)162 static DECLCALLBACK(int) patmSavePatchState(PAVLOU32NODECORE pNode, void *pVM1) 163 163 { 164 164 PVM pVM = (PVM)pVM1; … … 232 232 */ 233 233 patmInfo.savedstate.cPatches = 0; 234 RTAvlo GCPtrDoWithAll(&pVM->patm.s.PatchLookupTreeHC->PatchTree, true, patmCountPatch, &patmInfo.savedstate.cPatches);234 RTAvloU32DoWithAll(&pVM->patm.s.PatchLookupTreeHC->PatchTree, true, patmCountPatch, &patmInfo.savedstate.cPatches); 235 235 236 236 /* … … 261 261 * Save all patches 262 262 */ 263 rc = RTAvlo GCPtrDoWithAll(&pVM->patm.s.PatchLookupTreeHC->PatchTree, true, patmSavePatchState, pVM);263 rc = RTAvloU32DoWithAll(&pVM->patm.s.PatchLookupTreeHC->PatchTree, true, patmSavePatchState, pVM); 264 264 AssertRCReturn(rc, rc); 265 265 … … 390 390 pPatchRec->CoreOffset.Key = patch.CoreOffset.Key; 391 391 392 bool ret = RTAvlo GCPtrInsert(&pVM->patm.s.PatchLookupTreeHC->PatchTree, &pPatchRec->Core);392 bool ret = RTAvloU32Insert(&pVM->patm.s.PatchLookupTreeHC->PatchTree, &pPatchRec->Core); 393 393 Assert(ret); 394 394 if (pPatchRec->patch.uState != PATCH_REFUSED) … … 397 397 { 398 398 /* We actually generated code for this patch. */ 399 ret = RTAvlo GCPtrInsert(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, &pPatchRec->CoreOffset);399 ret = RTAvloU32Insert(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, &pPatchRec->CoreOffset); 400 400 AssertMsg(ret, ("Inserting patch %VGv offset %VGv failed!!\n", pPatchRec->patch.pPrivInstrGC, pPatchRec->CoreOffset.Key)); 401 401 } -
trunk/src/VBox/VMM/PATM/VMMAll/PATMAll.cpp
r9220 r9228 52 52 PATMDECL(void) PATMRawEnter(PVM pVM, PCPUMCTXCORE pCtxCore) 53 53 { 54 bool fPatchCode = PATMIsPatchGCAddr(pVM, (RT GCPTR32)pCtxCore->eip);54 bool fPatchCode = PATMIsPatchGCAddr(pVM, (RTRCPTR)pCtxCore->eip); 55 55 56 56 /* … … 60 60 register uint32_t efl = pCtxCore->eflags.u32; 61 61 CTXSUFF(pVM->patm.s.pGCState)->uVMFlags = efl & PATM_VIRTUAL_FLAGS_MASK; 62 AssertMsg((efl & X86_EFL_IF) || PATMShouldUseRawMode(pVM, (RT GCPTR32)pCtxCore->eip), ("X86_EFL_IF is clear and PATM is disabled! (eip=%VGv eflags=%08x fPATM=%d pPATMGC=%VGv-%VGv\n", pCtxCore->eip, pCtxCore->eflags.u32, PATMIsEnabled(pVM), pVM->patm.s.pPatchMemGC, pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem));62 AssertMsg((efl & X86_EFL_IF) || PATMShouldUseRawMode(pVM, (RTRCPTR)pCtxCore->eip), ("X86_EFL_IF is clear and PATM is disabled! (eip=%VGv eflags=%08x fPATM=%d pPATMGC=%VGv-%VGv\n", pCtxCore->eip, pCtxCore->eflags.u32, PATMIsEnabled(pVM), pVM->patm.s.pPatchMemGC, pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem)); 63 63 64 64 AssertReleaseMsg(CTXSUFF(pVM->patm.s.pGCState)->fPIF || fPatchCode, ("fPIF=%d eip=%VGv\n", CTXSUFF(pVM->patm.s.pGCState)->fPIF, pCtxCore->eip)); … … 81 81 ) 82 82 { 83 if (pVM->patm.s.pfnSysEnterGC != (RT GCPTR32)pCtx->SysEnter.eip)83 if (pVM->patm.s.pfnSysEnterGC != (RTRCPTR)pCtx->SysEnter.eip) 84 84 { 85 85 pVM->patm.s.pfnSysEnterPatchGC = 0; … … 94 94 { 95 95 pVM->patm.s.pfnSysEnterPatchGC = PATMR3QueryPatchGCPtr(pVM, pCtx->SysEnter.eip); 96 pVM->patm.s.pfnSysEnterGC = (RT GCPTR32)pCtx->SysEnter.eip;96 pVM->patm.s.pfnSysEnterGC = (RTRCPTR)pCtx->SysEnter.eip; 97 97 Assert(pVM->patm.s.pfnSysEnterPatchGC); 98 98 } 99 99 } 100 100 else 101 pVM->patm.s.pfnSysEnterGC = (RT GCPTR32)pCtx->SysEnter.eip;101 pVM->patm.s.pfnSysEnterGC = (RTRCPTR)pCtx->SysEnter.eip; 102 102 } 103 103 } … … 126 126 PATMDECL(void) PATMRawLeave(PVM pVM, PCPUMCTXCORE pCtxCore, int rawRC) 127 127 { 128 bool fPatchCode = PATMIsPatchGCAddr(pVM, (RT GCPTR32)pCtxCore->eip);128 bool fPatchCode = PATMIsPatchGCAddr(pVM, (RTRCPTR)pCtxCore->eip); 129 129 /* 130 130 * We will only be called if PATMRawEnter was previously called. … … 157 157 { 158 158 PATMTRANSSTATE enmState; 159 RT GCPTR32pOrgInstrGC = PATMR3PatchToGCPtr(pVM, pCtxCore->eip, &enmState);159 RTRCPTR pOrgInstrGC = PATMR3PatchToGCPtr(pVM, pCtxCore->eip, &enmState); 160 160 161 161 AssertRelease(pOrgInstrGC); … … 191 191 if (!fPatchCode) 192 192 { 193 if (CTXSUFF(pVM->patm.s.pGCState)->GCPtrInhibitInterrupts == (RT GCPTR32)pCtxCore->eip)193 if (CTXSUFF(pVM->patm.s.pGCState)->GCPtrInhibitInterrupts == (RTRCPTR)pCtxCore->eip) 194 194 { 195 195 EMSetInhibitInterruptsPC(pVM, pCtxCore->eip); … … 246 246 * @param pAddrGC Guest context address 247 247 */ 248 PATMDECL(bool) PATMShouldUseRawMode(PVM pVM, RT GCPTR32pAddrGC)248 PATMDECL(bool) PATMShouldUseRawMode(PVM pVM, RTRCPTR pAddrGC) 249 249 { 250 250 return ( PATMIsEnabled(pVM) 251 && ((pAddrGC >= (RT GCPTR32)pVM->patm.s.pPatchMemGC && pAddrGC < (RTGCPTR32)pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem))) ? true : false;251 && ((pAddrGC >= (RTRCPTR)pVM->patm.s.pPatchMemGC && pAddrGC < (RTRCPTR)((RTRCUINTPTR)pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem)))) ? true : false; 252 252 } 253 253 … … 270 270 * @param pAddrGC Guest context address 271 271 */ 272 PATMDECL(bool) PATMIsPatchGCAddr(PVM pVM, RTGCPTR32 pAddrGC) 273 { 274 RTGCPTR32 pAddrGG32 = (RTGCPTR32)pAddrGC; 275 276 return (PATMIsEnabled(pVM) && pAddrGG32 >= (RTGCPTR32)pVM->patm.s.pPatchMemGC && pAddrGG32 < (RTGCPTR32)pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem) ? true : false; 272 PATMDECL(bool) PATMIsPatchGCAddr(PVM pVM, RTRCPTR pAddrGC) 273 { 274 return (PATMIsEnabled(pVM) && pAddrGC >= pVM->patm.s.pPatchMemGC && pAddrGC < (RTRCPTR)((RTRCUINTPTR)pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem)) ? true : false; 277 275 } 278 276 … … 285 283 * @param pCachedData GC pointer to cached data 286 284 */ 287 PATMDECL(int) PATMSetMMIOPatchInfo(PVM pVM, RTGCPHYS GCPhys, RT GCPTR32pCachedData)285 PATMDECL(int) PATMSetMMIOPatchInfo(PVM pVM, RTGCPHYS GCPhys, RTRCPTR pCachedData) 288 286 { 289 287 pVM->patm.s.mmio.GCPhys = GCPhys; 290 pVM->patm.s.mmio.pCachedData = (RT GCPTR32)pCachedData;288 pVM->patm.s.mmio.pCachedData = (RTRCPTR)pCachedData; 291 289 292 290 return VINF_SUCCESS; … … 325 323 if (PATMIsEnabled(pVM)) 326 324 { 327 if (PATMIsPatchGCAddr(pVM, (RT GCPTR32)pCtxCore->eip))325 if (PATMIsPatchGCAddr(pVM, (RTRCPTR)pCtxCore->eip)) 328 326 return false; 329 327 } … … 339 337 * 340 338 */ 341 PATMDECL(PPATMPATCHREC) PATMQueryFunctionPatch(PVM pVM, RT GCPTR32pInstrGC)339 PATMDECL(PPATMPATCHREC) PATMQueryFunctionPatch(PVM pVM, RTRCPTR pInstrGC) 342 340 { 343 341 PPATMPATCHREC pRec; 344 342 345 pRec = (PPATMPATCHREC)RTAvloGCPtrGet(&CTXSUFF(pVM->patm.s.PatchLookupTree)->PatchTree, pInstrGC); 343 AssertCompile(sizeof(AVLOU32KEY) == sizeof(pInstrGC)); 344 pRec = (PPATMPATCHREC)RTAvloU32Get(&CTXSUFF(pVM->patm.s.PatchLookupTree)->PatchTree, (AVLOU32KEY)pInstrGC); 346 345 if ( pRec 347 346 && (pRec->patch.uState == PATCH_ENABLED) … … 362 361 * @param pSize Original instruction size (out, optional) 363 362 */ 364 PATMDECL(bool) PATMIsInt3Patch(PVM pVM, RT GCPTR32pInstrGC, uint32_t *pOpcode, uint32_t *pSize)363 PATMDECL(bool) PATMIsInt3Patch(PVM pVM, RTRCPTR pInstrGC, uint32_t *pOpcode, uint32_t *pSize) 365 364 { 366 365 PPATMPATCHREC pRec; 367 366 368 pRec = (PPATMPATCHREC)RTAvlo GCPtrGet(&CTXSUFF(pVM->patm.s.PatchLookupTree)->PatchTree,pInstrGC);367 pRec = (PPATMPATCHREC)RTAvloU32Get(&CTXSUFF(pVM->patm.s.PatchLookupTree)->PatchTree, (AVLOU32KEY)pInstrGC); 369 368 if ( pRec 370 369 && (pRec->patch.uState == PATCH_ENABLED) … … 402 401 || (pRegFrame->cs & X86_SEL_RPL) != 3 403 402 || pVM->patm.s.pfnSysEnterPatchGC == 0 404 || pVM->patm.s.pfnSysEnterGC != (RT GCPTR32)pCtx->SysEnter.eip403 || pVM->patm.s.pfnSysEnterGC != (RTRCPTR)pCtx->SysEnter.eip 405 404 || !(PATMRawGetEFlags(pVM, pRegFrame) & X86_EFL_IF)) 406 405 goto end; … … 467 466 * @param pRelBranchPatch Relative duplicated function address 468 467 */ 469 PATMDECL(int) PATMAddBranchToLookupCache(PVM pVM, RT GCPTR32 pJumpTableGC, RTGCPTR32pBranchTarget, RTGCUINTPTR pRelBranchPatch)468 PATMDECL(int) PATMAddBranchToLookupCache(PVM pVM, RTRCPTR pJumpTableGC, RTRCPTR pBranchTarget, RTGCUINTPTR pRelBranchPatch) 470 469 { 471 470 PPATCHJUMPTABLE pJumpTable; -
trunk/src/VBox/VMM/PATM/VMMGC/CSAMGC.cpp
r9220 r9228 66 66 { 67 67 PPATMGCSTATE pPATMGCState; 68 bool fPatchCode = PATMIsPatchGCAddr(pVM, (RT GCPTR32)pRegFrame->eip);68 bool fPatchCode = PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip); 69 69 int rc; 70 70 … … 103 103 if (cpl != 3) 104 104 { 105 rc = PATMGCHandleWriteToPatchPage(pVM, pRegFrame, (RT GCPTR32)((RTGCUINTPTR)pvRange + offRange), 4 /** @todo */);105 rc = PATMGCHandleWriteToPatchPage(pVM, pRegFrame, (RTRCPTR)((RTRCUINTPTR)pvRange + offRange), 4 /** @todo */); 106 106 if (rc == VINF_SUCCESS) 107 107 return rc; -
trunk/src/VBox/VMM/PATM/VMMGC/PATMGC.cpp
r9220 r9228 65 65 PATMGCDECL(int) PATMGCMonitorPage(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange) 66 66 { 67 pVM->patm.s.pvFaultMonitor = (RT GCPTR32)pvFault;67 pVM->patm.s.pvFaultMonitor = (RTRCPTR)pvFault; 68 68 return VINF_PATM_CHECK_PATCH_PAGE; 69 69 } … … 81 81 * 82 82 */ 83 PATMGCDECL(int) PATMGCHandleWriteToPatchPage(PVM pVM, PCPUMCTXCORE pRegFrame, RT GCPTR32GCPtr, uint32_t cbWrite)83 PATMGCDECL(int) PATMGCHandleWriteToPatchPage(PVM pVM, PCPUMCTXCORE pRegFrame, RTRCPTR GCPtr, uint32_t cbWrite) 84 84 { 85 85 RTGCUINTPTR pWritePageStart, pWritePageEnd; … … 97 97 pWritePageEnd = ((RTGCUINTPTR)GCPtr + cbWrite - 1) & PAGE_BASE_GC_MASK; 98 98 99 pPatchPage = (PPATMPATCHPAGE)RTAvlo GCPtrGet(CTXSUFF(&pVM->patm.s.PatchLookupTree)->PatchTreeByPage, (RTGCPTR32)pWritePageStart);99 pPatchPage = (PPATMPATCHPAGE)RTAvloU32Get(CTXSUFF(&pVM->patm.s.PatchLookupTree)->PatchTreeByPage, (AVLOU32KEY)pWritePageStart); 100 100 if ( !pPatchPage 101 101 && pWritePageStart != pWritePageEnd 102 102 ) 103 103 { 104 pPatchPage = (PPATMPATCHPAGE)RTAvlo GCPtrGet(CTXSUFF(&pVM->patm.s.PatchLookupTree)->PatchTreeByPage, (RTGCPTR32)pWritePageEnd);104 pPatchPage = (PPATMPATCHPAGE)RTAvloU32Get(CTXSUFF(&pVM->patm.s.PatchLookupTree)->PatchTreeByPage, (AVLOU32KEY)pWritePageEnd); 105 105 } 106 106 107 107 #ifdef LOG_ENABLED 108 108 if (pPatchPage) 109 Log(("PATMIsWriteToPatchPage: Found page %V Gv for write to %VGv %d bytes (page low:high %VGv:%VGv\n", pPatchPage->Core.Key, GCPtr, cbWrite, pPatchPage->pLowestAddrGC, pPatchPage->pHighestAddrGC));109 Log(("PATMIsWriteToPatchPage: Found page %VRv for write to %VRv %d bytes (page low:high %VRv:%VRv\n", pPatchPage->Core.Key, GCPtr, cbWrite, pPatchPage->pLowestAddrGC, pPatchPage->pHighestAddrGC)); 110 110 #endif 111 111 112 112 if (pPatchPage) 113 113 { 114 if ( pPatchPage->pLowestAddrGC > (RT GCPTR32)((RTGCUINTPTR)GCPtr + cbWrite - 1)115 || pPatchPage->pHighestAddrGC < (RT GCPTR32)GCPtr)114 if ( pPatchPage->pLowestAddrGC > (RTRCPTR)((RTGCUINTPTR)GCPtr + cbWrite - 1) 115 || pPatchPage->pHighestAddrGC < (RTRCPTR)GCPtr) 116 116 { 117 117 /* This part of the page was not patched; try to emulate the instruction. */ 118 118 uint32_t cb; 119 119 120 LogFlow(("PATMHandleWriteToPatchPage: Interpret % VGv accessing %VGv\n", pRegFrame->eip, GCPtr));121 int rc = EMInterpretInstruction(pVM, pRegFrame, GCPtr, &cb);120 LogFlow(("PATMHandleWriteToPatchPage: Interpret %x accessing %VRv\n", pRegFrame->eip, GCPtr)); 121 int rc = EMInterpretInstruction(pVM, pRegFrame, (RTGCPTR)GCPtr, &cb); 122 122 if (rc == VINF_SUCCESS) 123 123 { … … 162 162 /* Very important check -> otherwise we have a security leak. */ 163 163 AssertReturn(!pRegFrame->eflags.Bits.u1VM && (pRegFrame->ss & X86_SEL_RPL) == 1, VERR_ACCESS_DENIED); 164 Assert(PATMIsPatchGCAddr(pVM, (RT GCPTR32)pRegFrame->eip));164 Assert(PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip)); 165 165 166 166 /* OP_ILLUD2 in PATM generated code? */ 167 167 if (CTXSUFF(pVM->patm.s.pGCState)->uPendingAction) 168 168 { 169 LogFlow(("PATMGC: Pending action %x at % VGv\n", CTXSUFF(pVM->patm.s.pGCState)->uPendingAction, pRegFrame->eip));169 LogFlow(("PATMGC: Pending action %x at %x\n", CTXSUFF(pVM->patm.s.pGCState)->uPendingAction, pRegFrame->eip)); 170 170 171 171 /* Private PATM interface (@todo hack due to lack of anything generic). */ … … 188 188 * edi = PATCHJUMPTABLE ptr 189 189 */ 190 AssertMsg(!pRegFrame->edi || PATMIsPatchGCAddr(pVM, (RT GCPTR32)pRegFrame->edi), ("edx = %VGv\n", pRegFrame->edi));191 192 Log(("PATMGC: lookup % VGv jump table=%VGv\n", pRegFrame->edx, pRegFrame->edi));193 194 pRec = PATMQueryFunctionPatch(pVM, (RT GCPTR32)(pRegFrame->edx));190 AssertMsg(!pRegFrame->edi || PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->edi), ("edx = %x\n", pRegFrame->edi)); 191 192 Log(("PATMGC: lookup %x jump table=%x\n", pRegFrame->edx, pRegFrame->edi)); 193 194 pRec = PATMQueryFunctionPatch(pVM, (RTRCPTR)(pRegFrame->edx)); 195 195 if (pRec) 196 196 { … … 198 198 { 199 199 RTGCUINTPTR pRelAddr = pRec->patch.pPatchBlockOffset; /* make it relative */ 200 rc = PATMAddBranchToLookupCache(pVM, (RT GCPTR32)pRegFrame->edi, (RTGCPTR32)pRegFrame->edx, pRelAddr);200 rc = PATMAddBranchToLookupCache(pVM, (RTRCPTR)pRegFrame->edi, (RTRCPTR)pRegFrame->edx, pRelAddr); 201 201 if (rc == VINF_SUCCESS) 202 202 { … … 236 236 * edi = GC address to jump to 237 237 */ 238 Log(("PATMGC: Dispatch pending interrupt; eip=% VGv->%VGv\n", pRegFrame->eip, pRegFrame->edi));238 Log(("PATMGC: Dispatch pending interrupt; eip=%x->%x\n", pRegFrame->eip, pRegFrame->edi)); 239 239 240 240 /* Change EIP to the guest address the patch would normally jump to after setting IF. */ … … 262 262 * edi = GC address to jump to 263 263 */ 264 Log(("PATMGC: Dispatch pending interrupt (iret); eip=% VGv->%VGv\n", pRegFrame->eip, pRegFrame->edi));264 Log(("PATMGC: Dispatch pending interrupt (iret); eip=%x->%x\n", pRegFrame->eip, pRegFrame->edi)); 265 265 Assert(pVM->patm.s.CTXSUFF(pGCState)->Restore.uFlags == (PATM_RESTORE_EAX|PATM_RESTORE_ECX|PATM_RESTORE_EDI)); 266 266 Assert(pVM->patm.s.CTXSUFF(pGCState)->fPIF == 0); … … 281 281 case PATM_ACTION_DO_V86_IRET: 282 282 { 283 Log(("PATMGC: Do iret to V86 code; eip=% VGv\n", pRegFrame->eip));283 Log(("PATMGC: Do iret to V86 code; eip=%x\n", pRegFrame->eip)); 284 284 Assert(pVM->patm.s.CTXSUFF(pGCState)->Restore.uFlags == (PATM_RESTORE_EAX|PATM_RESTORE_ECX)); 285 285 Assert(pVM->patm.s.CTXSUFF(pGCState)->fPIF == 0); … … 306 306 #ifdef DEBUG 307 307 case PATM_ACTION_LOG_CLI: 308 Log(("PATMGC: CLI at % VGv(current IF=%d iopl=%d)\n", pRegFrame->eip, !!(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags & X86_EFL_IF), X86_EFL_GET_IOPL(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags) ));308 Log(("PATMGC: CLI at %x (current IF=%d iopl=%d)\n", pRegFrame->eip, !!(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags & X86_EFL_IF), X86_EFL_GET_IOPL(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags) )); 309 309 pRegFrame->eip += PATM_ILLEGAL_INSTR_SIZE; 310 310 return VINF_SUCCESS; 311 311 312 312 case PATM_ACTION_LOG_STI: 313 Log(("PATMGC: STI at % VGv(current IF=%d iopl=%d)\n", pRegFrame->eip, !!(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags & X86_EFL_IF), X86_EFL_GET_IOPL(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags) ));313 Log(("PATMGC: STI at %x (current IF=%d iopl=%d)\n", pRegFrame->eip, !!(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags & X86_EFL_IF), X86_EFL_GET_IOPL(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags) )); 314 314 pRegFrame->eip += PATM_ILLEGAL_INSTR_SIZE; 315 315 return VINF_SUCCESS; 316 316 317 317 case PATM_ACTION_LOG_POPF_IF1: 318 Log(("PATMGC: POPF setting IF at % VGv(current IF=%d iopl=%d)\n", pRegFrame->eip, !!(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags & X86_EFL_IF), X86_EFL_GET_IOPL(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags)));318 Log(("PATMGC: POPF setting IF at %x (current IF=%d iopl=%d)\n", pRegFrame->eip, !!(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags & X86_EFL_IF), X86_EFL_GET_IOPL(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags))); 319 319 pRegFrame->eip += PATM_ILLEGAL_INSTR_SIZE; 320 320 return VINF_SUCCESS; 321 321 322 322 case PATM_ACTION_LOG_POPF_IF0: 323 Log(("PATMGC: POPF at % VGv(current IF=%d iopl=%d)\n", pRegFrame->eip, !!(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags & X86_EFL_IF), X86_EFL_GET_IOPL(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags)));323 Log(("PATMGC: POPF at %x (current IF=%d iopl=%d)\n", pRegFrame->eip, !!(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags & X86_EFL_IF), X86_EFL_GET_IOPL(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags))); 324 324 pRegFrame->eip += PATM_ILLEGAL_INSTR_SIZE; 325 325 return VINF_SUCCESS; 326 326 327 327 case PATM_ACTION_LOG_PUSHF: 328 Log(("PATMGC: PUSHF at % VGv(current IF=%d iopl=%d)\n", pRegFrame->eip, !!(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags & X86_EFL_IF), X86_EFL_GET_IOPL(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags) ));328 Log(("PATMGC: PUSHF at %x (current IF=%d iopl=%d)\n", pRegFrame->eip, !!(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags & X86_EFL_IF), X86_EFL_GET_IOPL(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags) )); 329 329 pRegFrame->eip += PATM_ILLEGAL_INSTR_SIZE; 330 330 return VINF_SUCCESS; 331 331 332 332 case PATM_ACTION_LOG_IF1: 333 Log(("PATMGC: IF=1 escape from % VGv\n", pRegFrame->eip));333 Log(("PATMGC: IF=1 escape from %x\n", pRegFrame->eip)); 334 334 pRegFrame->eip += PATM_ILLEGAL_INSTR_SIZE; 335 335 return VINF_SUCCESS; … … 362 362 if (rc == VINF_SUCCESS) 363 363 { 364 Log(("PATMGC: IRET->VM stack frame: return address %04X:% VGv eflags=%08x ss:esp=%04X:%VGv\n", selCS, eip, uEFlags, selSS, esp));364 Log(("PATMGC: IRET->VM stack frame: return address %04X:%x eflags=%08x ss:esp=%04X:%x\n", selCS, eip, uEFlags, selSS, esp)); 365 365 Log(("PATMGC: IRET->VM stack frame: DS=%04X ES=%04X FS=%04X GS=%04X\n", selDS, selES, selFS, selGS)); 366 366 } 367 367 } 368 368 else 369 Log(("PATMGC: IRET stack frame: return address %04X:% VGv eflags=%08x ss:esp=%04X:%VGv\n", selCS, eip, uEFlags, selSS, esp));369 Log(("PATMGC: IRET stack frame: return address %04X:%x eflags=%08x ss:esp=%04X:%x\n", selCS, eip, uEFlags, selSS, esp)); 370 370 } 371 371 else 372 Log(("PATMGC: IRET stack frame: return address %04X:% VGveflags=%08x\n", selCS, eip, uEFlags));372 Log(("PATMGC: IRET stack frame: return address %04X:%x eflags=%08x\n", selCS, eip, uEFlags)); 373 373 } 374 Log(("PATMGC: IRET from % VGv(IF->1) current eflags=%x\n", pRegFrame->eip, pVM->patm.s.CTXSUFF(pGCState)->uVMFlags));374 Log(("PATMGC: IRET from %x (IF->1) current eflags=%x\n", pRegFrame->eip, pVM->patm.s.CTXSUFF(pGCState)->uVMFlags)); 375 375 pRegFrame->eip += PATM_ILLEGAL_INSTR_SIZE; 376 376 return VINF_SUCCESS; … … 404 404 if (rc == VINF_SUCCESS) 405 405 { 406 Log(("PATMGC: GATE->VM stack frame: return address %04X:% VGv eflags=%08x ss:esp=%04X:%VGv\n", selCS, eip, uEFlags, selSS, esp));406 Log(("PATMGC: GATE->VM stack frame: return address %04X:%x eflags=%08x ss:esp=%04X:%x\n", selCS, eip, uEFlags, selSS, esp)); 407 407 Log(("PATMGC: GATE->VM stack frame: DS=%04X ES=%04X FS=%04X GS=%04X\n", selDS, selES, selFS, selGS)); 408 408 } 409 409 } 410 410 else 411 Log(("PATMGC: GATE stack frame: return address %04X:% VGv eflags=%08x ss:esp=%04X:%VGv\n", selCS, eip, uEFlags, selSS, esp));411 Log(("PATMGC: GATE stack frame: return address %04X:%x eflags=%08x ss:esp=%04X:%x\n", selCS, eip, uEFlags, selSS, esp)); 412 412 } 413 413 else 414 Log(("PATMGC: GATE stack frame: return address %04X:% VGveflags=%08x\n", selCS, eip, uEFlags));414 Log(("PATMGC: GATE stack frame: return address %04X:%x eflags=%08x\n", selCS, eip, uEFlags)); 415 415 } 416 416 pRegFrame->eip += PATM_ILLEGAL_INSTR_SIZE; … … 419 419 420 420 case PATM_ACTION_LOG_RET: 421 Log(("PATMGC: RET to % VGv ESP=%VGviopl=%d\n", pRegFrame->edx, pRegFrame->ebx, X86_EFL_GET_IOPL(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags)));421 Log(("PATMGC: RET to %x ESP=%x iopl=%d\n", pRegFrame->edx, pRegFrame->ebx, X86_EFL_GET_IOPL(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags))); 422 422 pRegFrame->eip += PATM_ILLEGAL_INSTR_SIZE; 423 423 return VINF_SUCCESS; 424 424 425 425 case PATM_ACTION_LOG_CALL: 426 Log(("PATMGC: CALL to %V Gv return addr %VGv ESP=%VGviopl=%d\n", pVM->patm.s.CTXSUFF(pGCState)->GCCallPatchTargetAddr, pVM->patm.s.CTXSUFF(pGCState)->GCCallReturnAddr, pRegFrame->edx, X86_EFL_GET_IOPL(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags)));426 Log(("PATMGC: CALL to %VRv return addr %VRv ESP=%x iopl=%d\n", pVM->patm.s.CTXSUFF(pGCState)->GCCallPatchTargetAddr, pVM->patm.s.CTXSUFF(pGCState)->GCCallReturnAddr, pRegFrame->edx, X86_EFL_GET_IOPL(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags))); 427 427 pRegFrame->eip += PATM_ILLEGAL_INSTR_SIZE; 428 428 return VINF_SUCCESS; … … 437 437 CTXSUFF(pVM->patm.s.pGCState)->uPendingAction = 0; 438 438 } 439 AssertMsgFailed(("Unexpected OP_ILLUD2 in patch code at % VGv(pending action %x)!!!!\n", pRegFrame->eip, CTXSUFF(pVM->patm.s.pGCState)->uPendingAction));439 AssertMsgFailed(("Unexpected OP_ILLUD2 in patch code at %x (pending action %x)!!!!\n", pRegFrame->eip, CTXSUFF(pVM->patm.s.pGCState)->uPendingAction)); 440 440 return VINF_EM_RAW_EMULATE_INSTR; 441 441 } … … 457 457 458 458 /* Int 3 in PATM generated code? (most common case) */ 459 if (PATMIsPatchGCAddr(pVM, (RT GCPTR32)pRegFrame->eip))459 if (PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip)) 460 460 { 461 461 /* @note hardcoded assumption about it being a single byte int 3 instruction. */ … … 465 465 466 466 /** @todo could use simple caching here to speed things up. */ 467 pRec = (PPATMPATCHREC)RTAvlo GCPtrGet(&CTXSUFF(pVM->patm.s.PatchLookupTree)->PatchTree, (RTGCPTR32)(pRegFrame->eip - 1)); /* eip is pointing to the instruction *after* 'int 3' already */467 pRec = (PPATMPATCHREC)RTAvloU32Get(&CTXSUFF(pVM->patm.s.PatchLookupTree)->PatchTree, (AVLOU32KEY)(pRegFrame->eip - 1)); /* eip is pointing to the instruction *after* 'int 3' already */ 468 468 if (pRec && pRec->patch.uState == PATCH_ENABLED) 469 469 { … … 487 487 PATM_STAT_RUN_INC(&pRec->patch); 488 488 489 Log(("PATMHandleInt3PatchTrap found int3 for %s at % VGv\n", patmGetInstructionString(pRec->patch.opcode, 0), pRegFrame->eip));489 Log(("PATMHandleInt3PatchTrap found int3 for %s at %x\n", patmGetInstructionString(pRec->patch.opcode, 0), pRegFrame->eip)); 490 490 491 491 switch(pRec->patch.opcode)
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