Changeset 92331 in vbox for trunk/src/VBox/VMM/include
- Timestamp:
- Nov 10, 2021 4:55:00 PM (3 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/include/PGMInternal.h
r92313 r92331 2341 2341 * The following bits map 1:1 (shifted by PGM_PTATTRS_EPT_SHIFT) to the Intel EPT 2342 2342 * attributes as these are unique to EPT and fit within 64-bits despite the shift: 2343 * - R(Read access).2344 * - W(Write access).2345 * - X_SUPER(Execute or execute access for supervisor-mode linear addresses).2343 * - EPT_R (Read access). 2344 * - EPT_W (Write access). 2345 * - EPT_X_SUPER (Execute or execute access for supervisor-mode linear addresses). 2346 2346 * - EPT_MEMTYPE (EPT memory type). 2347 2347 * - IGNORE_PAT (Ignore PAT memory type). 2348 2348 * - X_USER (Execute access for user-mode linear addresses). 2349 * 2350 * For regular page tables, the R bit is always 1 (same as P bit). 2351 * For Intel EPT, the EPT_R and EPT_W bits are copied to R and W bits respectively. 2349 2352 * 2350 2353 * The following EPT attributes are mapped to the following positions because they … … 2366 2369 typedef PGMPTATTRS *PPGMPTATTRS; 2367 2370 2368 /** Re served bit. */2369 #define PGM_PTATTRS_R SVD_0_SHIFT02370 #define PGM_PTATTRS_R SVD_0_MASK RT_BIT_64(PGM_PTATTRS_RSVD_0_SHIFT)2371 /** Read and write access bit. */2372 #define PGM_PTATTRS_ RW_SHIFT12373 #define PGM_PTATTRS_ RW_MASK RT_BIT_64(PGM_PTATTRS_RW_SHIFT)2371 /** Read bit (always 1 for regular PT, copy of EPT_R for EPT). */ 2372 #define PGM_PTATTRS_R_SHIFT 0 2373 #define PGM_PTATTRS_R_MASK RT_BIT_64(PGM_PTATTRS_R_SHIFT) 2374 /** Write access bit (aka read/write bit for regular PT). */ 2375 #define PGM_PTATTRS_W_SHIFT 1 2376 #define PGM_PTATTRS_W_MASK RT_BIT_64(PGM_PTATTRS_W_SHIFT) 2374 2377 /** User-mode access bit. */ 2375 2378 #define PGM_PTATTRS_US_SHIFT 2 … … 2434 2437 2435 2438 RT_BF_ASSERT_COMPILE_CHECKS(PGM_PTATTRS_, UINT64_C(0), UINT64_MAX, 2436 (RSVD_0, RW, US, PWT, PCD, A, D, PAT, G, RSVD_12_9, EPT_R, EPT_W, EPT_X_SUPER, EPT_MEMTYPE, 2437 EPT_IGNORE_PAT, RSVD_22_20, EPT_X_USER, RSVD_23, EPT_SUPER_SHW_STACK, EPT_SUPPRESS_VE_XCPT, 2438 RSVD_62_27, NX)); 2439 (R, W, US, PWT, PCD, A, D, PAT, G, RSVD_12_9, EPT_R, EPT_W, EPT_X_SUPER, EPT_MEMTYPE, EPT_IGNORE_PAT, 2440 RSVD_22_20, EPT_X_USER, RSVD_23, EPT_SUPER_SHW_STACK, EPT_SUPPRESS_VE_XCPT, RSVD_62_27, NX)); 2439 2441 2440 2442 /** The bit position where the EPT specific attributes begin. */ … … 2445 2447 2446 2448 /** The mask of all PGM page attribute bits for regular page-tables. */ 2447 #define PGM_PTATTRS_PT_VALID_MASK ( PGM_PTATTRS_RW_MASK \ 2449 #define PGM_PTATTRS_PT_VALID_MASK ( PGM_PTATTRS_R_MASK \ 2450 | PGM_PTATTRS_W_MASK \ 2448 2451 | PGM_PTATTRS_US_MASK \ 2449 2452 | PGM_PTATTRS_PWT_MASK \ … … 2456 2459 2457 2460 /** The mask of all PGM page attribute bits for EPT. */ 2458 #define PGM_PTATTRS_EPT_VALID_MASK ( PGM_PTATTRS_A_MASK \ 2461 #define PGM_PTATTRS_EPT_VALID_MASK ( PGM_PTATTRS_R_MASK \ 2462 | PGM_PTATTRS_W_MASK \ 2463 | PGM_PTATTRS_A_MASK \ 2459 2464 | PGM_PTATTRS_D_MASK \ 2460 | PGM_PTATTRS_ R_MASK \2461 | PGM_PTATTRS_ W_MASK \2465 | PGM_PTATTRS_EPT_R_MASK \ 2466 | PGM_PTATTRS_EPT_W_MASK \ 2462 2467 | PGM_PTATTRS_EPT_X_SUPER \ 2463 2468 | PGM_PTATTRS_EPT_MEMTYPE \ … … 2471 2476 2472 2477 /* Verify bits match the regular PT bits. */ 2473 AssertCompile(PGM_PTATTRS_ RW_SHIFT== X86_PTE_BIT_RW);2478 AssertCompile(PGM_PTATTRS_W_SHIFT == X86_PTE_BIT_RW); 2474 2479 AssertCompile(PGM_PTATTRS_US_SHIFT == X86_PTE_BIT_US); 2475 2480 AssertCompile(PGM_PTATTRS_PWT_SHIFT == X86_PTE_BIT_PWT); … … 2479 2484 AssertCompile(PGM_PTATTRS_PAT_SHIFT == X86_PTE_BIT_PAT); 2480 2485 AssertCompile(PGM_PTATTRS_G_SHIFT == X86_PTE_BIT_G); 2481 AssertCompile(PGM_PTATTRS_ RW_MASK== X86_PTE_RW);2486 AssertCompile(PGM_PTATTRS_W_MASK == X86_PTE_RW); 2482 2487 AssertCompile(PGM_PTATTRS_US_MASK == X86_PTE_US); 2483 2488 AssertCompile(PGM_PTATTRS_PWT_MASK == X86_PTE_PWT);
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