VirtualBox

Changeset 92351 in vbox for trunk/src/VBox/VMM/VMMR3


Ignore:
Timestamp:
Nov 11, 2021 10:01:54 AM (3 years ago)
Author:
vboxsync
Message:

VMM/NEMR3Native-darwin.cpp,VMM/Makefile.kmk: Fon't link directly against Hypervisor.framework as it would require us to update our SDK if we want to use an optional feature on a newer release. Load and resolve everything dynamically instead (which is not difficult as the API is pretty barebones...), bugref:9044

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMR3/NEMR3Native-darwin.cpp

    r92338 r92351  
    2626#define LOG_GROUP LOG_GROUP_NEM
    2727#define VMCPU_INCL_CPUM_GST_CTX
    28 #include <Hypervisor/hv.h>
    29 #include <Hypervisor/hv_arch_x86.h>
    30 #include <Hypervisor/hv_arch_vmx.h>
    31 #include <Hypervisor/hv_vmx.h>
    32 
    3328#include <VBox/vmm/nem.h>
    3429#include <VBox/vmm/iem.h>
    … …  
    6156
    6257
     58/** @name HV return codes.
     59 * @{ */
     60/** Operation was successful. */
     61#define HV_SUCCESS              0
     62/** An error occurred during operation. */
     63#define HV_ERROR                0xfae94001
     64/** The operation could not be completed right now, try again. */
     65#define HV_BUSY                 0xfae94002
     66/** One of the parameters passed wis invalid. */
     67#define HV_BAD_ARGUMENT         0xfae94003
     68/** Not enough resources left to fulfill the operation. */
     69#define HV_NO_RESOURCES         0xfae94005
     70/** The device could not be found. */
     71#define HV_NO_DEVICE            0xfae94006
     72/** The operation is not supportd on this platform with this configuration. */
     73#define HV_UNSUPPORTED          0xfae94007
     74/** @} */
     75
     76
     77/** @name HV memory protection flags.
     78 * @{ */
     79/** Memory is readable. */
     80#define HV_MEMORY_READ          RT_BIT_64(0)
     81/** Memory is writeable. */
     82#define HV_MEMORY_WRITE         RT_BIT_64(1)
     83/** Memory is executable. */
     84#define HV_MEMORY_EXEC          RT_BIT_64(2)
     85/** @} */
     86
     87
     88/** @name HV shadow VMCS protection flags.
     89 * @{ */
     90/** Shadow VMCS field is not accessible. */
     91#define HV_SHADOW_VMCS_NONE     0
     92/** Shadow VMCS fild is readable. */
     93#define HV_SHADOW_VMCS_READ     RT_BIT_64(0)
     94/** Shadow VMCS field is writeable. */
     95#define HV_SHADOW_VMCS_WRITE    RT_BIT_64(1)
     96/** @} */
     97
     98
     99/** Default VM creation flags. */
     100#define HV_VM_DEFAULT           0
     101/** Default guest address space creation flags. */
     102#define HV_VM_SPACE_DEFAULT     0
     103/** Default vCPU creation flags. */
     104#define HV_VCPU_DEFAULT         0
     105
     106#define HV_DEADLINE_FOREVER     UINT64_MAX
     107
     108
     109/*********************************************************************************************************************************
     110*   Structures and Typedefs                                                                                                      *
     111*********************************************************************************************************************************/
     112
     113/** HV return code type. */
     114typedef uint32_t hv_return_t;
     115/** HV capability bitmask. */
     116typedef uint64_t hv_capability_t;
     117/** Option bitmask type when creating a VM. */
     118typedef uint64_t hv_vm_options_t;
     119/** Option bitmask when creating a vCPU. */
     120typedef uint64_t hv_vcpu_options_t;
     121/** HV memory protection flags type. */
     122typedef uint64_t hv_memory_flags_t;
     123/** Shadow VMCS protection flags. */
     124typedef uint64_t hv_shadow_flags_t;
     125/** Guest physical address type. */
     126typedef uint64_t hv_gpaddr_t;
     127
     128
     129/**
     130 * VMX Capability enumeration.
     131 */
     132typedef enum
     133{
     134    HV_VMX_CAP_PINBASED = 0,
     135    HV_VMX_CAP_PROCBASED,
     136    HV_VMX_CAP_PROCBASED2,
     137    HV_VMX_CAP_ENTRY,
     138    HV_VMX_CAP_EXIT,
     139    HV_VMX_CAP_PREEMPTION_TIMER = 32
     140} hv_vmx_capability_t;
     141
     142
     143/**
     144 * HV x86 register enumeration.
     145 */
     146typedef enum
     147{
     148    HV_X86_RIP = 0,
     149    HV_X86_RFLAGS,
     150    HV_X86_RAX,
     151    HV_X86_RCX,
     152    HV_X86_RDX,
     153    HV_X86_RBX,
     154    HV_X86_RSI,
     155    HV_X86_RDI,
     156    HV_X86_RSP,
     157    HV_X86_RBP,
     158    HV_X86_R8,
     159    HV_X86_R9,
     160    HV_X86_R10,
     161    HV_X86_R11,
     162    HV_X86_R12,
     163    HV_X86_R13,
     164    HV_X86_R14,
     165    HV_X86_R15,
     166    HV_X86_CS,
     167    HV_X86_SS,
     168    HV_X86_DS,
     169    HV_X86_ES,
     170    HV_X86_FS,
     171    HV_X86_GS,
     172    HV_X86_IDT_BASE,
     173    HV_X86_IDT_LIMIT,
     174    HV_X86_GDT_BASE,
     175    HV_X86_GDT_LIMIT,
     176    HV_X86_LDTR,
     177    HV_X86_LDT_BASE,
     178    HV_X86_LDT_LIMIT,
     179    HV_X86_LDT_AR,
     180    HV_X86_TR,
     181    HV_X86_TSS_BASE,
     182    HV_X86_TSS_LIMIT,
     183    HV_X86_TSS_AR,
     184    HV_X86_CR0,
     185    HV_X86_CR1,
     186    HV_X86_CR2,
     187    HV_X86_CR3,
     188    HV_X86_CR4,
     189    HV_X86_DR0,
     190    HV_X86_DR1,
     191    HV_X86_DR2,
     192    HV_X86_DR3,
     193    HV_X86_DR4,
     194    HV_X86_DR5,
     195    HV_X86_DR6,
     196    HV_X86_DR7,
     197    HV_X86_TPR,
     198    HV_X86_XCR0,
     199    HV_X86_REGISTERS_MAX
     200} hv_x86_reg_t;
     201
     202
     203typedef hv_return_t FN_HV_CAPABILITY(hv_capability_t capability, uint64_t *valu);
     204typedef hv_return_t FN_HV_VM_CREATE(hv_vm_options_t flags);
     205typedef hv_return_t FN_HV_VM_DESTROY(void);
     206typedef hv_return_t FN_HV_VM_SPACE_CREATE(hv_vm_space_t *asid);
     207typedef hv_return_t FN_HV_VM_SPACE_DESTROY(hv_vm_space_t asid);
     208typedef hv_return_t FN_HV_VM_MAP(const void *uva, hv_gpaddr_t gpa, size_t size, hv_memory_flags_t flags);
     209typedef hv_return_t FN_HV_VM_UNMAP(hv_gpaddr_t gpa, size_t size);
     210typedef hv_return_t FN_HV_VM_PROTECT(hv_gpaddr_t gpa, size_t size, hv_memory_flags_t flags);
     211typedef hv_return_t FN_HV_VM_MAP_SPACE(hv_vm_space_t asid, const void *uva, hv_gpaddr_t gpa, size_t size, hv_memory_flags_t flags);
     212typedef hv_return_t FN_HV_VM_UNMAP_SPACE(hv_vm_space_t asid, hv_gpaddr_t gpa, size_t size);
     213typedef hv_return_t FN_HV_VM_PROTECT_SPACE(hv_vm_space_t asid, hv_gpaddr_t gpa, size_t size, hv_memory_flags_t flags);
     214typedef hv_return_t FN_HV_VM_SYNC_TSC(uint64_t tsc);
     215
     216typedef hv_return_t FN_HV_VCPU_CREATE(hv_vcpuid_t *vcpu, hv_vcpu_options_t flags);
     217typedef hv_return_t FN_HV_VCPU_DESTROY(hv_vcpuid_t vcpu);
     218typedef hv_return_t FN_HV_VCPU_SET_SPACE(hv_vcpuid_t vcpu, hv_vm_space_t asid);
     219typedef hv_return_t FN_HV_VCPU_READ_REGISTER(hv_vcpuid_t vcpu, hv_x86_reg_t reg, uint64_t *value);
     220typedef hv_return_t FN_HV_VCPU_WRITE_REGISTER(hv_vcpuid_t vcpu, hv_x86_reg_t reg, uint64_t value);
     221typedef hv_return_t FN_HV_VCPU_READ_FPSTATE(hv_vcpuid_t vcpu, void *buffer, size_t size);
     222typedef hv_return_t FN_HV_VCPU_WRITE_FPSTATE(hv_vcpuid_t vcpu, const void *buffer, size_t size);
     223typedef hv_return_t FN_HV_VCPU_ENABLE_NATIVE_MSR(hv_vcpuid_t vcpu, uint32_t msr, bool enable);
     224typedef hv_return_t FN_HV_VCPU_READ_MSR(hv_vcpuid_t vcpu, uint32_t msr, uint64_t *value);
     225typedef hv_return_t FN_HV_VCPU_WRITE_MSR(hv_vcpuid_t vcpu, uint32_t msr, uint64_t value);
     226typedef hv_return_t FN_HV_VCPU_FLUSH(hv_vcpuid_t vcpu);
     227typedef hv_return_t FN_HV_VCPU_INVALIDATE_TLB(hv_vcpuid_t vcpu);
     228typedef hv_return_t FN_HV_VCPU_RUN(hv_vcpuid_t vcpu);
     229typedef hv_return_t FN_HV_VCPU_RUN_UNTIL(hv_vcpuid_t vcpu, uint64_t deadline);
     230typedef hv_return_t FN_HV_VCPU_INTERRUPT(hv_vcpuid_t *vcpus, unsigned int vcpu_count);
     231typedef hv_return_t FN_HV_VCPU_GET_EXEC_TIME(hv_vcpuid_t *vcpus, uint64_t *time);
     232
     233typedef hv_return_t FN_HV_VMX_VCPU_READ_VMCS(hv_vcpuid_t vcpu, uint32_t field, uint64_t *value);
     234typedef hv_return_t FN_HV_VMX_VCPU_WRITE_VMCS(hv_vcpuid_t vcpu, uint32_t field, uint64_t value);
     235
     236typedef hv_return_t FN_HV_VMX_VCPU_READ_SHADOW_VMCS(hv_vcpuid_t vcpu, uint32_t field, uint64_t *value);
     237typedef hv_return_t FN_HV_VMX_VCPU_WRITE_SHADOW_VMCS(hv_vcpuid_t vcpu, uint32_t field, uint64_t value);
     238typedef hv_return_t FN_HV_VMX_VCPU_SET_SHADOW_ACCESS(hv_vcpuid_t vcpu, uint32_t field, hv_shadow_flags_t flags);
     239
     240typedef hv_return_t FN_HV_VMX_READ_CAPABILITY(hv_vmx_capability_t field, uint64_t *value);
     241typedef hv_return_t FN_HV_VMX_VCPU_SET_APIC_ADDRESS(hv_vcpuid_t vcpu, hv_gpaddr_t gpa);
     242
     243
    63244/*********************************************************************************************************************************
    64245*   Global Variables                                                                                                             *
    … …  
    67248NEM_TMPL_STATIC const char * const g_apszPageStates[4] = { "not-set", "unmapped", "readable", "writable" };
    68249/** MSRs. */
    69 SUPHWVIRTMSRS           g_HmMsrs;
     250static SUPHWVIRTMSRS    g_HmMsrs;
    70251/** VMX: Set if swapping EFER is supported.  */
    71252static bool             g_fHmVmxSupportsVmcsEfer = false;
     253/** @name APIs imported from Hypervisor.framework.
     254 * @{ */
     255static FN_HV_CAPABILITY                 *g_pfnHvCapability              = NULL; /* Since 10.15 */
     256static FN_HV_VM_CREATE                  *g_pfnHvVmCreate                = NULL; /* Since 10.10 */
     257static FN_HV_VM_DESTROY                 *g_pfnHvVmDestroy               = NULL; /* Since 10.10 */
     258static FN_HV_VM_SPACE_CREATE            *g_pfnHvVmSpaceCreate           = NULL; /* Since 10.15 */
     259static FN_HV_VM_SPACE_DESTROY           *g_pfnHvVmSpaceDestroy          = NULL; /* Since 10.15 */
     260static FN_HV_VM_MAP                     *g_pfnHvVmMap                   = NULL; /* Since 10.10 */
     261static FN_HV_VM_UNMAP                   *g_pfnHvVmUnmap                 = NULL; /* Since 10.10 */
     262static FN_HV_VM_PROTECT                 *g_pfnHvVmProtect               = NULL; /* Since 10.10 */
     263static FN_HV_VM_MAP_SPACE               *g_pfnHvVmMapSpace              = NULL; /* Since 10.15 */
     264static FN_HV_VM_UNMAP_SPACE             *g_pfnHvVmUnmapSpace            = NULL; /* Since 10.15 */
     265static FN_HV_VM_PROTECT_SPACE           *g_pfnHvVmProtectSpace          = NULL; /* Since 10.15 */
     266static FN_HV_VM_SYNC_TSC                *g_pfnHvVmSyncTsc               = NULL; /* Since 10.10 */
     267
     268static FN_HV_VCPU_CREATE                *g_pfnHvVCpuCreate              = NULL; /* Since 10.10 */
     269static FN_HV_VCPU_DESTROY               *g_pfnHvVCpuDestroy             = NULL; /* Since 10.10 */
     270static FN_HV_VCPU_SET_SPACE             *g_pfnHvVCpuSetSpace            = NULL; /* Since 10.15 */
     271static FN_HV_VCPU_READ_REGISTER         *g_pfnHvVCpuReadRegister        = NULL; /* Since 10.10 */
     272static FN_HV_VCPU_WRITE_REGISTER        *g_pfnHvVCpuWriteRegister       = NULL; /* Since 10.10 */
     273static FN_HV_VCPU_READ_FPSTATE          *g_pfnHvVCpuReadFpState         = NULL; /* Since 10.10 */
     274static FN_HV_VCPU_WRITE_FPSTATE         *g_pfnHvVCpuWriteFpState        = NULL; /* Since 10.10 */
     275static FN_HV_VCPU_ENABLE_NATIVE_MSR     *g_pfnHvVCpuEnableNativeMsr     = NULL; /* Since 10.10 */
     276static FN_HV_VCPU_READ_MSR              *g_pfnHvVCpuReadMsr             = NULL; /* Since 10.10 */
     277static FN_HV_VCPU_WRITE_MSR             *g_pfnHvVCpuWriteMsr            = NULL; /* Since 10.10 */
     278static FN_HV_VCPU_FLUSH                 *g_pfnHvVCpuFlush               = NULL; /* Since 10.10 */
     279static FN_HV_VCPU_INVALIDATE_TLB        *g_pfnHvVCpuInvalidateTlb       = NULL; /* Since 10.10 */
     280static FN_HV_VCPU_RUN                   *g_pfnHvVCpuRun                 = NULL; /* Since 10.10 */
     281static FN_HV_VCPU_RUN_UNTIL             *g_pfnHvVCpuRunUntil            = NULL; /* Since 10.15 */
     282static FN_HV_VCPU_INTERRUPT             *g_pfnHvVCpuInterrupt           = NULL; /* Since 10.10 */
     283static FN_HV_VCPU_GET_EXEC_TIME         *g_pfnHvVCpuGetExecTime         = NULL; /* Since 10.10 */
     284
     285static FN_HV_VMX_READ_CAPABILITY        *g_pfnHvVmxReadCapability       = NULL; /* Since 10.10 */
     286static FN_HV_VMX_VCPU_READ_VMCS         *g_pfnHvVmxVCpuReadVmcs         = NULL; /* Since 10.10 */
     287static FN_HV_VMX_VCPU_WRITE_VMCS        *g_pfnHvVmxVCpuWriteVmcs        = NULL; /* Since 10.10 */
     288static FN_HV_VMX_VCPU_READ_SHADOW_VMCS  *g_pfnHvVmxVCpuReadShadowVmcs   = NULL; /* Since 10.15 */
     289static FN_HV_VMX_VCPU_WRITE_SHADOW_VMCS *g_pfnHvVmxVCpuWriteShadowVmcs  = NULL; /* Since 10.15 */
     290static FN_HV_VMX_VCPU_SET_SHADOW_ACCESS *g_pfnHvVmxVCpuSetShadowAccess  = NULL; /* Since 10.15 */
     291static FN_HV_VMX_VCPU_SET_APIC_ADDRESS  *g_pfnHvVmxVCpuSetApicAddress   = NULL; /* Since 10.10 */
     292/** @} */
     293
     294
     295/**
     296 * Import instructions.
     297 */
     298static const struct
     299{
     300    bool        fOptional;  /**< Set if import is optional. */
     301    void        **ppfn;     /**< The function pointer variable. */
     302    const char  *pszName;   /**< The function name. */
     303} g_aImports[] =
     304{
     305#define NEM_DARWIN_IMPORT(a_fOptional, a_Pfn, a_Name) { (a_fOptional), (void **)&(a_Pfn), #a_Name }
     306    NEM_DARWIN_IMPORT(true,  g_pfnHvCapability,             hv_capability),
     307    NEM_DARWIN_IMPORT(false, g_pfnHvVmCreate,               hv_vm_create),
     308    NEM_DARWIN_IMPORT(false, g_pfnHvVmDestroy,              hv_vm_destroy),
     309    NEM_DARWIN_IMPORT(true,  g_pfnHvVmSpaceCreate,          hv_vm_space_create),
     310    NEM_DARWIN_IMPORT(true,  g_pfnHvVmSpaceDestroy,         hv_vm_space_destroy),
     311    NEM_DARWIN_IMPORT(false, g_pfnHvVmMap,                  hv_vm_map),
     312    NEM_DARWIN_IMPORT(false, g_pfnHvVmUnmap,                hv_vm_unmap),
     313    NEM_DARWIN_IMPORT(false, g_pfnHvVmProtect,              hv_vm_protect),
     314    NEM_DARWIN_IMPORT(true,  g_pfnHvVmMapSpace,             hv_vm_map_space),
     315    NEM_DARWIN_IMPORT(true,  g_pfnHvVmUnmapSpace,           hv_vm_unmap_space),
     316    NEM_DARWIN_IMPORT(true,  g_pfnHvVmProtectSpace,         hv_vm_protect_space),
     317    NEM_DARWIN_IMPORT(false, g_pfnHvVmSyncTsc,              hv_vm_sync_tsc),
     318
     319    NEM_DARWIN_IMPORT(false, g_pfnHvVCpuCreate,             hv_vcpu_create),
     320    NEM_DARWIN_IMPORT(false, g_pfnHvVCpuDestroy,            hv_vcpu_destroy),
     321    NEM_DARWIN_IMPORT(true,  g_pfnHvVCpuSetSpace,           hv_vcpu_set_space),
     322    NEM_DARWIN_IMPORT(false, g_pfnHvVCpuReadRegister,       hv_vcpu_read_register),
     323    NEM_DARWIN_IMPORT(false, g_pfnHvVCpuWriteRegister,      hv_vcpu_write_register),
     324    NEM_DARWIN_IMPORT(false, g_pfnHvVCpuReadFpState,        hv_vcpu_read_fpstate),
     325    NEM_DARWIN_IMPORT(false, g_pfnHvVCpuWriteFpState,       hv_vcpu_write_fpstate),
     326    NEM_DARWIN_IMPORT(false, g_pfnHvVCpuEnableNativeMsr,    hv_vcpu_enable_native_msr),
     327    NEM_DARWIN_IMPORT(false, g_pfnHvVCpuReadMsr,            hv_vcpu_read_msr),
     328    NEM_DARWIN_IMPORT(false, g_pfnHvVCpuWriteMsr,           hv_vcpu_write_msr),
     329    NEM_DARWIN_IMPORT(false, g_pfnHvVCpuFlush,              hv_vcpu_flush),
     330    NEM_DARWIN_IMPORT(false, g_pfnHvVCpuInvalidateTlb,      hv_vcpu_invalidate_tlb),
     331    NEM_DARWIN_IMPORT(false, g_pfnHvVCpuRun,                hv_vcpu_run),
     332    NEM_DARWIN_IMPORT(true,  g_pfnHvVCpuRunUntil,           hv_vcpu_run_until),
     333    NEM_DARWIN_IMPORT(false, g_pfnHvVCpuInterrupt,          hv_vcpu_interrupt),
     334    NEM_DARWIN_IMPORT(true,  g_pfnHvVCpuGetExecTime,        hv_vcpu_get_exec_time),
     335    NEM_DARWIN_IMPORT(false, g_pfnHvVmxReadCapability,      hv_vmx_read_capability),
     336    NEM_DARWIN_IMPORT(false, g_pfnHvVmxVCpuReadVmcs,        hv_vmx_vcpu_read_vmcs),
     337    NEM_DARWIN_IMPORT(false, g_pfnHvVmxVCpuWriteVmcs,       hv_vmx_vcpu_write_vmcs),
     338    NEM_DARWIN_IMPORT(true,  g_pfnHvVmxVCpuReadShadowVmcs,  hv_vmx_vcpu_read_shadow_vmcs),
     339    NEM_DARWIN_IMPORT(true,  g_pfnHvVmxVCpuWriteShadowVmcs, hv_vmx_vcpu_write_shadow_vmcs),
     340    NEM_DARWIN_IMPORT(true,  g_pfnHvVmxVCpuSetShadowAccess, hv_vmx_vcpu_set_shadow_access),
     341    NEM_DARWIN_IMPORT(false, g_pfnHvVmxVCpuSetApicAddress,  hv_vmx_vcpu_set_apic_address),
     342#undef NEM_DARWIN_IMPORT
     343};
     344
     345
     346/*
     347 * Let the preprocessor alias the APIs to import variables for better autocompletion.
     348 */
     349#ifndef IN_SLICKEDIT
     350# define hv_capability                  g_pfnHvCapability
     351# define hv_vm_create                   g_pfnHvVmCreate
     352# define hv_vm_destroy                  g_pfnHvVmDestroy
     353# define hv_vm_space_create             g_pfnHvVmSpaceCreate
     354# define hv_vm_space_destroy            g_pfnHvVmSpaceDestroy
     355# define hv_vm_map                      g_pfnHvVmMap
     356# define hv_vm_unmap                    g_pfnHvVmUnmap
     357# define hv_vm_protect                  g_pfnHvVmProtect
     358# define hv_vm_map_space                g_pfnHvVmMapSpace
     359# define hv_vm_unmap_space              g_pfnHvVmUnmapSpace
     360# define hv_vm_protect_space            g_pfnHvVmProtectSpace
     361# define hv_vm_sync_tsc                 g_pfnHvVmSyncTsc
     362
     363# define hv_vcpu_create                 g_pfnHvVCpuCreate
     364# define hv_vcpu_destroy                g_pfnHvVCpuDestroy
     365# define hv_vcpu_set_space              g_pfnHvVCpuSetSpace
     366# define hv_vcpu_read_register          g_pfnHvVCpuReadRegister
     367# define hv_vcpu_write_register         g_pfnHvVCpuWriteRegister
     368# define hv_vcpu_read_fpstate           g_pfnHvVCpuReadFpState
     369# define hv_vcpu_write_fpstate          g_pfnHvVCpuWriteFpState
     370# define hv_vcpu_enable_native_msr      g_pfnHvVCpuEnableNativeMsr
     371# define hv_vcpu_read_msr               g_pfnHvVCpuReadMsr
     372# define hv_vcpu_write_msr              g_pfnHvVCpuWriteMsr
     373# define hv_vcpu_flush                  g_pfnHvVCpuFlush
     374# define hv_vcpu_invalidate_tlb         g_pfnHvVCpuInvalidateTlb
     375# define hv_vcpu_run                    g_pfnHvVCpuRun
     376# define hv_vcpu_run_until              g_pfnHvVCpuRunUntil
     377# define hv_vcpu_interrupt              g_pfnHvVCpuInterrupt
     378# define hv_vcpu_get_exec_time          g_pfnHvVCpuGetExecTime
     379
     380# define hv_vmx_read_capability         g_pfnHvVmxReadCapability
     381# define hv_vmx_vcpu_read_vmcs          g_pfnHvVmxVCpuReadVmcs
     382# define hv_vmx_vcpu_write_vmcs         g_pfnHvVmxVCpuWriteVmcs
     383# define hv_vmx_vcpu_read_shadow_vmcs   g_pfnHvVmxVCpuReadShadowVmcs
     384# define hv_vmx_vcpu_write_shadow_vmcs  g_pfnHvVmxVCpuWriteShadowVmcs
     385# define hv_vmx_vcpu_set_shadow_access  g_pfnHvVmxVCpuSetShadowAccess
     386# define hv_vmx_vcpu_set_apic_address   g_pfnHvVmxVCpuSetApicAddress
     387#endif
    72388
    73389
    … …  
    574890        if (fWhat & CPUMCTX_EXTRN_IDTR)
    575891        {
    576             READ_VMCS32_FIELD(VMCS_GUEST_IDTR_LIMIT, pVCpu->cpum.GstCtx.idtr.cbIdt);
    577             READ_VMCS_FIELD(VMCS_GUEST_IDTR_BASE,  pVCpu->cpum.GstCtx.idtr.pIdt);
     892            READ_VMCS32_FIELD(VMX_VMCS32_GUEST_IDTR_LIMIT, pVCpu->cpum.GstCtx.idtr.cbIdt);
     893            READ_VMCS_FIELD(VMX_VMCS_GUEST_IDTR_BASE,  pVCpu->cpum.GstCtx.idtr.pIdt);
    578894        }
    579895        if (fWhat & CPUMCTX_EXTRN_GDTR)
    580896        {
    581             READ_VMCS32_FIELD(VMCS_GUEST_GDTR_LIMIT, pVCpu->cpum.GstCtx.gdtr.cbGdt);
    582             READ_VMCS_FIELD(VMCS_GUEST_GDTR_BASE,  pVCpu->cpum.GstCtx.gdtr.pGdt);
     897            READ_VMCS32_FIELD(VMX_VMCS32_GUEST_GDTR_LIMIT, pVCpu->cpum.GstCtx.gdtr.cbGdt);
     898            READ_VMCS_FIELD(VMX_VMCS_GUEST_GDTR_BASE,  pVCpu->cpum.GstCtx.gdtr.pGdt);
    583899        }
    584900    }
    … …  
    679995        uint64_t u64Efer;
    680996
    681         READ_VMCS_FIELD(VMCS_GUEST_IA32_EFER, u64Efer);
     997        READ_VMCS_FIELD(VMX_VMCS64_GUEST_EFER_FULL, u64Efer);
    682998        if (u64Efer != pVCpu->cpum.GstCtx.msrEFER)
    683999        {
    … …  
    13831699
    13841700/**
     1701 * Worker for nemR3NativeInit that loads the Hypervisor.framwork shared library.
     1702 *
     1703 * @returns VBox status code.
     1704 * @param   fForced             Whether the HMForced flag is set and we should
     1705 *                              fail if we cannot initialize.
     1706 * @param   pErrInfo            Where to always return error info.
     1707 */
     1708static int nemR3DarwinLoadHv(bool fForced, PRTERRINFO pErrInfo)
     1709{
     1710    RTLDRMOD hMod = NIL_RTLDRMOD;
     1711    static const char *s_pszHvPath = "/System/Library/Frameworks/Hypervisor.framework/Hypervisor";
     1712
     1713    int rc = RTLdrLoadEx(s_pszHvPath, &hMod, RTLDRLOAD_FLAGS_NO_UNLOAD | RTLDRLOAD_FLAGS_NO_SUFFIX, pErrInfo);
     1714    if (RT_SUCCESS(rc))
     1715    {
     1716        for (unsigned i = 0; i < RT_ELEMENTS(g_aImports); i++)
     1717        {
     1718            int rc2 = RTLdrGetSymbol(hMod, g_aImports[i].pszName, (void **)g_aImports[i].ppfn);
     1719            if (RT_SUCCESS(rc2))
     1720            {
     1721                if (g_aImports[i].fOptional)
     1722                    LogRel(("NEM:  info: Found optional import Hypervisor!%s.\n",
     1723                            g_aImports[i].pszName));
     1724            }
     1725            else
     1726            {
     1727                *g_aImports[i].ppfn = NULL;
     1728
     1729                LogRel(("NEM:  %s: Failed to import Hypervisor!%s: %Rrc\n",
     1730                        g_aImports[i].fOptional ? "info" : fForced ? "fatal" : "error",
     1731                        g_aImports[i].pszName, rc2));
     1732                if (!g_aImports[i].fOptional)
     1733                {
     1734                    if (RTErrInfoIsSet(pErrInfo))
     1735                        RTErrInfoAddF(pErrInfo, rc2, ", Hypervisor!%s", g_aImports[i].pszName);
     1736                    else
     1737                        rc = RTErrInfoSetF(pErrInfo, rc2, "Failed to import: Hypervisor!%s", g_aImports[i].pszName);
     1738                    Assert(RT_FAILURE(rc));
     1739                }
     1740            }
     1741        }
     1742        if (RT_SUCCESS(rc))
     1743        {
     1744            Assert(!RTErrInfoIsSet(pErrInfo));
     1745        }
     1746
     1747        RTLdrClose(hMod);
     1748    }
     1749    else
     1750    {
     1751        RTErrInfoAddF(pErrInfo, rc, "Failed to load Hypervisor.framwork: %s: %Rrc", s_pszHvPath, rc);
     1752        rc = VERR_NEM_INIT_FAILED;
     1753    }
     1754
     1755    return rc;
     1756}
     1757
     1758
     1759/**
    13851760 * Read and initialize the global capabilities supported by this CPU.
    13861761 *
    … …  
    18962271    RTERRINFOSTATIC ErrInfo;
    18972272    PRTERRINFO pErrInfo = RTErrInfoInitStatic(&ErrInfo);
    1898     int rc = VINF_SUCCESS;
    1899     hv_return_t hrc = hv_vm_create(HV_VM_DEFAULT);
    1900     if (hrc == HV_SUCCESS)
    1901     {
    1902         pVM->nem.s.fCreatedVm = true;
    1903 
    1904         VM_SET_MAIN_EXECUTION_ENGINE(pVM, VM_EXEC_ENGINE_NATIVE_API);
    1905         Log(("NEM: Marked active!\n"));
    1906         PGMR3EnableNemMode(pVM);
    1907 
    1908         /* Register release statistics */
    1909         for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
     2273    int rc = nemR3DarwinLoadHv(fForced, pErrInfo);
     2274    if (RT_SUCCESS(rc))
     2275    {
     2276        hv_return_t hrc = hv_vm_create(HV_VM_DEFAULT);
     2277        if (hrc == HV_SUCCESS)
    19102278        {
    1911             PNEMCPU pNemCpu = &pVM->apCpusR3[idCpu]->nem.s;
    1912             STAMR3RegisterF(pVM, &pNemCpu->StatExitPortIo,          STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of port I/O exits",               "/NEM/CPU%u/ExitPortIo", idCpu);
    1913             STAMR3RegisterF(pVM, &pNemCpu->StatExitMemUnmapped,     STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of unmapped memory exits",        "/NEM/CPU%u/ExitMemUnmapped", idCpu);
    1914             STAMR3RegisterF(pVM, &pNemCpu->StatExitMemIntercept,    STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of intercepted memory exits",     "/NEM/CPU%u/ExitMemIntercept", idCpu);
    1915             STAMR3RegisterF(pVM, &pNemCpu->StatExitHalt,            STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of HLT exits",                    "/NEM/CPU%u/ExitHalt", idCpu);
    1916             STAMR3RegisterF(pVM, &pNemCpu->StatExitInterruptWindow, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of HLT exits",                    "/NEM/CPU%u/ExitInterruptWindow", idCpu);
    1917             STAMR3RegisterF(pVM, &pNemCpu->StatExitCpuId,           STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of CPUID exits",                  "/NEM/CPU%u/ExitCpuId", idCpu);
    1918             STAMR3RegisterF(pVM, &pNemCpu->StatExitMsr,             STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of MSR access exits",             "/NEM/CPU%u/ExitMsr", idCpu);
    1919             STAMR3RegisterF(pVM, &pNemCpu->StatExitException,       STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of exception exits",              "/NEM/CPU%u/ExitException", idCpu);
    1920             STAMR3RegisterF(pVM, &pNemCpu->StatExitExceptionBp,     STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of #BP exits",                    "/NEM/CPU%u/ExitExceptionBp", idCpu);
    1921             STAMR3RegisterF(pVM, &pNemCpu->StatExitExceptionDb,     STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of #DB exits",                    "/NEM/CPU%u/ExitExceptionDb", idCpu);
    1922             STAMR3RegisterF(pVM, &pNemCpu->StatExitExceptionGp,     STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of #GP exits",                    "/NEM/CPU%u/ExitExceptionGp", idCpu);
    1923             STAMR3RegisterF(pVM, &pNemCpu->StatExitExceptionGpMesa, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of #GP exits from mesa driver",   "/NEM/CPU%u/ExitExceptionGpMesa", idCpu);
    1924             STAMR3RegisterF(pVM, &pNemCpu->StatExitExceptionUd,     STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of #UD exits",                    "/NEM/CPU%u/ExitExceptionUd", idCpu);
    1925             STAMR3RegisterF(pVM, &pNemCpu->StatExitExceptionUdHandled, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of handled #UD exits",         "/NEM/CPU%u/ExitExceptionUdHandled", idCpu);
    1926             STAMR3RegisterF(pVM, &pNemCpu->StatExitUnrecoverable,   STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of unrecoverable exits",          "/NEM/CPU%u/ExitUnrecoverable", idCpu);
    1927             STAMR3RegisterF(pVM, &pNemCpu->StatGetMsgTimeout,       STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of get message timeouts/alerts",  "/NEM/CPU%u/GetMsgTimeout", idCpu);
    1928             STAMR3RegisterF(pVM, &pNemCpu->StatStopCpuSuccess,      STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of successful CPU stops",         "/NEM/CPU%u/StopCpuSuccess", idCpu);
    1929             STAMR3RegisterF(pVM, &pNemCpu->StatStopCpuPending,      STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of pending CPU stops",            "/NEM/CPU%u/StopCpuPending", idCpu);
    1930             STAMR3RegisterF(pVM, &pNemCpu->StatStopCpuPendingAlerts,STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of pending CPU stop alerts",      "/NEM/CPU%u/StopCpuPendingAlerts", idCpu);
    1931             STAMR3RegisterF(pVM, &pNemCpu->StatStopCpuPendingOdd,   STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of odd pending CPU stops (see code)", "/NEM/CPU%u/StopCpuPendingOdd", idCpu);
    1932             STAMR3RegisterF(pVM, &pNemCpu->StatCancelChangedState,  STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of cancel changed state",         "/NEM/CPU%u/CancelChangedState", idCpu);
    1933             STAMR3RegisterF(pVM, &pNemCpu->StatCancelAlertedThread, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of cancel alerted EMT",           "/NEM/CPU%u/CancelAlertedEMT", idCpu);
    1934             STAMR3RegisterF(pVM, &pNemCpu->StatBreakOnFFPre,        STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of pre execution FF breaks",      "/NEM/CPU%u/BreakOnFFPre", idCpu);
    1935             STAMR3RegisterF(pVM, &pNemCpu->StatBreakOnFFPost,       STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of post execution FF breaks",     "/NEM/CPU%u/BreakOnFFPost", idCpu);
    1936             STAMR3RegisterF(pVM, &pNemCpu->StatBreakOnCancel,       STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of cancel execution breaks",      "/NEM/CPU%u/BreakOnCancel", idCpu);
    1937             STAMR3RegisterF(pVM, &pNemCpu->StatBreakOnStatus,       STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of status code breaks",           "/NEM/CPU%u/BreakOnStatus", idCpu);
    1938             STAMR3RegisterF(pVM, &pNemCpu->StatImportOnDemand,      STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of on-demand state imports",      "/NEM/CPU%u/ImportOnDemand", idCpu);
    1939             STAMR3RegisterF(pVM, &pNemCpu->StatImportOnReturn,      STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of state imports on loop return", "/NEM/CPU%u/ImportOnReturn", idCpu);
    1940             STAMR3RegisterF(pVM, &pNemCpu->StatImportOnReturnSkipped, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of skipped state imports on loop return", "/NEM/CPU%u/ImportOnReturnSkipped", idCpu);
    1941             STAMR3RegisterF(pVM, &pNemCpu->StatQueryCpuTick,        STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of TSC queries",                  "/NEM/CPU%u/QueryCpuTick", idCpu);
     2279            pVM->nem.s.fCreatedVm = true;
     2280
     2281            VM_SET_MAIN_EXECUTION_ENGINE(pVM, VM_EXEC_ENGINE_NATIVE_API);
     2282            Log(("NEM: Marked active!\n"));
     2283            PGMR3EnableNemMode(pVM);
     2284
     2285            /* Register release statistics */
     2286            for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
     2287            {
     2288                PNEMCPU pNemCpu = &pVM->apCpusR3[idCpu]->nem.s;
     2289                STAMR3RegisterF(pVM, &pNemCpu->StatExitPortIo,          STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of port I/O exits",               "/NEM/CPU%u/ExitPortIo", idCpu);
     2290                STAMR3RegisterF(pVM, &pNemCpu->StatExitMemUnmapped,     STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of unmapped memory exits",        "/NEM/CPU%u/ExitMemUnmapped", idCpu);
     2291                STAMR3RegisterF(pVM, &pNemCpu->StatExitMemIntercept,    STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of intercepted memory exits",     "/NEM/CPU%u/ExitMemIntercept", idCpu);
     2292                STAMR3RegisterF(pVM, &pNemCpu->StatExitHalt,            STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of HLT exits",                    "/NEM/CPU%u/ExitHalt", idCpu);
     2293                STAMR3RegisterF(pVM, &pNemCpu->StatExitInterruptWindow, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of HLT exits",                    "/NEM/CPU%u/ExitInterruptWindow", idCpu);
     2294                STAMR3RegisterF(pVM, &pNemCpu->StatExitCpuId,           STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of CPUID exits",                  "/NEM/CPU%u/ExitCpuId", idCpu);
     2295                STAMR3RegisterF(pVM, &pNemCpu->StatExitMsr,             STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of MSR access exits",             "/NEM/CPU%u/ExitMsr", idCpu);
     2296                STAMR3RegisterF(pVM, &pNemCpu->StatExitException,       STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of exception exits",              "/NEM/CPU%u/ExitException", idCpu);
     2297                STAMR3RegisterF(pVM, &pNemCpu->StatExitExceptionBp,     STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of #BP exits",                    "/NEM/CPU%u/ExitExceptionBp", idCpu);
     2298                STAMR3RegisterF(pVM, &pNemCpu->StatExitExceptionDb,     STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of #DB exits",                    "/NEM/CPU%u/ExitExceptionDb", idCpu);
     2299                STAMR3RegisterF(pVM, &pNemCpu->StatExitExceptionGp,     STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of #GP exits",                    "/NEM/CPU%u/ExitExceptionGp", idCpu);
     2300                STAMR3RegisterF(pVM, &pNemCpu->StatExitExceptionGpMesa, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of #GP exits from mesa driver",   "/NEM/CPU%u/ExitExceptionGpMesa", idCpu);
     2301                STAMR3RegisterF(pVM, &pNemCpu->StatExitExceptionUd,     STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of #UD exits",                    "/NEM/CPU%u/ExitExceptionUd", idCpu);
     2302                STAMR3RegisterF(pVM, &pNemCpu->StatExitExceptionUdHandled, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of handled #UD exits",         "/NEM/CPU%u/ExitExceptionUdHandled", idCpu);
     2303                STAMR3RegisterF(pVM, &pNemCpu->StatExitUnrecoverable,   STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of unrecoverable exits",          "/NEM/CPU%u/ExitUnrecoverable", idCpu);
     2304                STAMR3RegisterF(pVM, &pNemCpu->StatGetMsgTimeout,       STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of get message timeouts/alerts",  "/NEM/CPU%u/GetMsgTimeout", idCpu);
     2305                STAMR3RegisterF(pVM, &pNemCpu->StatStopCpuSuccess,      STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of successful CPU stops",         "/NEM/CPU%u/StopCpuSuccess", idCpu);
     2306                STAMR3RegisterF(pVM, &pNemCpu->StatStopCpuPending,      STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of pending CPU stops",            "/NEM/CPU%u/StopCpuPending", idCpu);
     2307                STAMR3RegisterF(pVM, &pNemCpu->StatStopCpuPendingAlerts,STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of pending CPU stop alerts",      "/NEM/CPU%u/StopCpuPendingAlerts", idCpu);
     2308                STAMR3RegisterF(pVM, &pNemCpu->StatStopCpuPendingOdd,   STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of odd pending CPU stops (see code)", "/NEM/CPU%u/StopCpuPendingOdd", idCpu);
     2309                STAMR3RegisterF(pVM, &pNemCpu->StatCancelChangedState,  STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of cancel changed state",         "/NEM/CPU%u/CancelChangedState", idCpu);
     2310                STAMR3RegisterF(pVM, &pNemCpu->StatCancelAlertedThread, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of cancel alerted EMT",           "/NEM/CPU%u/CancelAlertedEMT", idCpu);
     2311                STAMR3RegisterF(pVM, &pNemCpu->StatBreakOnFFPre,        STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of pre execution FF breaks",      "/NEM/CPU%u/BreakOnFFPre", idCpu);
     2312                STAMR3RegisterF(pVM, &pNemCpu->StatBreakOnFFPost,       STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of post execution FF breaks",     "/NEM/CPU%u/BreakOnFFPost", idCpu);
     2313                STAMR3RegisterF(pVM, &pNemCpu->StatBreakOnCancel,       STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of cancel execution breaks",      "/NEM/CPU%u/BreakOnCancel", idCpu);
     2314                STAMR3RegisterF(pVM, &pNemCpu->StatBreakOnStatus,       STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of status code breaks",           "/NEM/CPU%u/BreakOnStatus", idCpu);
     2315                STAMR3RegisterF(pVM, &pNemCpu->StatImportOnDemand,      STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of on-demand state imports",      "/NEM/CPU%u/ImportOnDemand", idCpu);
     2316                STAMR3RegisterF(pVM, &pNemCpu->StatImportOnReturn,      STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of state imports on loop return", "/NEM/CPU%u/ImportOnReturn", idCpu);
     2317                STAMR3RegisterF(pVM, &pNemCpu->StatImportOnReturnSkipped, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of skipped state imports on loop return", "/NEM/CPU%u/ImportOnReturnSkipped", idCpu);
     2318                STAMR3RegisterF(pVM, &pNemCpu->StatQueryCpuTick,        STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of TSC queries",                  "/NEM/CPU%u/QueryCpuTick", idCpu);
     2319            }
    19422320        }
    1943     }
    1944     else
    1945         rc = RTErrInfoSetF(pErrInfo, VERR_NEM_INIT_FAILED,
    1946                            "hv_vm_create() failed: %#x", hrc);
     2321        else
     2322            rc = RTErrInfoSetF(pErrInfo, VERR_NEM_INIT_FAILED,
     2323                               "hv_vm_create() failed: %#x", hrc);
     2324    }
    19472325
    19482326    /*
    … …  
    20002378{
    20012379    hv_return_t hrc = hv_vcpu_destroy(pVCpu->nem.s.hVCpuId);
    2002     Assert(hrc == HV_SUCCESS);
     2380    Assert(hrc == HV_SUCCESS); RT_NOREF(hrc);
    20032381    return VINF_SUCCESS;
    20042382}
    … …  
    20382416
    20392417    pVM->nem.s.fCreatedEmts = true;
    2040 
    2041     //CPUMR3ClearGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_SEP);
    20422418    return VINF_SUCCESS;
    20432419}
    … …  
    22052581                LogFlowFunc(("Running vCPU\n"));
    22062582                pVCpu->nem.s.Event.fPending = false;
    2207                 hv_return_t hrc = hv_vcpu_run(pVCpu->nem.s.hVCpuId); /** @todo Use hv_vcpu_run_until() when available (11.0+). */
     2583
     2584                hv_return_t hrc;
     2585                if (hv_vcpu_run_until)
     2586                    hrc = hv_vcpu_run_until(pVCpu->nem.s.hVCpuId, HV_DEADLINE_FOREVER);
     2587                else
     2588                    hrc = hv_vcpu_run(pVCpu->nem.s.hVCpuId);
     2589
    22082590                VMCPU_CMPXCHG_STATE(pVCpu, VMCPUSTATE_STARTED_EXEC_NEM, VMCPUSTATE_STARTED_EXEC_NEM_WAIT);
    22092591                if (hrc == HV_SUCCESS)
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