Changeset 92359 in vbox for trunk/src/VBox/VMM/include
- Timestamp:
- Nov 11, 2021 11:06:08 AM (3 years ago)
- Location:
- trunk/src/VBox/VMM/include
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/include/HMInternal.h
r92354 r92359 628 628 629 629 /** @} */ 630 631 632 /** @addtogroup grp_hm_int_vmx VMX Internal633 * @{ */634 /**635 * VMX VMCS information, shared.636 *637 * This structure provides information maintained for and during the executing of a638 * guest (or nested-guest) VMCS (VM control structure) using hardware-assisted VMX.639 *640 * Note! The members here are ordered and aligned based on estimated frequency of641 * usage and grouped to fit within a cache line in hot code paths. Even subtle642 * changes here have a noticeable effect in the bootsector benchmarks. Modify with643 * care.644 */645 typedef struct VMXVMCSINFOSHARED646 {647 /** @name Real-mode emulation state.648 * @{ */649 /** Set if guest was executing in real mode (extra checks). */650 bool fWasInRealMode;651 /** Padding. */652 bool afPadding0[7];653 struct654 {655 X86DESCATTR AttrCS;656 X86DESCATTR AttrDS;657 X86DESCATTR AttrES;658 X86DESCATTR AttrFS;659 X86DESCATTR AttrGS;660 X86DESCATTR AttrSS;661 X86EFLAGS Eflags;662 bool fRealOnV86Active;663 bool afPadding1[3];664 } RealMode;665 /** @} */666 667 /** @name LBR MSR data.668 * @{ */669 /** List of LastBranch-From-IP MSRs. */670 uint64_t au64LbrFromIpMsr[32];671 /** List of LastBranch-To-IP MSRs. */672 uint64_t au64LbrToIpMsr[32];673 /** The MSR containing the index to the most recent branch record. */674 uint64_t u64LbrTosMsr;675 /** @} */676 } VMXVMCSINFOSHARED;677 /** Pointer to a VMXVMCSINFOSHARED struct. */678 typedef VMXVMCSINFOSHARED *PVMXVMCSINFOSHARED;679 /** Pointer to a const VMXVMCSINFOSHARED struct. */680 typedef const VMXVMCSINFOSHARED *PCVMXVMCSINFOSHARED;681 AssertCompileSizeAlignment(VMXVMCSINFOSHARED, 8);682 683 684 /**685 * VMX VMCS information, ring-0 only.686 *687 * This structure provides information maintained for and during the executing of a688 * guest (or nested-guest) VMCS (VM control structure) using hardware-assisted VMX.689 *690 * Note! The members here are ordered and aligned based on estimated frequency of691 * usage and grouped to fit within a cache line in hot code paths. Even subtle692 * changes here have a noticeable effect in the bootsector benchmarks. Modify with693 * care.694 */695 typedef struct VMXVMCSINFO696 {697 /** Pointer to the bits we share with ring-3. */698 R3R0PTRTYPE(PVMXVMCSINFOSHARED) pShared;699 700 /** @name Auxiliary information.701 * @{ */702 /** Host-physical address of the EPTP. */703 RTHCPHYS HCPhysEPTP;704 /** The VMCS launch state, see VMX_V_VMCS_LAUNCH_STATE_XXX. */705 uint32_t fVmcsState;706 /** The VMCS launch state of the shadow VMCS, see VMX_V_VMCS_LAUNCH_STATE_XXX. */707 uint32_t fShadowVmcsState;708 /** The host CPU for which its state has been exported to this VMCS. */709 RTCPUID idHostCpuState;710 /** The host CPU on which we last executed this VMCS. */711 RTCPUID idHostCpuExec;712 /** Number of guest MSRs in the VM-entry MSR-load area. */713 uint32_t cEntryMsrLoad;714 /** Number of guest MSRs in the VM-exit MSR-store area. */715 uint32_t cExitMsrStore;716 /** Number of host MSRs in the VM-exit MSR-load area. */717 uint32_t cExitMsrLoad;718 /** @} */719 720 /** @name Cache of execution related VMCS fields.721 * @{ */722 /** Pin-based VM-execution controls. */723 uint32_t u32PinCtls;724 /** Processor-based VM-execution controls. */725 uint32_t u32ProcCtls;726 /** Secondary processor-based VM-execution controls. */727 uint32_t u32ProcCtls2;728 /** Tertiary processor-based VM-execution controls. */729 uint64_t u64ProcCtls3;730 /** VM-entry controls. */731 uint32_t u32EntryCtls;732 /** VM-exit controls. */733 uint32_t u32ExitCtls;734 /** Exception bitmap. */735 uint32_t u32XcptBitmap;736 /** Page-fault exception error-code mask. */737 uint32_t u32XcptPFMask;738 /** Page-fault exception error-code match. */739 uint32_t u32XcptPFMatch;740 /** Padding. */741 uint32_t u32Alignment0;742 /** TSC offset. */743 uint64_t u64TscOffset;744 /** VMCS link pointer. */745 uint64_t u64VmcsLinkPtr;746 /** CR0 guest/host mask. */747 uint64_t u64Cr0Mask;748 /** CR4 guest/host mask. */749 uint64_t u64Cr4Mask;750 /** Current VMX_VMCS_HOST_RIP value (only used in HMR0A.asm). */751 uint64_t uHostRip;752 /** Current VMX_VMCS_HOST_RSP value (only used in HMR0A.asm). */753 uint64_t uHostRsp;754 /** @} */755 756 /** @name Host-virtual address of VMCS and related data structures.757 * @{ */758 /** The VMCS. */759 R3R0PTRTYPE(void *) pvVmcs;760 /** The shadow VMCS. */761 R3R0PTRTYPE(void *) pvShadowVmcs;762 /** The virtual-APIC page. */763 R3R0PTRTYPE(uint8_t *) pbVirtApic;764 /** The MSR bitmap. */765 R3R0PTRTYPE(void *) pvMsrBitmap;766 /** The VM-entry MSR-load area. */767 R3R0PTRTYPE(void *) pvGuestMsrLoad;768 /** The VM-exit MSR-store area. */769 R3R0PTRTYPE(void *) pvGuestMsrStore;770 /** The VM-exit MSR-load area. */771 R3R0PTRTYPE(void *) pvHostMsrLoad;772 /** @} */773 774 /** @name Host-physical address of VMCS and related data structures.775 * @{ */776 /** The VMCS. */777 RTHCPHYS HCPhysVmcs;778 /** The shadow VMCS. */779 RTHCPHYS HCPhysShadowVmcs;780 /** The virtual APIC page. */781 RTHCPHYS HCPhysVirtApic;782 /** The MSR bitmap. */783 RTHCPHYS HCPhysMsrBitmap;784 /** The VM-entry MSR-load area. */785 RTHCPHYS HCPhysGuestMsrLoad;786 /** The VM-exit MSR-store area. */787 RTHCPHYS HCPhysGuestMsrStore;788 /** The VM-exit MSR-load area. */789 RTHCPHYS HCPhysHostMsrLoad;790 /** @} */791 792 /** @name R0-memory objects address for VMCS and related data structures.793 * @{ */794 /** R0-memory object for VMCS and related data structures. */795 RTR0MEMOBJ hMemObj;796 /** @} */797 } VMXVMCSINFO;798 /** Pointer to a VMXVMCSINFOR0 struct. */799 typedef VMXVMCSINFO *PVMXVMCSINFO;800 /** Pointer to a const VMXVMCSINFO struct. */801 typedef const VMXVMCSINFO *PCVMXVMCSINFO;802 AssertCompileSizeAlignment(VMXVMCSINFO, 8);803 AssertCompileMemberAlignment(VMXVMCSINFO, u32PinCtls, 4);804 AssertCompileMemberAlignment(VMXVMCSINFO, u64VmcsLinkPtr, 8);805 AssertCompileMemberAlignment(VMXVMCSINFO, pvVmcs, 8);806 AssertCompileMemberAlignment(VMXVMCSINFO, pvShadowVmcs, 8);807 AssertCompileMemberAlignment(VMXVMCSINFO, pbVirtApic, 8);808 AssertCompileMemberAlignment(VMXVMCSINFO, pvMsrBitmap, 8);809 AssertCompileMemberAlignment(VMXVMCSINFO, pvGuestMsrLoad, 8);810 AssertCompileMemberAlignment(VMXVMCSINFO, pvGuestMsrStore, 8);811 AssertCompileMemberAlignment(VMXVMCSINFO, pvHostMsrLoad, 8);812 AssertCompileMemberAlignment(VMXVMCSINFO, HCPhysVmcs, 8);813 AssertCompileMemberAlignment(VMXVMCSINFO, hMemObj, 8);814 815 630 816 631 /** @name Host-state restoration flags. -
trunk/src/VBox/VMM/include/HMVMXCommon.h
r92354 r92359 222 222 AssertCompileSizeAlignment(HMEVENT, 8); 223 223 224 225 typedef struct VMXVMCSINFOSHARED 226 { 227 /** @name Real-mode emulation state. 228 * @{ */ 229 /** Set if guest was executing in real mode (extra checks). */ 230 bool fWasInRealMode; 231 /** Padding. */ 232 bool afPadding0[7]; 233 struct 234 { 235 X86DESCATTR AttrCS; 236 X86DESCATTR AttrDS; 237 X86DESCATTR AttrES; 238 X86DESCATTR AttrFS; 239 X86DESCATTR AttrGS; 240 X86DESCATTR AttrSS; 241 X86EFLAGS Eflags; 242 bool fRealOnV86Active; 243 bool afPadding1[3]; 244 } RealMode; 245 /** @} */ 246 247 /** @name LBR MSR data. 248 * @{ */ 249 /** List of LastBranch-From-IP MSRs. */ 250 uint64_t au64LbrFromIpMsr[32]; 251 /** List of LastBranch-To-IP MSRs. */ 252 uint64_t au64LbrToIpMsr[32]; 253 /** The MSR containing the index to the most recent branch record. */ 254 uint64_t u64LbrTosMsr; 255 /** @} */ 256 } VMXVMCSINFOSHARED; 257 /** Pointer to a VMXVMCSINFOSHARED struct. */ 258 typedef VMXVMCSINFOSHARED *PVMXVMCSINFOSHARED; 259 /** Pointer to a const VMXVMCSINFOSHARED struct. */ 260 typedef const VMXVMCSINFOSHARED *PCVMXVMCSINFOSHARED; 261 AssertCompileSizeAlignment(VMXVMCSINFOSHARED, 8); 262 263 264 /** 265 * VMX VMCS information, ring-0 only. 266 * 267 * This structure provides information maintained for and during the executing of a 268 * guest (or nested-guest) VMCS (VM control structure) using hardware-assisted VMX. 269 * 270 * Note! The members here are ordered and aligned based on estimated frequency of 271 * usage and grouped to fit within a cache line in hot code paths. Even subtle 272 * changes here have a noticeable effect in the bootsector benchmarks. Modify with 273 * care. 274 */ 275 typedef struct VMXVMCSINFO 276 { 277 /** Pointer to the bits we share with ring-3. */ 278 R3R0PTRTYPE(PVMXVMCSINFOSHARED) pShared; 279 280 /** @name Auxiliary information. 281 * @{ */ 282 /** Host-physical address of the EPTP. */ 283 RTHCPHYS HCPhysEPTP; 284 /** The VMCS launch state, see VMX_V_VMCS_LAUNCH_STATE_XXX. */ 285 uint32_t fVmcsState; 286 /** The VMCS launch state of the shadow VMCS, see VMX_V_VMCS_LAUNCH_STATE_XXX. */ 287 uint32_t fShadowVmcsState; 288 /** The host CPU for which its state has been exported to this VMCS. */ 289 RTCPUID idHostCpuState; 290 /** The host CPU on which we last executed this VMCS. */ 291 RTCPUID idHostCpuExec; 292 /** Number of guest MSRs in the VM-entry MSR-load area. */ 293 uint32_t cEntryMsrLoad; 294 /** Number of guest MSRs in the VM-exit MSR-store area. */ 295 uint32_t cExitMsrStore; 296 /** Number of host MSRs in the VM-exit MSR-load area. */ 297 uint32_t cExitMsrLoad; 298 /** @} */ 299 300 /** @name Cache of execution related VMCS fields. 301 * @{ */ 302 /** Pin-based VM-execution controls. */ 303 uint32_t u32PinCtls; 304 /** Processor-based VM-execution controls. */ 305 uint32_t u32ProcCtls; 306 /** Secondary processor-based VM-execution controls. */ 307 uint32_t u32ProcCtls2; 308 /** Tertiary processor-based VM-execution controls. */ 309 uint64_t u64ProcCtls3; 310 /** VM-entry controls. */ 311 uint32_t u32EntryCtls; 312 /** VM-exit controls. */ 313 uint32_t u32ExitCtls; 314 /** Exception bitmap. */ 315 uint32_t u32XcptBitmap; 316 /** Page-fault exception error-code mask. */ 317 uint32_t u32XcptPFMask; 318 /** Page-fault exception error-code match. */ 319 uint32_t u32XcptPFMatch; 320 /** Padding. */ 321 uint32_t u32Alignment0; 322 /** TSC offset. */ 323 uint64_t u64TscOffset; 324 /** VMCS link pointer. */ 325 uint64_t u64VmcsLinkPtr; 326 /** CR0 guest/host mask. */ 327 uint64_t u64Cr0Mask; 328 /** CR4 guest/host mask. */ 329 uint64_t u64Cr4Mask; 330 #ifdef IN_RING0 331 /** Current VMX_VMCS_HOST_RIP value (only used in HMR0A.asm). */ 332 uint64_t uHostRip; 333 /** Current VMX_VMCS_HOST_RSP value (only used in HMR0A.asm). */ 334 uint64_t uHostRsp; 335 #endif 336 /** @} */ 337 338 /** @name Host-virtual address of VMCS and related data structures. 339 * @{ */ 340 /** The VMCS. */ 341 R3R0PTRTYPE(void *) pvVmcs; 342 /** The shadow VMCS. */ 343 R3R0PTRTYPE(void *) pvShadowVmcs; 344 /** The virtual-APIC page. */ 345 R3R0PTRTYPE(uint8_t *) pbVirtApic; 346 /** The MSR bitmap. */ 347 R3R0PTRTYPE(void *) pvMsrBitmap; 348 /** The VM-entry MSR-load area. */ 349 R3R0PTRTYPE(void *) pvGuestMsrLoad; 350 /** The VM-exit MSR-store area. */ 351 R3R0PTRTYPE(void *) pvGuestMsrStore; 352 /** The VM-exit MSR-load area. */ 353 R3R0PTRTYPE(void *) pvHostMsrLoad; 354 /** @} */ 355 356 #ifdef IN_RING0 357 /** @name Host-physical address of VMCS and related data structures. 358 * @{ */ 359 /** The VMCS. */ 360 RTHCPHYS HCPhysVmcs; 361 /** The shadow VMCS. */ 362 RTHCPHYS HCPhysShadowVmcs; 363 /** The virtual APIC page. */ 364 RTHCPHYS HCPhysVirtApic; 365 /** The MSR bitmap. */ 366 RTHCPHYS HCPhysMsrBitmap; 367 /** The VM-entry MSR-load area. */ 368 RTHCPHYS HCPhysGuestMsrLoad; 369 /** The VM-exit MSR-store area. */ 370 RTHCPHYS HCPhysGuestMsrStore; 371 /** The VM-exit MSR-load area. */ 372 RTHCPHYS HCPhysHostMsrLoad; 373 /** @} */ 374 375 /** @name R0-memory objects address for VMCS and related data structures. 376 * @{ */ 377 /** R0-memory object for VMCS and related data structures. */ 378 RTR0MEMOBJ hMemObj; 379 /** @} */ 380 #endif 381 } VMXVMCSINFO; 382 /** Pointer to a VMXVMCSINFOR0 struct. */ 383 typedef VMXVMCSINFO *PVMXVMCSINFO; 384 /** Pointer to a const VMXVMCSINFO struct. */ 385 typedef const VMXVMCSINFO *PCVMXVMCSINFO; 386 AssertCompileSizeAlignment(VMXVMCSINFO, 8); 387 AssertCompileMemberAlignment(VMXVMCSINFO, u32PinCtls, 4); 388 AssertCompileMemberAlignment(VMXVMCSINFO, u64VmcsLinkPtr, 8); 389 AssertCompileMemberAlignment(VMXVMCSINFO, pvVmcs, 8); 390 AssertCompileMemberAlignment(VMXVMCSINFO, pvShadowVmcs, 8); 391 AssertCompileMemberAlignment(VMXVMCSINFO, pbVirtApic, 8); 392 AssertCompileMemberAlignment(VMXVMCSINFO, pvMsrBitmap, 8); 393 AssertCompileMemberAlignment(VMXVMCSINFO, pvGuestMsrLoad, 8); 394 AssertCompileMemberAlignment(VMXVMCSINFO, pvGuestMsrStore, 8); 395 AssertCompileMemberAlignment(VMXVMCSINFO, pvHostMsrLoad, 8); 396 #ifdef IN_RING0 397 AssertCompileMemberAlignment(VMXVMCSINFO, HCPhysVmcs, 8); 398 AssertCompileMemberAlignment(VMXVMCSINFO, hMemObj, 8); 399 #endif 400 224 401 /** @} */ 225 402 -
trunk/src/VBox/VMM/include/VMXInternal.h
r92354 r92359 56 56 * care. 57 57 */ 58 typedef struct VMXVMCSINFOSHARED59 {60 /** @name Real-mode emulation state.61 * @{ */62 /** Set if guest was executing in real mode (extra checks). */63 bool fWasInRealMode;64 /** Padding. */65 bool afPadding0[7];66 struct67 {68 X86DESCATTR AttrCS;69 X86DESCATTR AttrDS;70 X86DESCATTR AttrES;71 X86DESCATTR AttrFS;72 X86DESCATTR AttrGS;73 X86DESCATTR AttrSS;74 X86EFLAGS Eflags;75 bool fRealOnV86Active;76 bool afPadding1[3];77 } RealMode;78 /** @} */79 80 /** @name LBR MSR data.81 * @{ */82 /** List of LastBranch-From-IP MSRs. */83 uint64_t au64LbrFromIpMsr[32];84 /** List of LastBranch-To-IP MSRs. */85 uint64_t au64LbrToIpMsr[32];86 /** The MSR containing the index to the most recent branch record. */87 uint64_t u64LbrTosMsr;88 /** @} */89 } VMXVMCSINFOSHARED;90 /** Pointer to a VMXVMCSINFOSHARED struct. */91 typedef VMXVMCSINFOSHARED *PVMXVMCSINFOSHARED;92 /** Pointer to a const VMXVMCSINFOSHARED struct. */93 typedef const VMXVMCSINFOSHARED *PCVMXVMCSINFOSHARED;94 AssertCompileSizeAlignment(VMXVMCSINFOSHARED, 8);95 96 97 /**98 * VMX VMCS information, ring-0 only.99 *100 * This structure provides information maintained for and during the executing of a101 * guest (or nested-guest) VMCS (VM control structure) using hardware-assisted VMX.102 *103 * Note! The members here are ordered and aligned based on estimated frequency of104 * usage and grouped to fit within a cache line in hot code paths. Even subtle105 * changes here have a noticeable effect in the bootsector benchmarks. Modify with106 * care.107 */108 typedef struct VMXVMCSINFO109 {110 /** Pointer to the bits we share with ring-3. */111 R3R0PTRTYPE(PVMXVMCSINFOSHARED) pShared;112 113 /** @name Auxiliary information.114 * @{ */115 /** Host-physical address of the EPTP. */116 RTHCPHYS HCPhysEPTP;117 /** The VMCS launch state, see VMX_V_VMCS_LAUNCH_STATE_XXX. */118 uint32_t fVmcsState;119 /** The VMCS launch state of the shadow VMCS, see VMX_V_VMCS_LAUNCH_STATE_XXX. */120 uint32_t fShadowVmcsState;121 /** The host CPU for which its state has been exported to this VMCS. */122 RTCPUID idHostCpuState;123 /** The host CPU on which we last executed this VMCS. */124 RTCPUID idHostCpuExec;125 /** Number of guest MSRs in the VM-entry MSR-load area. */126 uint32_t cEntryMsrLoad;127 /** Number of guest MSRs in the VM-exit MSR-store area. */128 uint32_t cExitMsrStore;129 /** Number of host MSRs in the VM-exit MSR-load area. */130 uint32_t cExitMsrLoad;131 /** @} */132 133 /** @name Cache of execution related VMCS fields.134 * @{ */135 /** Pin-based VM-execution controls. */136 uint32_t u32PinCtls;137 /** Processor-based VM-execution controls. */138 uint32_t u32ProcCtls;139 /** Secondary processor-based VM-execution controls. */140 uint32_t u32ProcCtls2;141 /** Tertiary processor-based VM-execution controls. */142 uint64_t u64ProcCtls3;143 /** VM-entry controls. */144 uint32_t u32EntryCtls;145 /** VM-exit controls. */146 uint32_t u32ExitCtls;147 /** Exception bitmap. */148 uint32_t u32XcptBitmap;149 /** Page-fault exception error-code mask. */150 uint32_t u32XcptPFMask;151 /** Page-fault exception error-code match. */152 uint32_t u32XcptPFMatch;153 /** Padding. */154 uint32_t u32Alignment0;155 /** TSC offset. */156 uint64_t u64TscOffset;157 /** VMCS link pointer. */158 uint64_t u64VmcsLinkPtr;159 /** CR0 guest/host mask. */160 uint64_t u64Cr0Mask;161 /** CR4 guest/host mask. */162 uint64_t u64Cr4Mask;163 #ifdef IN_RING0164 /** Current VMX_VMCS_HOST_RIP value (only used in HMR0A.asm). */165 uint64_t uHostRip;166 /** Current VMX_VMCS_HOST_RSP value (only used in HMR0A.asm). */167 uint64_t uHostRsp;168 #endif169 /** @} */170 171 /** @name Host-virtual address of VMCS and related data structures.172 * @{ */173 /** The VMCS. */174 R3R0PTRTYPE(void *) pvVmcs;175 /** The shadow VMCS. */176 R3R0PTRTYPE(void *) pvShadowVmcs;177 /** The virtual-APIC page. */178 R3R0PTRTYPE(uint8_t *) pbVirtApic;179 /** The MSR bitmap. */180 R3R0PTRTYPE(void *) pvMsrBitmap;181 /** The VM-entry MSR-load area. */182 R3R0PTRTYPE(void *) pvGuestMsrLoad;183 /** The VM-exit MSR-store area. */184 R3R0PTRTYPE(void *) pvGuestMsrStore;185 /** The VM-exit MSR-load area. */186 R3R0PTRTYPE(void *) pvHostMsrLoad;187 /** @} */188 189 #ifdef IN_RING0190 /** @name Host-physical address of VMCS and related data structures.191 * @{ */192 /** The VMCS. */193 RTHCPHYS HCPhysVmcs;194 /** The shadow VMCS. */195 RTHCPHYS HCPhysShadowVmcs;196 /** The virtual APIC page. */197 RTHCPHYS HCPhysVirtApic;198 /** The MSR bitmap. */199 RTHCPHYS HCPhysMsrBitmap;200 /** The VM-entry MSR-load area. */201 RTHCPHYS HCPhysGuestMsrLoad;202 /** The VM-exit MSR-store area. */203 RTHCPHYS HCPhysGuestMsrStore;204 /** The VM-exit MSR-load area. */205 RTHCPHYS HCPhysHostMsrLoad;206 /** @} */207 208 /** @name R0-memory objects address for VMCS and related data structures.209 * @{ */210 /** R0-memory object for VMCS and related data structures. */211 RTR0MEMOBJ hMemObj;212 /** @} */213 #endif214 } VMXVMCSINFO;215 /** Pointer to a VMXVMCSINFOR0 struct. */216 typedef VMXVMCSINFO *PVMXVMCSINFO;217 /** Pointer to a const VMXVMCSINFO struct. */218 typedef const VMXVMCSINFO *PCVMXVMCSINFO;219 AssertCompileSizeAlignment(VMXVMCSINFO, 8);220 AssertCompileMemberAlignment(VMXVMCSINFO, u32PinCtls, 4);221 AssertCompileMemberAlignment(VMXVMCSINFO, u64VmcsLinkPtr, 8);222 AssertCompileMemberAlignment(VMXVMCSINFO, pvVmcs, 8);223 AssertCompileMemberAlignment(VMXVMCSINFO, pvShadowVmcs, 8);224 AssertCompileMemberAlignment(VMXVMCSINFO, pbVirtApic, 8);225 AssertCompileMemberAlignment(VMXVMCSINFO, pvMsrBitmap, 8);226 AssertCompileMemberAlignment(VMXVMCSINFO, pvGuestMsrLoad, 8);227 AssertCompileMemberAlignment(VMXVMCSINFO, pvGuestMsrStore, 8);228 AssertCompileMemberAlignment(VMXVMCSINFO, pvHostMsrLoad, 8);229 #ifdef IN_RING0230 AssertCompileMemberAlignment(VMXVMCSINFO, HCPhysVmcs, 8);231 AssertCompileMemberAlignment(VMXVMCSINFO, hMemObj, 8);232 #endif233 234 58 235 59 /**
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